| Message ID | 20231023-display-support-v4-0-ed82eb168fb1@baylibre.com |
|---|---|
| Headers | show |
| Series | Add display support for the MT8365-EVK board | expand |
Il 23/05/24 14:49, Alexandre Mergnat ha scritto: > - Add aliases for each display components to help display drivers. > - Add the Display Pulse Width Modulation (DISP_PWM) to provide PWM signals > for the LED driver of mobile LCM. > - Add the MIPI Display Serial Interface (DSI) PHY support. (up to 4-lane > output) > - Add the display mutex support. > - Add the following display component support: > - OVL0 (Overlay) > - RDMA0 (Data Path Read DMA) > - Color0 > - CCorr0 (Color Correction) > - AAL0 (Adaptive Ambient Light) > - GAMMA0 > - Dither0 > - DSI0 (Display Serial Interface) > - RDMA1 (Data Path Read DMA) > - DPI0 (Display Parallel Interface) > > Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> > --- > arch/arm64/boot/dts/mediatek/mt8365.dtsi | 336 +++++++++++++++++++++++++++++++ > 1 file changed, 336 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi > index 24581f7410aa..9f88645141d6 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi > @@ -8,6 +8,7 @@ > #include <dt-bindings/clock/mediatek,mt8365-clk.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/interrupt-controller/irq.h> > +#include <dt-bindings/memory/mediatek,mt8365-larb-port.h> > #include <dt-bindings/phy/phy.h> > #include <dt-bindings/power/mediatek,mt8365-power.h> > ..snip.. > + > + rdma1: rdma@14016000 { > + compatible = "mediatek,mt8365-disp-rdma", "mediatek,mt8183-disp-rdma"; > + reg = <0 0x14016000 0 0x1000>; > + clocks = <&mmsys CLK_MM_MM_DISP_RDMA1>; > + interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>; > + iommus = <&iommu M4U_PORT_DISP_RDMA1>; > + mediatek,rdma-fifo-size = <2048>; > + power-domains = <&spm MT8365_POWER_DOMAIN_MM>; > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0>; Hey Alex, only one nit here - trying to get the formatting consistent between devicetrees for all MediaTek SoCs. VDOSYS/MMSYS: port { #address-cells = <1>; #size-cells = <0>; vdosys0_ep_main: endpoint@0 { reg = <0>; remote-endpoint = <&ovl0_in>; }; }; RDMA/OVL/other components: ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; rdma0_in: endpoint { remote-endpoint = <&ovl0_out>; }; }; Can you please follow the style that I've shown up there for all of the ports nodes and resend the devicetree commits? P.S.: This is a paste from the MT8195 devicetree that I'll send soon, probably tomorrow or something along those lines. After which, the devicetree looks ok to me. Thanks, Angelo
Hi, Alexandre: <amergnat@baylibre.com> 於 2024年5月23日 週四 下午8:49寫道： > > From: Fabien Parent <fparent@baylibre.com> > > Add DRM support for MT8365 SoC. > > Signed-off-by: Fabien Parent <fparent@baylibre.com> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> > --- > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c > index ce8f3cc6e853..e1c3281651ae 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c > @@ -318,6 +318,10 @@ static const struct mtk_mmsys_driver_data mt8195_vdosys1_driver_data = { > .mmsys_dev_num = 2, > }; > > +static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = { > + .mmsys_dev_num = 1, You do not describe the pipeline information here. I think display function would not work. Regards, Chun-Kuang. > +}; > + > static const struct of_device_id mtk_drm_of_ids[] = { > { .compatible = "mediatek,mt2701-mmsys", > .data = &mt2701_mmsys_driver_data}, > @@ -345,6 +349,8 @@ static const struct of_device_id mtk_drm_of_ids[] = { > .data = &mt8195_vdosys0_driver_data}, > { .compatible = "mediatek,mt8195-vdosys1", > .data = &mt8195_vdosys1_driver_data}, > + { .compatible = "mediatek,mt8365-mmsys", > + .data = &mt8365_mmsys_driver_data}, > { } > }; > MODULE_DEVICE_TABLE(of, mtk_drm_of_ids); > @@ -732,6 +738,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = { > .data = (void *)MTK_DISP_MUTEX }, > { .compatible = "mediatek,mt8195-disp-mutex", > .data = (void *)MTK_DISP_MUTEX }, > + { .compatible = "mediatek,mt8365-disp-mutex", > + .data = (void *)MTK_DISP_MUTEX }, > { .compatible = "mediatek,mt8173-disp-od", > .data = (void *)MTK_DISP_OD }, > { .compatible = "mediatek,mt2701-disp-ovl", > > -- > 2.25.1 >
On 21/06/2024 17:24, Chun-Kuang Hu wrote: > Hi, Alexandre: > > <amergnat@baylibre.com> 於 2024年5月23日 週四 下午8:49寫道： >> From: Fabien Parent<fparent@baylibre.com> >> >> Add DRM support for MT8365 SoC. >> >> Signed-off-by: Fabien Parent<fparent@baylibre.com> >> Reviewed-by: AngeloGioacchino Del Regno<angelogioacchino.delregno@collabora.com> >> Signed-off-by: Alexandre Mergnat<amergnat@baylibre.com> >> --- >> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 8 ++++++++ >> 1 file changed, 8 insertions(+) >> >> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c >> index ce8f3cc6e853..e1c3281651ae 100644 >> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c >> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c >> @@ -318,6 +318,10 @@ static const struct mtk_mmsys_driver_data mt8195_vdosys1_driver_data = { >> .mmsys_dev_num = 2, >> }; >> >> +static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = { >> + .mmsys_dev_num = 1, > You do not describe the pipeline information here. I think display > function would not work. Hi Chun-Kuang, I don't describe the pipeline information here because I do it in the DTS thanks to the OF graphs Angelo's serie [1]. I've tested DSI and DPI display, they work correctly ;) [1] https://lore.kernel.org/all/20240618101726.110416-1-angelogioacchino.delregno@collabora.com/
Hi, Shuijing: Please help to review this patch. Regards, Chun-Kuang. Alexandre Mergnat <amergnat@baylibre.com> 於 2024年5月23日 週四 下午8:49寫道： > > Currently, mtk_dsi_lane_ready (which setup the DSI lane) is triggered > before mtk_dsi_poweron. lanes_ready flag toggle to true during > mtk_dsi_lane_ready function, and the DSI module is set up during > mtk_dsi_poweron. > > Later, during panel driver init, mtk_dsi_lane_ready is triggered but does > nothing because lanes are considered ready. Unfortunately, when the panel > driver try to communicate, the DSI returns a timeout. > > The solution found here is to put lanes_ready flag to false after the DSI > module setup into mtk_dsi_poweron to init the DSI lanes after the power / > setup of the DSI module. > > Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c > index e036d9394c23..cb546a9e9419 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > @@ -643,6 +643,8 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi) > mtk_dsi_config_vdo_timing(dsi); > mtk_dsi_set_interrupt_enable(dsi); > > + dsi->lanes_ready = false; > + > return 0; > err_disable_engine_clk: > clk_disable_unprepare(dsi->engine_clk); > > -- > 2.25.1 >
The purpose of this series is to add the display support for the mt8365-evk. This is the list of HWs / IPs support added: - Connectors (HW): - HDMI - MIPI DSI (Mobile Industry Processor Interface Display Serial Interface) - HDMI bridge (it66121) - DSI pannel (startek,kd070fhfid015) - SoC display blocks (IP): - OVL0 (Overlay) - RDMA0 (Data Path Read DMA) - Color0 - CCorr0 (Color Correction) - AAL0 (Adaptive Ambient Light) - GAMMA0 - Dither0 - DSI0 (Display Serial Interface) - RDMA1 (Data Path Read DMA) - DPI0 (Display Parallel Interface) The Mediatek DSI, DPI and DRM drivers are also improved. The series is rebased on top of Angelo's series [1] to use the OF graphs support. Regards, Alex Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> --- Changes in v4: - Rebase to "next-20240523" branch. - Patch merged, then removed from the series: - dt-bindings: display: mediatek: dpi: add power-domains property - dt-bindings: pwm: mediatek,pwm-disp: add compatible for mt8365 SoC - clk: mediatek: mt8365-mm: fix DPI0 parent - Remove mediatek,mt8365-dpi compatible from mtk_drm_drv.c because it use the mt8192's data. It's a miss. - Add MT8365 OF graphs support, remove the hardcoded display path and rebase on top of Angelo's series [1]. - Link to v3: https://lore.kernel.org/r/20231023-display-support-v3-0-53388f3ed34b@baylibre.com Changes in v3: - Drop "drm/mediatek: add mt8365 dpi support" because it's the same config as mt8192 SoC - Drop "dt-bindings: pwm: mediatek,pwm-disp: add power-domains property" because an equivalent patch has been merge already. - Add DPI clock fix in a separate commit. - Improve DTS(I) readability. - Link to v2: https://lore.kernel.org/r/20231023-display-support-v2-0-33ce8864b227@baylibre.com Changes in v2: - s/binding/compatible/ in commit messages/titles. - Improve commit messages as Conor suggest. - pwm-disp: Set power domain property for MT8365. This one is optionnal and can be used for other SoC. - Fix mediatek,dsi.yaml issue. - Remove the extra clock in the DPI node/driver and fix the dpi clock parenting to be consistent with the DPI clock assignement. - Link to v1: https://lore.kernel.org/r/20231023-display-support-v1-0-5c860ed5c33b@baylibre.com [1] https://lore.kernel.org/all/20240521075717.50330-1-angelogioacchino.delregno@collabora.com/ [2] https://lore.kernel.org/lkml/67f13b3c-18b2-4042-9908-b4d41c24cdb0@baylibre.com/ --- Alexandre Mergnat (13): dt-bindings: display: mediatek: aal: add compatible for MT8365 SoC dt-bindings: display: mediatek: ccorr: add compatible for MT8365 SoC dt-bindings: display: mediatek: color: add compatible for MT8365 SoC dt-bindings: display: mediatek: dither: add compatible for MT8365 SoC dt-bindings: display: mediatek: dsi: add compatible for MT8365 SoC dt-bindings: display: mediatek: dpi: add compatible for MT8365 dt-bindings: display: mediatek: gamma: add compatible for MT8365 SoC dt-bindings: display: mediatek: ovl: add compatible for MT8365 SoC dt-bindings: display: mediatek: rdma: add compatible for MT8365 SoC drm/mediatek: dsi: Improves the DSI lane setup robustness arm64: defconfig: enable display connector support arm64: dts: mediatek: add display blocks support for the MT8365 SoC arm64: dts: mediatek: add display support for mt8365-evk Fabien Parent (2): dt-bindings: display: mediatek: dpi: add power-domains property drm/mediatek: add MT8365 SoC support .../bindings/display/mediatek/mediatek,aal.yaml | 1 + .../bindings/display/mediatek/mediatek,ccorr.yaml | 3 + .../bindings/display/mediatek/mediatek,color.yaml | 1 + .../bindings/display/mediatek/mediatek,dither.yaml | 1 + .../bindings/display/mediatek/mediatek,dpi.yaml | 9 + .../bindings/display/mediatek/mediatek,dsi.yaml | 1 + .../bindings/display/mediatek/mediatek,gamma.yaml | 1 + .../bindings/display/mediatek/mediatek,ovl.yaml | 1 + .../bindings/display/mediatek/mediatek,rdma.yaml | 1 + arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 236 +++++++++++++++ arch/arm64/boot/dts/mediatek/mt8365.dtsi | 336 +++++++++++++++++++++ arch/arm64/configs/defconfig | 1 + drivers/gpu/drm/mediatek/mtk_drm_drv.c | 8 + drivers/gpu/drm/mediatek/mtk_dsi.c | 2 + 14 files changed, 602 insertions(+) --- base-commit: 5fe1859247a981fa491507de2b1ba63e84addc38 change-id: 20231023-display-support-c6418b30e419 Best regards,