| Message ID | 20230608021839.12769-1-billy_tsai@aspeedtech.com |
|---|---|
| Headers | show |
| Series | Support pwm/tach driver for aspeed ast26xx | expand |
On 6/7/23 19:18, Billy Tsai wrote: > Add the support of Tachometer which can use to monitor the frequency of > the input. In Aspeed AST2600 SoC features 16 TACH controllers, with each > controller capable of supporting up to 1 input. > You mean there will be 16 instances of this driver ? That is weird, confusing, and warrants a detailed explanation. > Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> > --- > Documentation/hwmon/index.rst | 1 + > Documentation/hwmon/tach-aspeed-ast2600.rst | 25 ++ > drivers/hwmon/Kconfig | 10 + > drivers/hwmon/Makefile | 1 + > drivers/hwmon/tach-aspeed-ast2600.c | 305 ++++++++++++++++++++ > 5 files changed, 342 insertions(+) > create mode 100644 Documentation/hwmon/tach-aspeed-ast2600.rst > create mode 100644 drivers/hwmon/tach-aspeed-ast2600.c > > diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst > index ddff3c5713d7..4c3dd74675ef 100644 > --- a/Documentation/hwmon/index.rst > +++ b/Documentation/hwmon/index.rst > @@ -194,6 +194,7 @@ Hardware Monitoring Kernel Drivers > sparx5-temp > stpddc60 > sy7636a-hwmon > + tach-aspeed-ast2600 > tc654 > tc74 > thmc50 > diff --git a/Documentation/hwmon/tach-aspeed-ast2600.rst b/Documentation/hwmon/tach-aspeed-ast2600.rst > new file mode 100644 > index 000000000000..b08c73a4237f > --- /dev/null > +++ b/Documentation/hwmon/tach-aspeed-ast2600.rst > @@ -0,0 +1,25 @@ > +Kernel driver tach-aspeed-ast2600 > +================================= > + > +Supported chips: > + ASPEED AST2600 > + > +Authors: > + <billy_tsai@aspeedtech.com> > + > +Description: > +------------ > +This driver implements support for ASPEED AST2600 Fan Tacho controller. > +The controller supports up to 1 tachometer inputs. > + > +The driver provides the following sensor accesses in sysfs: > + > +=============== ======= ====================================================== > +fanX_input ro provide current fan rotation value in RPM as reported > + by the fan to the device. > +fanX_div rw Fan divisor: Supported value are power of 4 (1, 4, 16 > + 64, ... 4194304) > + The larger divisor, the less rpm accuracy and the less > + affected by fan signal glitch. > +fanX_pulses rw Fan pulses per resolution. Presumably, as implemented, that would be 16 instances, each with fan1_{input,div}. > +=============== ======= ====================================================== > diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig > index a5253abb7ea7..5948a63e44e7 100644 > --- a/drivers/hwmon/Kconfig > +++ b/drivers/hwmon/Kconfig > @@ -411,6 +411,16 @@ config SENSORS_ASPEED > This driver can also be built as a module. If so, the module > will be called aspeed_pwm_tacho. > > +config SENSORS_TACH_ASPEED_AST2600 > + tristate "ASPEED ast2600 Tachometer support" > + depends on ARCH_ASPEED || COMPILE_TEST > + depends on HAVE_CLK && HAS_IOMEM > + help > + This driver provides support for Aspeed ast2600 Tachometer. > + > + To compile this driver as a module, choose M here: the module > + will be called tach-aspeed-ast2600. > + > config SENSORS_ATXP1 > tristate "Attansic ATXP1 VID controller" > depends on I2C > diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile > index c5cd7e3a67ff..a3bf5b438e0f 100644 > --- a/drivers/hwmon/Makefile > +++ b/drivers/hwmon/Makefile > @@ -53,6 +53,7 @@ obj-$(CONFIG_SENSORS_ARM_SCMI) += scmi-hwmon.o > obj-$(CONFIG_SENSORS_ARM_SCPI) += scpi-hwmon.o > obj-$(CONFIG_SENSORS_AS370) += as370-hwmon.o > obj-$(CONFIG_SENSORS_ASC7621) += asc7621.o > +obj-$(CONFIG_SENSORS_TACH_ASPEED_AST2600) += tach-aspeed-ast2600.o > obj-$(CONFIG_SENSORS_ASPEED) += aspeed-pwm-tacho.o > obj-$(CONFIG_SENSORS_ATXP1) += atxp1.o > obj-$(CONFIG_SENSORS_AXI_FAN_CONTROL) += axi-fan-control.o > diff --git a/drivers/hwmon/tach-aspeed-ast2600.c b/drivers/hwmon/tach-aspeed-ast2600.c > new file mode 100644 > index 000000000000..8be66ee25a31 > --- /dev/null > +++ b/drivers/hwmon/tach-aspeed-ast2600.c > @@ -0,0 +1,305 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later > +/* > + * Copyright (C) ASPEED Technology Inc. > + */ > + > +#include <linux/bitfield.h> > +#include <linux/clk.h> > +#include <linux/delay.h> > +#include <linux/errno.h> > +#include <linux/hwmon.h> > +#include <linux/io.h> > +#include <linux/kernel.h> > +#include <linux/module.h> > +#include <linux/of_device.h> > +#include <linux/platform_device.h> > +#include <linux/reset.h> > +#include <linux/sysfs.h> > + > +/* TACH Control Register */ > +#define TACH_ASPEED_CTRL (0x00) > +#define TACH_ASPEED_IER BIT(31) > +#define TACH_ASPEED_INVERS_LIMIT BIT(30) > +#define TACH_ASPEED_LOOPBACK BIT(29) > +#define TACH_ASPEED_ENABLE BIT(28) > +#define TACH_ASPEED_DEBOUNCE_MASK GENMASK(27, 26) > +#define TACH_ASPEED_DEBOUNCE_BIT 26 > +#define TACH_ASPEED_IO_EDGE_MASK GENMASK(25, 24) > +#define TACH_ASPEED_IO_EDGE_BIT 24 > +#define TACH_ASPEED_CLK_DIV_T_MASK GENMASK(23, 20) > +#define TACH_ASPEED_CLK_DIV_BIT 20 > +#define TACH_ASPEED_THRESHOLD_MASK GENMASK(19, 0) > +/* [27:26] */ > +#define DEBOUNCE_3_CLK 0x00 > +#define DEBOUNCE_2_CLK 0x01 > +#define DEBOUNCE_1_CLK 0x02 > +#define DEBOUNCE_0_CLK 0x03 > +/* [25:24] */ > +#define F2F_EDGES 0x00 > +#define R2R_EDGES 0x01 > +#define BOTH_EDGES 0x02 > +/* [23:20] */ > +/* divisor = 4 to the nth power, n = register value */ > +#define DEFAULT_TACH_DIV 1024 > +#define DIV_TO_REG(divisor) (ilog2(divisor) >> 1) > + > +/* TACH Status Register */ > +#define TACH_ASPEED_STS (0x04) Unnecesarry () > + > +/*PWM_TACH_STS */ > +#define TACH_ASPEED_ISR BIT(31) > +#define TACH_ASPEED_PWM_OUT BIT(25) > +#define TACH_ASPEED_PWM_OEN BIT(24) > +#define TACH_ASPEED_DEB_INPUT BIT(23) > +#define TACH_ASPEED_RAW_INPUT BIT(22) > +#define TACH_ASPEED_VALUE_UPDATE BIT(21) > +#define TACH_ASPEED_FULL_MEASUREMENT BIT(20) > +#define TACH_ASPEED_VALUE_MASK GENMASK(19, 0) > +/********************************************************** > + * Software setting > + *********************************************************/ > +#define DEFAULT_FAN_PULSE_PR 2 > + > +struct aspeed_tach_channel_params { > + u8 pulse_pr; > + u32 divisor; > +}; > + > +struct aspeed_tach_data { > + struct device *dev; > + void __iomem *base; > + struct clk *clk; > + struct reset_control *reset; > + bool tach_present; > + struct aspeed_tach_channel_params tach_channel; Assuming that all channels have the same divisor, this structure is really unnecessary (especially since pulse_pr should be dropped - see below). > + unsigned long clk_source; > +}; > + > +static void aspeed_tach_ch_enable(struct aspeed_tach_data *priv, bool enable) > +{ > + if (enable) > + writel(readl(priv->base + TACH_ASPEED_CTRL) | > + (TACH_ASPEED_ENABLE), > + priv->base + TACH_ASPEED_CTRL); > + else > + writel(readl(priv->base + TACH_ASPEED_CTRL) & > + ~(TACH_ASPEED_ENABLE), Unnecessary () around TACH_ASPEED_ENABLE. > + priv->base + TACH_ASPEED_CTRL); > +} > + > +static u64 aspeed_tach_val_to_rpm(struct aspeed_tach_data *priv, u32 tach_val) > +{ > + u64 rpm; > + u32 tach_div; > + > + tach_div = tach_val * (priv->tach_channel.divisor) * > + (priv->tach.channel.pulse_pr); > + Unnecessary () around priv->tach_channel.pulse_pr and priv->tach_channel.divisor. I am not going to look further for those. Please make sure you drop them all. > + dev_dbg(priv->dev, "clk %ld, tach_val %d , tach_div %d\n", > + priv->clk_source, tach_val, tach_div); > + > + rpm = (u64)priv->clk_source * 60; > + do_div(rpm, tach_div); > + > + return rpm; This function should really return an integer. > +} > + > +static int aspeed_get_fan_tach_ch_rpm(struct aspeed_tach_data *priv) > +{ > + u32 val; > + u64 rpm; > + > + val = readl(priv->base + TACH_ASPEED_STS); > + > + if (!(val & TACH_ASPEED_FULL_MEASUREMENT)) > + return 0; > + rpm = aspeed_tach_val_to_rpm(priv, val & TACH_ASPEED_VALUE_MASK); > + > + return rpm; The 'rpm' variable is unnecessary. > +} > + > +static int aspeed_tach_hwmon_read(struct device *dev, > + enum hwmon_sensor_types type, u32 attr, > + int channel, long *val) > +{ > + struct aspeed_tach_data *priv = dev_get_drvdata(dev); > + u32 reg_val; > + int ret; > + > + switch (attr) { > + case hwmon_fan_input: > + ret = aspeed_get_fan_tach_ch_rpm(priv); > + if (ret < 0) > + return ret; Why ? The called code never returns a negative value. > + *val = ret; > + break; > + case hwmon_fan_div: > + reg_val = readl(priv->base + TACH_ASPEED_CTRL); > + reg_val = FIELD_GET(TACH_ASPEED_CLK_DIV_T_MASK, reg_val); > + *val = BIT(reg_val << 1); > + break; > + case hwmon_fan_pulses: > + *val = priv->tach_channel.pulse_pr; > + break; > + default: > + return -EOPNOTSUPP; > + } > + return 0; > +} > + > +static int aspeed_tach_hwmon_write(struct device *dev, > + enum hwmon_sensor_types type, u32 attr, > + int channel, long val) > +{ > + struct aspeed_tach_data *priv = dev_get_drvdata(dev); > + > + switch (attr) { > + case hwmon_fan_div: > + if (!is_power_of_2(val) || (ilog2(val) % 2)) > + return -EINVAL; > + else if (DIV_TO_REG(val) > 0xb) Else after return is unnecessary > + return -ERANGE; Math result not representable ? Not really. > + priv->tach_channel.divisor = val; > + writel((readl(priv->base + TACH_ASPEED_CTRL) & > + ~(TACH_ASPEED_CLK_DIV_T_MASK)) | Unnecessary () around TACH_ASPEED_CLK_DIV_T_MASK. > + (DIV_TO_REG(priv->tach_channel.divisor) > + << TACH_ASPEED_CLK_DIV_BIT), > + priv->base + TACH_ASPEED_CTRL); > + break; > + case hwmon_fan_pulses: > + priv->tach_channel.pulse_pr = val; The ABI says for the pulses atribute: Should only be created if the chip has a register to configure the number of pulses. In the absence of such a register (and thus attribute) the value assumed by all devices is 2 pulses per fan revolution. I see no evidence that there is a chip register for the number of pulses. Please drop this attribute. > + break; > + default: > + return -EOPNOTSUPP; > + } > + > + return 0; > +} > + > +static umode_t aspeed_tach_dev_is_visible(const void *drvdata, > + enum hwmon_sensor_types type, > + u32 attr, int channel) > +{ > + const struct aspeed_tach_data *priv = drvdata; > + > + if (!priv->tach_present) > + return 0; What is the point of instantiating the driver in this case ? > + switch (attr) { > + case hwmon_fan_input: > + return 0444; > + case hwmon_fan_div: > + case hwmon_fan_pulses: > + return 0644; > + } > + return 0; > +} > + > +static const struct hwmon_ops aspeed_tach_ops = { > + .is_visible = aspeed_tach_dev_is_visible, > + .read = aspeed_tach_hwmon_read, > + .write = aspeed_tach_hwmon_write, > +}; > + > +static const struct hwmon_channel_info *aspeed_tach_info[] = { > + HWMON_CHANNEL_INFO(fan, HWMON_F_INPUT | HWMON_F_DIV | HWMON_F_PULSES), > + NULL > +}; > + > +static const struct hwmon_chip_info aspeed_tach_chip_info = { > + .ops = &aspeed_tach_ops, > + .info = aspeed_tach_info, > +}; > + > +static void aspeed_present_fan_tach(struct aspeed_tach_data *priv) > +{ > + priv->tach_present = true; > + priv->tach_channel.divisor = DEFAULT_TACH_DIV; > + priv->tach_channel.pulse_pr = DEFAULT_FAN_PULSE_PR; > + > + writel((readl(priv->base + TACH_ASPEED_CTRL) & > + ~(TACH_ASPEED_INVERS_LIMIT | TACH_ASPEED_DEBOUNCE_MASK | > + TACH_ASPEED_IO_EDGE_MASK | TACH_ASPEED_CLK_DIV_T_MASK | > + TACH_ASPEED_THRESHOLD_MASK)) | > + ((DEBOUNCE_3_CLK << TACH_ASPEED_DEBOUNCE_BIT) | > + F2F_EDGES | > + (DIV_TO_REG(priv->tach_channel.divisor) > + << TACH_ASPEED_CLK_DIV_BIT)), > + priv->base + TACH_ASPEED_CTRL); > + > + aspeed_tach_ch_enable(priv, true); > +} > + > +static void aspeed_tach_reset_assert(void *data) > +{ > + struct reset_control *rst = data; > + > + reset_control_assert(rst); > +} > + > +static int aspeed_tach_probe(struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + struct aspeed_tach_data *priv; > + struct device *hwmon; > + int ret; > + > + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); > + if (!priv) > + return -ENOMEM; > + priv->dev = &pdev->dev; > + priv->base = devm_platform_ioremap_resource(pdev, 0); > + if (IS_ERR(priv->base)) > + return PTR_ERR(priv->base); > + priv->clk = devm_clk_get_enabled(dev, NULL); > + if (IS_ERR(priv->clk)) > + return dev_err_probe(dev, PTR_ERR(priv->clk), > + "Couldn't get clock\n"); > + > + priv->clk_source = clk_get_rate(priv->clk); > + priv->reset = devm_reset_control_get_shared(dev, NULL); > + if (IS_ERR(priv->reset)) > + return dev_err_probe(dev, PTR_ERR(priv->reset), > + "Couldn't get reset control\n"); > + > + ret = reset_control_deassert(priv->reset); > + if (ret) > + return dev_err_probe(dev, ret, > + "Couldn't deassert reset control\n"); > + > + ret = devm_add_action_or_reset(dev, aspeed_tach_reset_assert, > + priv->reset); > + if (ret) > + return ret; > + > + aspeed_present_fan_tach(priv); > + > + hwmon = devm_hwmon_device_register_with_info(dev, "aspeed_tach", priv, > + &aspeed_tach_chip_info, NULL); > + ret = PTR_ERR_OR_ZERO(hwmon); > + if (ret) > + return dev_err_probe(dev, ret, > + "Failed to register hwmon device\n"); > + return 0; > +} > + > +static const struct of_device_id of_stach_match_table[] = { > + { > + .compatible = "aspeed,ast2600-tach", > + }, > + {}, > +}; > +MODULE_DEVICE_TABLE(of, of_stach_match_table); > + > +static struct platform_driver aspeed_tach_driver = { > + .probe = aspeed_tach_probe, > + .driver = { > + .name = "aspeed_tach", > + .of_match_table = of_stach_match_table, > + }, > +}; > + > +module_platform_driver(aspeed_tach_driver); > + > +MODULE_AUTHOR("Billy Tsai <billy_tsai@aspeedtech.com>"); > +MODULE_DESCRIPTION("Aspeed ast2600 TACH device driver"); > +MODULE_LICENSE("GPL");
On 08/06/2023 04:18, Billy Tsai wrote: > Unlike the old design that the register setting of the TACH should based > on the configure of the PWM. In ast26xx, the dependency between pwm and > tach controller is eliminated and becomes a separate hardware block. One > is used to provide pwm output and another is used to monitor the frequency > of the input. Therefore, this patch serials implements them by writing the > two driver "pwm-aspeed-ast2600.c" and "tach-aspeed-ast2600.c". The former > is following the pwm subsystem which can apply the existed driver to > controller the fan(pwm-fan.c), beeper(pwm-beeper.c) and so on. The latter > is following the sysfs interface of hwmon to creat the node for fan > monitor. You like to ignore my comments... How did you implement them? Go one by one - answer to v4 emails. Best regards, Krzysztof
On Thu, Jun 08, 2023 at 10:18:38AM +0800, Billy Tsai wrote: [...] > diff --git a/drivers/pwm/pwm-aspeed-ast2600.c b/drivers/pwm/pwm-aspeed-ast2600.c [...] > +/* PWM Control Register */ > +#define PWM_ASPEED_CTRL (0x00) [...] > +#define PWM_ASPEED_DUTY_CYCLE (0x04) Guenther already mentioned this, but these parentheses are unnecessary. > +struct aspeed_pwm_data { > + struct pwm_chip chip; > + struct clk *clk; > + void __iomem *base; > + struct reset_control *reset; > + unsigned long clk_source; The name is a bit unfortunate. Looking at the code this represent the rate of the parent clock, so something like clk_rate would be more appropriate. > +}; > + > +static inline struct aspeed_pwm_data * > +aspeed_pwm_chip_to_data(struct pwm_chip *chip) > +{ > + return container_of(chip, struct aspeed_pwm_data, chip); > +} > + > +static int aspeed_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, > + struct pwm_state *state) > +{ > + struct device *dev = chip->dev; You seem to use this exactly once, in a debug message, so having the extra local variable seems a bit overkill. No strong objection, though. > + struct aspeed_pwm_data *priv = aspeed_pwm_chip_to_data(chip); > + bool polarity, pin_en, clk_en; A tab seems to have snuck in here. > + u32 duty_pt, val; > + u64 div_h, div_l, duty_cycle_period, dividend; > + > + val = readl(priv->base + PWM_ASPEED_CTRL); > + polarity = FIELD_GET(PWM_ASPEED_CTRL_INVERSE, val); > + pin_en = FIELD_GET(PWM_ASPEED_CTRL_PIN_ENABLE, val); > + clk_en = FIELD_GET(PWM_ASPEED_CTRL_CLK_ENABLE, val); > + div_h = FIELD_GET(PWM_ASPEED_CTRL_CLK_DIV_H, val); > + div_l = FIELD_GET(PWM_ASPEED_CTRL_CLK_DIV_L, val); > + val = readl(priv->base + PWM_ASPEED_DUTY_CYCLE); > + duty_pt = FIELD_GET(PWM_ASPEED_DUTY_CYCLE_FALLING_POINT, val); > + duty_cycle_period = FIELD_GET(PWM_ASPEED_DUTY_CYCLE_PERIOD, val); > + > + /* > + * This multiplication doesn't overflow, the upper bound is > + * 1000000000 * 256 * 256 << 15 = 0x1dcd650000000000 > + */ > + dividend = (u64)NSEC_PER_SEC * (div_l + 1) * (duty_cycle_period + 1) > + << div_h; > + state->period = DIV_ROUND_UP_ULL(dividend, priv->clk_source); > + > + if (clk_en && duty_pt) { > + dividend = (u64)NSEC_PER_SEC * (div_l + 1) * duty_pt > + << div_h; > + state->duty_cycle = > + DIV_ROUND_UP_ULL(dividend, priv->clk_source); > + } else { > + state->duty_cycle = clk_en ? state->period : 0; > + } > + state->polarity = polarity ? PWM_POLARITY_INVERSED : PWM_POLARITY_NORMAL; > + state->enabled = pin_en; > + dev_dbg(dev, "get period: %lldns, duty_cycle: %lldns", state->period, > + state->duty_cycle); How likely are you to ever use this again? And how useful will that be? We've got debugfs support that will show this information and more. > + return 0; > +} > + > +static int aspeed_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, > + const struct pwm_state *state) > +{ > + struct device *dev = chip->dev; > + struct aspeed_pwm_data *priv = aspeed_pwm_chip_to_data(chip); > + u32 duty_pt; > + u64 div_h, div_l, divisor, expect_period; > + bool clk_en; > + > + expect_period = min(div64_u64(ULLONG_MAX, (u64)priv->clk_source), > + state->period); > + dev_dbg(dev, "expect period: %lldns, duty_cycle: %lldns", expect_period, > + state->duty_cycle); > + /* > + * Pick the smallest value for div_h so that div_l can be the biggest > + * which results in a finer resolution near the target period value. > + */ > + divisor = (u64)NSEC_PER_SEC * (PWM_ASPEED_FIXED_PERIOD + 1) * > + (FIELD_MAX(PWM_ASPEED_CTRL_CLK_DIV_L) + 1); > + div_h = order_base_2(DIV64_U64_ROUND_UP(priv->clk_source * expect_period, divisor)); > + if (div_h > 0xf) > + div_h = 0xf; > + > + divisor = ((u64)NSEC_PER_SEC * (PWM_ASPEED_FIXED_PERIOD + 1)) << div_h; > + div_l = div64_u64(priv->clk_source * expect_period, divisor); > + > + if (div_l == 0) > + return -ERANGE; > + > + div_l -= 1; > + > + if (div_l > 255) > + div_l = 255; > + > + dev_dbg(dev, "clk source: %ld div_h %lld, div_l : %lld\n", > + priv->clk_source, div_h, div_l); > + /* duty_pt = duty_cycle * (PERIOD + 1) / period */ > + duty_pt = div64_u64(state->duty_cycle * priv->clk_source, > + (u64)NSEC_PER_SEC * (div_l + 1) << div_h); > + dev_dbg(dev, "duty_cycle = %lld, duty_pt = %d\n", state->duty_cycle, > + duty_pt); > + > + /* > + * Fixed DUTY_CYCLE_PERIOD to its max value to get a > + * fine-grained resolution for duty_cycle at the expense of a > + * coarser period resolution. > + */ > + writel((readl(priv->base + PWM_ASPEED_DUTY_CYCLE) & > + ~(PWM_ASPEED_DUTY_CYCLE_PERIOD)) | > + FIELD_PREP(PWM_ASPEED_DUTY_CYCLE_PERIOD, > + PWM_ASPEED_FIXED_PERIOD), > + priv->base + PWM_ASPEED_DUTY_CYCLE); This is completely unreadable. Use a temporary variable to split this up. > + > + if (duty_pt == 0) { > + /* emit inactive level and assert the duty counter reset */ > + clk_en = 0; > + } else { > + clk_en = 1; > + if (duty_pt >= (PWM_ASPEED_FIXED_PERIOD + 1)) > + duty_pt = 0; > + writel((readl(priv->base + PWM_ASPEED_DUTY_CYCLE) & > + ~(PWM_ASPEED_DUTY_CYCLE_RISING_POINT | > + PWM_ASPEED_DUTY_CYCLE_FALLING_POINT)) | > + FIELD_PREP(PWM_ASPEED_DUTY_CYCLE_FALLING_POINT, > + duty_pt), > + priv->base + PWM_ASPEED_DUTY_CYCLE); Same here ... > + } > + > + writel((readl(priv->base + PWM_ASPEED_CTRL) & > + ~(PWM_ASPEED_CTRL_CLK_DIV_H | PWM_ASPEED_CTRL_CLK_DIV_L | > + PWM_ASPEED_CTRL_PIN_ENABLE | PWM_ASPEED_CTRL_CLK_ENABLE | > + PWM_ASPEED_CTRL_INVERSE)) | > + FIELD_PREP(PWM_ASPEED_CTRL_CLK_DIV_H, div_h) | > + FIELD_PREP(PWM_ASPEED_CTRL_CLK_DIV_L, div_l) | > + FIELD_PREP(PWM_ASPEED_CTRL_PIN_ENABLE, state->enabled) | > + FIELD_PREP(PWM_ASPEED_CTRL_CLK_ENABLE, clk_en) | > + FIELD_PREP(PWM_ASPEED_CTRL_INVERSE, state->polarity), > + priv->base + PWM_ASPEED_CTRL); ... and here. > + > + return 0; > +} > + > +static const struct pwm_ops aspeed_pwm_ops = { > + .apply = aspeed_pwm_apply, > + .get_state = aspeed_pwm_get_state, > + .owner = THIS_MODULE, > +}; > + > +static void aspeed_pwm_reset_assert(void *data) > +{ > + struct reset_control *rst = data; > + > + reset_control_assert(rst); > +} > + > +static void aspeed_pwm_chip_remove(void *data) > +{ > + struct pwm_chip *chip = data; > + > + pwmchip_remove(chip); > +} Erm... no. > +static int aspeed_pwm_probe(struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + int ret; > + struct aspeed_pwm_data *priv; > + > + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); > + if (!priv) > + return -ENOMEM; > + > + priv->base = devm_platform_ioremap_resource(pdev, 0); > + if (IS_ERR(priv->base)) > + return PTR_ERR(priv->base); > + > + priv->clk = devm_clk_get_enabled(dev, NULL); > + if (IS_ERR(priv->clk)) > + return dev_err_probe(dev, PTR_ERR(priv->clk), > + "Couldn't get clock\n"); > + priv->clk_source = clk_get_rate(priv->clk); > + priv->reset = devm_reset_control_get_shared(dev, NULL); > + if (IS_ERR(priv->reset)) > + return dev_err_probe(dev, PTR_ERR(priv->reset), > + "Couldn't get reset control\n"); > + > + ret = reset_control_deassert(priv->reset); > + if (ret) > + return dev_err_probe(dev, ret, > + "Couldn't deassert reset control\n"); > + > + ret = devm_add_action_or_reset(dev, aspeed_pwm_reset_assert, > + priv->reset); > + if (ret) > + return ret; So now you need that extra callback that you defined earlier plus these four lines of code in order to ... > + > + priv->chip.dev = dev; > + priv->chip.ops = &aspeed_pwm_ops; > + priv->chip.npwm = 1; > + > + ret = pwmchip_add(&priv->chip); > + if (ret < 0) > + return dev_err_probe(dev, ret, "Failed to add PWM chip\n"); ... avoid calling reset_control_assert() once here? These device- managed functions are meant to help simplify things, but there's nothing complicated about it in this driver, so don't do it. > + ret = devm_add_action_or_reset(dev, aspeed_pwm_chip_remove, > + &priv->chip); > + if (ret) > + return ret; Why not just use the driver's .remove() callback? There's nothing here that would fail afterwards, so this will effectively get called only during driver removal, so might as well use the idiomatic infrastructure that exists for this. > + return 0; > +} > + > +static const struct of_device_id of_pwm_match_table[] = { That's a suboptimal name. Use a driver-specific prefix. > + { > + .compatible = "aspeed,ast2600-pwm", > + }, > + {}, > +}; > +MODULE_DEVICE_TABLE(of, of_pwm_match_table); > + > +static struct platform_driver aspeed_pwm_driver = { > + .probe = aspeed_pwm_probe, > + .driver = { There's another tab that doesn't belong here. Thierry