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[net-next,v3,00/47,RFT] net: dpaa: Convert to phylink

Message ID 20220715215954.1449214-1-sean.anderson@seco.com
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Series net: dpaa: Convert to phylink | expand

Message

Sean Anderson July 15, 2022, 9:59 p.m. UTC
This series converts the DPAA driver to phylink. Additionally,
it also adds a serdes driver to allow for dynamic reconfiguration
between 1g and 10g interfaces (such as in an SFP+ slot). These changes
are submitted together for this RFT, but they will eventually be
submitted separately to the appropriate subsystem maintainers.

I have tried to maintain backwards compatibility with existing device
trees whereever possible. However, one area where I was unable to
achieve this was with QSGMII. Please refer to patch 4 for details.

All mac drivers have now been converted. I would greatly appreciate if
anyone has QorIQ boards they can test/debug this series on. I only have an
LS1046ARDB. Everything but QSGMII should work without breakage; QSGMII
needs patches 42 and 43.

The serdes driver is mostly functional (except for XFI). This series
only adds support for the LS1046ARDB SerDes (and untested LS1088ARDB),
but it should be fairly straightforward to add support for other SoCs
and boards (see Documentation/driver-api/phy/qoriq.rst).

This is the last spin of this series with all patches included. After next
week (depending on feedback) I will resend the patches broken up as
follows:
- 5: 1000BASE-KX support
- 1, 6, 44, 45: Lynx 10G support
- 7-10, 12-14: Phy rate adaptation support
- 2-4, 15-43, 46, 47: DPAA phylink conversion

Patches 15-19 were first submitted as [1].

[1] https://lore.kernel.org/netdev/20220531195851.1592220-1-sean.anderson@seco.com/

Changes in v3:
- Manually expand yaml references
- Add mode configuration to device tree
- Expand pcs-handle to an array
- Incorperate some minor changes into the first FMan binding commit
- Add vendor prefix 'fsl,' to rgmii and mii properties.
- Set maxItems for pcs-names
- Remove phy-* properties from example because dt-schema complains and I
  can't be bothered to figure out how to make it work.
- Add pcs-handle as a preferred version of pcsphy-handle
- Deprecate pcsphy-handle
- Remove mii/rmii properties
- Add 1000BASE-KX interface mode
- Rename remaining references to QorIQ SerDes to Lynx 10G
- Fix PLL enable sequence by waiting for our reset request to be cleared
  before continuing. Do the same for the lock, even though it isn't as
  critical. Because we will delay for 1.5ms on average, use prepare
  instead of enable so we can sleep.
- Document the status of each protocol
- Fix offset of several bitfields in RECR0
- Take into account PLLRST_B, SDRST_B, and SDEN when considering whether
  a PLL is "enabled."
- Only power off unused lanes.
- Split mode lane mask into first/last lane (like group)
- Read modes from device tree
- Use caps to determine whether KX/KR are supported
- Move modes to lynx_priv
- Ensure that the protocol controller is not already in-use when we try
  to configure a new mode. This should only occur if the device tree is
  misconfigured (e.g. when QSGMII is selected on two lanes but there is
  only one QSGMII controller).
- Split PLL drivers off into their own file
- Add clock for "ext_dly" instead of writing the bit directly (and
  racing with any clock code).
- Use kasprintf instead of open-coding the snprintf dance
- Support 1000BASE-KX in lynx_lookup_proto. This still requires PCS
  support, so nothing is truly "enabled" yet.
- Add support for phy rate adaptation
- Support differing link speeds and interface speeds
- Adjust advertisement based on rate adaptation
- Adjust link settings based on rate adaptation
- Add support for CRS-based rate adaptation
- Add support for AQR115
- Add some additional phy interfaces
- Add support for aquantia rate adaptation
- Put the PCS mdiodev only after we are done with it (since the PCS
  does not perform a get itself).
- Remove _return label from memac_initialization in favor of returning
  directly
- Fix grabbing the default PCS not checking for -ENODATA from
  of_property_match_string
- Set DTSEC_ECNTRL_R100M in dtsec_link_up instead of dtsec_mac_config
- Remove rmii/mii properties
- Replace 1000Base... with 1000BASE... to match IEEE capitalization
- Add compatibles for QSGMII PCSs
- Split arm and powerpcs dts updates
- Describe modes in device tree
- ls1088a: Add serdes bindings

Changes in v2:
- Rename to fsl,lynx-10g.yaml
- Refer to the device in the documentation, rather than the binding
- Move compatible first
- Document phy cells in the description
- Allow a value of 1 for phy-cells. This allows for compatibility with
  the similar (but according to Ioana Ciornei different enough) lynx-28g
  binding.
- Remove minItems
- Use list for clock-names
- Fix example binding having too many cells in regs
- Add #clock-cells. This will allow using assigned-clocks* to configure
  the PLLs.
- Document the structure of the compatible strings
- Convert FMan MAC bindings to yaml
- Better document how we select which PCS to use in the default case
- Rename driver to Lynx 10G (etc.)
- Fix not clearing group->pll after disabling it
- Support 1 and 2 phy-cells
- Power off lanes during probe
- Clear SGMIIaCR1_PCS_EN during probe
- Rename LYNX_PROTO_UNKNOWN to LYNX_PROTO_NONE
- Handle 1000BASE-KX in lynx_proto_mode_prep
- Remove some unused variables
- Fix prototype for dtsec_initialization
- Fix warning if sizeof(void *) != sizeof(resource_size_t)
- Specify type of mac_dev for exception_cb
- Add helper for sanity checking cgr ops
- Add CGR update function
- Adjust queue depth on rate change
- Move PCS_LYNX dependency to fman Kconfig
- Remove unused variable slow_10g_if
- Restrict valid link modes based on the phy interface. This is easier
  to set up, and mostly captures what I intended to do the first time.
  We now have a custom validate which restricts half-duplex for some SoCs
  for RGMII, but generally just uses the default phylink validate.
- Configure the SerDes in enable/disable
- Properly implement all ethtool ops and ioctls. These were mostly
  stubbed out just enough to compile last time.
- Convert 10GEC and dTSEC as well
- Fix capitalization of mEMAC in commit messages
- Add nodes for QSGMII PCSs
- Add nodes for QSGMII PCSs
- Use one phy cell for SerDes1, since no lanes can be grouped
- Disable SerDes by default to prevent breaking boards inadvertently.

Sean Anderson (47):
  dt-bindings: phy: Add Lynx 10G phy binding
  dt-bindings: net: Expand pcs-handle to an array
  dt-bindings: net: Convert FMan MAC bindings to yaml
  dt-bindings: net: fman: Add additional interface properties
  net: phy: Add 1000BASE-KX interface mode
  [RFT] phy: fsl: Add Lynx 10G SerDes driver
  net: phy: Add support for rate adaptation
  net: phylink: Support differing link speeds and interface speeds
  net: phylink: Adjust advertisement based on rate adaptation
  net: phylink: Adjust link settings based on rate adaptation
  [RFC] net: phylink: Add support for CRS-based rate adaptation
  net: phy: aquantia: Add support for AQR115
  net: phy: aquantia: Add some additional phy interfaces
  net: phy: aquantia: Add support for rate adaptation
  net: fman: Convert to SPDX identifiers
  net: fman: Don't pass comm_mode to enable/disable
  net: fman: Store en/disable in mac_device instead of mac_priv_s
  net: fman: dtsec: Always gracefully stop/start
  net: fman: Get PCS node in per-mac init
  net: fman: Store initialization function in match data
  net: fman: Move struct dev to mac_device
  net: fman: Configure fixed link in memac_initialization
  net: fman: Export/rename some common functions
  net: fman: memac: Use params instead of priv for max_speed
  net: fman: Move initialization to mac-specific files
  net: fman: Mark mac methods static
  net: fman: Inline several functions into initialization
  net: fman: Remove internal_phy_node from params
  net: fman: Map the base address once
  net: fman: Pass params directly to mac init
  net: fman: Use mac_dev for some params
  net: fman: Specify type of mac_dev for exception_cb
  net: fman: Clean up error handling
  net: fman: Change return type of disable to void
  net: dpaa: Use mac_dev variable in dpaa_netdev_init
  soc: fsl: qbman: Add helper for sanity checking cgr ops
  soc: fsl: qbman: Add CGR update function
  net: dpaa: Adjust queue depth on rate change
  net: fman: memac: Add serdes support
  net: fman: memac: Use lynx pcs driver
  [RFT] net: dpaa: Convert to phylink
  powerpc: dts: qoriq: Add nodes for QSGMII PCSs
  arm64: dts: layerscape: Add nodes for QSGMII PCSs
  arm64: dts: ls1046a: Add serdes bindings
  arm64: dts: ls1088a: Add serdes bindings
  arm64: dts: ls1046ardb: Add serdes bindings
  [WIP] arm64: dts: ls1088ardb: Add serdes bindings

 .../bindings/net/dsa/renesas,rzn1-a5psw.yaml  |    1 +
 .../bindings/net/ethernet-controller.yaml     |   10 +-
 .../bindings/net/fsl,fman-dtsec.yaml          |  172 +++
 .../bindings/net/fsl,qoriq-mc-dpmac.yaml      |    2 +-
 .../devicetree/bindings/net/fsl-fman.txt      |  133 +-
 .../devicetree/bindings/phy/fsl,lynx-10g.yaml |  311 ++++
 Documentation/driver-api/phy/index.rst        |    1 +
 Documentation/driver-api/phy/lynx_10g.rst     |   73 +
 MAINTAINERS                                   |    6 +
 .../boot/dts/freescale/fsl-ls1043-post.dtsi   |   24 +
 .../boot/dts/freescale/fsl-ls1046-post.dtsi   |   25 +
 .../boot/dts/freescale/fsl-ls1046a-rdb.dts    |   34 +
 .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi |  179 +++
 .../boot/dts/freescale/fsl-ls1088a-rdb.dts    |   87 ++
 .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi |   96 ++
 .../fsl/qoriq-fman3-0-10g-0-best-effort.dtsi  |    3 +-
 .../boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi     |   10 +-
 .../fsl/qoriq-fman3-0-10g-1-best-effort.dtsi  |   10 +-
 .../boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi     |   10 +-
 .../boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi      |    3 +-
 .../boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi      |   10 +-
 .../boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi      |   10 +-
 .../boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi      |   10 +-
 .../boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi      |    3 +-
 .../boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi      |   10 +-
 .../boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi     |   10 +-
 .../boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi     |   10 +-
 .../boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi      |    3 +-
 .../boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi      |   10 +-
 .../boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi      |   10 +-
 .../boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi      |   10 +-
 .../boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi      |    3 +-
 .../boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi      |   10 +-
 drivers/net/ethernet/freescale/dpaa/Kconfig   |    4 +-
 .../net/ethernet/freescale/dpaa/dpaa_eth.c    |  132 +-
 .../ethernet/freescale/dpaa/dpaa_eth_sysfs.c  |    2 +-
 .../ethernet/freescale/dpaa/dpaa_ethtool.c    |   90 +-
 drivers/net/ethernet/freescale/fman/Kconfig   |    4 +-
 drivers/net/ethernet/freescale/fman/fman.c    |   31 +-
 drivers/net/ethernet/freescale/fman/fman.h    |   31 +-
 .../net/ethernet/freescale/fman/fman_dtsec.c  |  674 ++++-----
 .../net/ethernet/freescale/fman/fman_dtsec.h  |   58 +-
 .../net/ethernet/freescale/fman/fman_keygen.c |   29 +-
 .../net/ethernet/freescale/fman/fman_keygen.h |   29 +-
 .../net/ethernet/freescale/fman/fman_mac.h    |   34 +-
 .../net/ethernet/freescale/fman/fman_memac.c  |  864 +++++------
 .../net/ethernet/freescale/fman/fman_memac.h  |   57 +-
 .../net/ethernet/freescale/fman/fman_muram.c  |   31 +-
 .../net/ethernet/freescale/fman/fman_muram.h  |   32 +-
 .../net/ethernet/freescale/fman/fman_port.c   |   29 +-
 .../net/ethernet/freescale/fman/fman_port.h   |   29 +-
 drivers/net/ethernet/freescale/fman/fman_sp.c |   29 +-
 drivers/net/ethernet/freescale/fman/fman_sp.h |   28 +-
 .../net/ethernet/freescale/fman/fman_tgec.c   |  274 ++--
 .../net/ethernet/freescale/fman/fman_tgec.h   |   54 +-
 drivers/net/ethernet/freescale/fman/mac.c     |  653 +--------
 drivers/net/ethernet/freescale/fman/mac.h     |   66 +-
 drivers/net/phy/aquantia_main.c               |   86 +-
 drivers/net/phy/phy.c                         |   21 +
 drivers/net/phy/phylink.c                     |  161 +-
 drivers/phy/freescale/Kconfig                 |   20 +
 drivers/phy/freescale/Makefile                |    3 +
 drivers/phy/freescale/lynx-10g.h              |   36 +
 drivers/phy/freescale/phy-fsl-lynx-10g-clk.c  |  438 ++++++
 drivers/phy/freescale/phy-fsl-lynx-10g.c      | 1297 +++++++++++++++++
 drivers/soc/fsl/qbman/qman.c                  |   76 +-
 include/linux/phy.h                           |   42 +
 include/linux/phylink.h                       |   12 +-
 include/soc/fsl/qman.h                        |    9 +
 69 files changed, 4408 insertions(+), 2356 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml
 create mode 100644 Documentation/devicetree/bindings/phy/fsl,lynx-10g.yaml
 create mode 100644 Documentation/driver-api/phy/lynx_10g.rst
 create mode 100644 drivers/phy/freescale/lynx-10g.h
 create mode 100644 drivers/phy/freescale/phy-fsl-lynx-10g-clk.c
 create mode 100644 drivers/phy/freescale/phy-fsl-lynx-10g.c

Comments

Camelia Groza July 21, 2022, 1:48 p.m. UTC | #1
> -----Original Message-----
> From: Linuxppc-dev <linuxppc-dev-
> bounces+camelia.groza=nxp.com@lists.ozlabs.org> On Behalf Of Sean
> Anderson
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: devicetree@vger.kernel.org; Leo Li <leoyang.li@nxp.com>; Sean
> Anderson <sean.anderson@seco.com>; linuxppc-dev@lists.ozlabs.org;
> Russell King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Eric
> Dumazet <edumazet@google.com>; Rob Herring <robh+dt@kernel.org>;
> Paul Mackerras <paulus@samba.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Paolo Abeni <pabeni@redhat.com>;
> Shawn Guo <shawnguo@kernel.org>; linux-arm-kernel@lists.infradead.org
> Subject: [PATCH net-next v3 42/47] powerpc: dts: qoriq: Add nodes for
> QSGMII PCSs
> 
> Now that we actually read registers from QSGMII PCSs, it's important
> that we have the correct address (instead of hoping that we're the MAC
> with all the QSGMII PCSs on its bus). This adds nodes for the QSGMII
> PCSs. They have the same addresses on all SoCs (e.g. if QSGMIIA is
> present it's used for MACs 1 through 4).
> 
> Since the first QSGMII PCSs share an address with the SGMII and XFI
> PCSs, we only add new nodes for PCSs 2-4. This avoids address conflicts
> on the bus.
> 
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>

MAC1 and MAC2 can be XFI on T2080. This needs to be reflected in qoriq-fman3-0-1g-0.dtsi
and qoriq-fman3-0-1g-1.dtsi

The two associated netdevs fail to probe on a T2080RDB without "xfi" added to the pcs-names:
fsl_dpaa_mac ffe4e0000.ethernet (unnamed net_device) (uninitialized): failed to validate link configuration for in-band status
fsl_dpaa_mac ffe4e0000.ethernet: error -EINVAL: Could not create phylink
fsl_dpa: probe of dpaa-ethernet.0 failed with error -22

> ---
> 
> Changes in v3:
> - Add compatibles for QSGMII PCSs
> - Split arm and powerpcs dts updates
> 
> Changes in v2:
> - New
> 
>  .../boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi  |  3 ++-
>  arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi     | 10 +++++++++-
>  .../boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi  | 10 +++++++++-
>  arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi     | 10 +++++++++-
>  arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi      |  3 ++-
>  arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi      | 10 +++++++++-
>  arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi      | 10 +++++++++-
>  arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi      | 10 +++++++++-
>  arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi      |  3 ++-
>  arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi      | 10 +++++++++-
>  arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi     | 10 +++++++++-
>  arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi     | 10 +++++++++-
>  arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi      |  3 ++-
>  arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi      | 10 +++++++++-
>  arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi      | 10 +++++++++-
>  arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi      | 10 +++++++++-
>  arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi      |  3 ++-
>  arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi      | 10 +++++++++-
>  18 files changed, 127 insertions(+), 18 deletions(-)
> 
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
> index baa0c503e741..db169d630db3 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
> @@ -55,7 +55,8 @@ ethernet@e0000 {
>  		reg = <0xe0000 0x1000>;
>  		fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
>  		ptp-timer = <&ptp_timer0>;
> -		pcsphy-handle = <&pcsphy0>;
> +		pcsphy-handle = <&pcsphy0>, <&pcsphy0>;
> +		pcs-names = "sgmii", "qsgmii";
>  	};
> 
>  	mdio@e1000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
> index 93095600e808..e80ad8675be8 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
> @@ -52,7 +52,15 @@ ethernet@f0000 {
>  		compatible = "fsl,fman-memac";
>  		reg = <0xf0000 0x1000>;
>  		fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>;
> -		pcsphy-handle = <&pcsphy6>;
> +		pcsphy-handle = <&pcsphy6>, <&qsgmiib_pcs2>,
> <&pcsphy6>;
> +		pcs-names = "sgmii", "qsgmii", "xfi";
> +	};
> +
> +	mdio@e9000 {
> +		qsgmiib_pcs2: ethernet-pcs@2 {
> +			compatible = "fsl,lynx-pcs";
> +			reg = <2>;
> +		};
>  	};
> 
>  	mdio@f1000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
> index ff4bd38f0645..6a6f51842ad5 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
> @@ -55,7 +55,15 @@ ethernet@e2000 {
>  		reg = <0xe2000 0x1000>;
>  		fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
>  		ptp-timer = <&ptp_timer0>;
> -		pcsphy-handle = <&pcsphy1>;
> +		pcsphy-handle = <&pcsphy1>, <&qsgmiia_pcs1>;
> +		pcs-names = "sgmii", "qsgmii";
> +	};
> +
> +	mdio@e1000 {
> +		qsgmiia_pcs1: ethernet-pcs@1 {
> +			compatible = "fsl,lynx-pcs";
> +			reg = <1>;
> +		};
>  	};
> 
>  	mdio@e3000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
> index 1fa38ed6f59e..543da5493e40 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
> @@ -52,7 +52,15 @@ ethernet@f2000 {
>  		compatible = "fsl,fman-memac";
>  		reg = <0xf2000 0x1000>;
>  		fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>;
> -		pcsphy-handle = <&pcsphy7>;
> +		pcsphy-handle = <&pcsphy7>, <&qsgmiib_pcs3>,
> <&pcsphy7>;
> +		pcs-names = "sgmii", "qsgmii", "xfi";
> +	};
> +
> +	mdio@e9000 {
> +		qsgmiib_pcs3: ethernet-pcs@3 {
> +			compatible = "fsl,lynx-pcs";
> +			reg = <3>;
> +		};
>  	};
> 
>  	mdio@f3000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
> index a8cc9780c0c4..ce76725e6eb2 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
> @@ -51,7 +51,8 @@ ethernet@e0000 {
>  		reg = <0xe0000 0x1000>;
>  		fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
>  		ptp-timer = <&ptp_timer0>;
> -		pcsphy-handle = <&pcsphy0>;
> +		pcsphy-handle = <&pcsphy0>, <&pcsphy0>;
> +		pcs-names = "sgmii", "qsgmii";
>  	};
> 
>  	mdio@e1000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
> index 8b8bd70c9382..f3af67df4767 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
> @@ -51,7 +51,15 @@ ethernet@e2000 {
>  		reg = <0xe2000 0x1000>;
>  		fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
>  		ptp-timer = <&ptp_timer0>;
> -		pcsphy-handle = <&pcsphy1>;
> +		pcsphy-handle = <&pcsphy1>, <&qsgmiia_pcs1>;
> +		pcs-names = "sgmii", "qsgmii";
> +	};
> +
> +	mdio@e1000 {
> +		qsgmiia_pcs1: ethernet-pcs@1 {
> +			compatible = "fsl,lynx-pcs";
> +			reg = <1>;
> +		};
>  	};
> 
>  	mdio@e3000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
> index 619c880b54d8..f6d74de84bfe 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
> @@ -51,7 +51,15 @@ ethernet@e4000 {
>  		reg = <0xe4000 0x1000>;
>  		fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>;
>  		ptp-timer = <&ptp_timer0>;
> -		pcsphy-handle = <&pcsphy2>;
> +		pcsphy-handle = <&pcsphy2>, <&qsgmiia_pcs2>;
> +		pcs-names = "sgmii", "qsgmii";
> +	};
> +
> +	mdio@e1000 {
> +		qsgmiia_pcs2: ethernet-pcs@2 {
> +			compatible = "fsl,lynx-pcs";
> +			reg = <2>;
> +		};
>  	};
> 
>  	mdio@e5000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
> index d7ebb73a400d..6e091d8ae9e2 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
> @@ -51,7 +51,15 @@ ethernet@e6000 {
>  		reg = <0xe6000 0x1000>;
>  		fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>;
>  		ptp-timer = <&ptp_timer0>;
> -		pcsphy-handle = <&pcsphy3>;
> +		pcsphy-handle = <&pcsphy3>, <&qsgmiia_pcs3>;
> +		pcs-names = "sgmii", "qsgmii";
> +	};
> +
> +	mdio@e1000 {
> +		qsgmiia_pcs3: ethernet-pcs@3 {
> +			compatible = "fsl,lynx-pcs";
> +			reg = <3>;
> +		};
>  	};
> 
>  	mdio@e7000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
> index b151d696a069..e2174c0fc841 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
> @@ -51,7 +51,8 @@ ethernet@e8000 {
>  		reg = <0xe8000 0x1000>;
>  		fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;
>  		ptp-timer = <&ptp_timer0>;
> -		pcsphy-handle = <&pcsphy4>;
> +		pcsphy-handle = <&pcsphy4>, <&pcsphy4>;
> +		pcs-names = "sgmii", "qsgmii";
>  	};
> 
>  	mdio@e9000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
> index adc0ae0013a3..9106815bd63e 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
> @@ -51,7 +51,15 @@ ethernet@ea000 {
>  		reg = <0xea000 0x1000>;
>  		fsl,fman-ports = <&fman0_rx_0x0d &fman0_tx_0x2d>;
>  		ptp-timer = <&ptp_timer0>;
> -		pcsphy-handle = <&pcsphy5>;
> +		pcsphy-handle = <&pcsphy5>, <&qsgmiib_pcs1>;
> +		pcs-names = "sgmii", "qsgmii";
> +	};
> +
> +	mdio@e9000 {
> +		qsgmiib_pcs1: ethernet-pcs@1 {
> +			compatible = "fsl,lynx-pcs";
> +			reg = <1>;
> +		};
>  	};
> 
>  	mdio@eb000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
> index 435047e0e250..a3c1538dfda1 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
> @@ -52,7 +52,15 @@ ethernet@f0000 {
>  		compatible = "fsl,fman-memac";
>  		reg = <0xf0000 0x1000>;
>  		fsl,fman-ports = <&fman1_rx_0x10 &fman1_tx_0x30>;
> -		pcsphy-handle = <&pcsphy14>;
> +		pcsphy-handle = <&pcsphy14>, <&qsgmiid_pcs2>,
> <&pcsphy14>;
> +		pcs-names = "sgmii", "qsgmii", "xfi";
> +	};
> +
> +	mdio@e9000 {
> +		qsgmiid_pcs2: ethernet-pcs@2 {
> +			compatible = "fsl,lynx-pcs";
> +			reg = <2>;
> +		};
>  	};
> 
>  	mdio@f1000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
> index c098657cca0a..c024517e70d6 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
> @@ -52,7 +52,15 @@ ethernet@f2000 {
>  		compatible = "fsl,fman-memac";
>  		reg = <0xf2000 0x1000>;
>  		fsl,fman-ports = <&fman1_rx_0x11 &fman1_tx_0x31>;
> -		pcsphy-handle = <&pcsphy15>;
> +		pcsphy-handle = <&pcsphy15>, <&qsgmiid_pcs3>,
> <&pcsphy15>;
> +		pcs-names = "sgmii", "qsgmii", "xfi";
> +	};
> +
> +	mdio@e9000 {
> +		qsgmiid_pcs3: ethernet-pcs@3 {
> +			compatible = "fsl,lynx-pcs";
> +			reg = <3>;
> +		};
>  	};
> 
>  	mdio@f3000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
> index 9d06824815f3..16fb299f615a 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
> @@ -51,7 +51,8 @@ ethernet@e0000 {
>  		reg = <0xe0000 0x1000>;
>  		fsl,fman-ports = <&fman1_rx_0x08 &fman1_tx_0x28>;
>  		ptp-timer = <&ptp_timer1>;
> -		pcsphy-handle = <&pcsphy8>;
> +		pcsphy-handle = <&pcsphy8>, <&pcsphy8>;
> +		pcs-names = "sgmii", "qsgmii";
>  	};
> 
>  	mdio@e1000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
> index 70e947730c4b..75cecbef8469 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
> @@ -51,7 +51,15 @@ ethernet@e2000 {
>  		reg = <0xe2000 0x1000>;
>  		fsl,fman-ports = <&fman1_rx_0x09 &fman1_tx_0x29>;
>  		ptp-timer = <&ptp_timer1>;
> -		pcsphy-handle = <&pcsphy9>;
> +		pcsphy-handle = <&pcsphy9>, <&qsgmiic_pcs1>;
> +		pcs-names = "sgmii", "qsgmii";
> +	};
> +
> +	mdio@e1000 {
> +		qsgmiic_pcs1: ethernet-pcs@1 {
> +			compatible = "fsl,lynx-pcs";
> +			reg = <1>;
> +		};
>  	};
> 
>  	mdio@e3000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
> index ad96e6529595..98c1d27f17e7 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
> @@ -51,7 +51,15 @@ ethernet@e4000 {
>  		reg = <0xe4000 0x1000>;
>  		fsl,fman-ports = <&fman1_rx_0x0a &fman1_tx_0x2a>;
>  		ptp-timer = <&ptp_timer1>;
> -		pcsphy-handle = <&pcsphy10>;
> +		pcsphy-handle = <&pcsphy10>, <&qsgmiic_pcs2>;
> +		pcs-names = "sgmii", "qsgmii";
> +	};
> +
> +	mdio@e1000 {
> +		qsgmiic_pcs2: ethernet-pcs@2 {
> +			compatible = "fsl,lynx-pcs";
> +			reg = <2>;
> +		};
>  	};
> 
>  	mdio@e5000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
> index 034bc4b71f7a..203a00036f17 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
> @@ -51,7 +51,15 @@ ethernet@e6000 {
>  		reg = <0xe6000 0x1000>;
>  		fsl,fman-ports = <&fman1_rx_0x0b &fman1_tx_0x2b>;
>  		ptp-timer = <&ptp_timer1>;
> -		pcsphy-handle = <&pcsphy11>;
> +		pcsphy-handle = <&pcsphy11>, <&qsgmiic_pcs3>;
> +		pcs-names = "sgmii", "qsgmii";
> +	};
> +
> +	mdio@e1000 {
> +		qsgmiic_pcs3: ethernet-pcs@3 {
> +			compatible = "fsl,lynx-pcs";
> +			reg = <3>;
> +		};
>  	};
> 
>  	mdio@e7000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
> index 93ca23d82b39..9366935ebc02 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
> @@ -51,7 +51,8 @@ ethernet@e8000 {
>  		reg = <0xe8000 0x1000>;
>  		fsl,fman-ports = <&fman1_rx_0x0c &fman1_tx_0x2c>;
>  		ptp-timer = <&ptp_timer1>;
> -		pcsphy-handle = <&pcsphy12>;
> +		pcsphy-handle = <&pcsphy12>, <&pcsphy12>;
> +		pcs-names = "sgmii", "qsgmii";
>  	};
> 
>  	mdio@e9000 {
> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
> index 23b3117a2fd2..39f7c6133017 100644
> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
> @@ -51,7 +51,15 @@ ethernet@ea000 {
>  		reg = <0xea000 0x1000>;
>  		fsl,fman-ports = <&fman1_rx_0x0d &fman1_tx_0x2d>;
>  		ptp-timer = <&ptp_timer1>;
> -		pcsphy-handle = <&pcsphy13>;
> +		pcsphy-handle = <&pcsphy13>, <&qsgmiid_pcs1>;
> +		pcs-names = "sgmii", "qsgmii";
> +	};
> +
> +	mdio@e9000 {
> +		qsgmiid_pcs1: ethernet-pcs@1 {
> +			compatible = "fsl,lynx-pcs";
> +			reg = <1>;
> +		};
>  	};
> 
>  	mdio@eb000 {
> --
> 2.35.1.1320.gc452695387.dirty
Camelia Groza July 21, 2022, 2:20 p.m. UTC | #2
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 1:00
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>; Kishon Vijay Abraham I <kishon@ti.com>;
> Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Leo Li
> <leoyang.li@nxp.com>; Rob Herring <robh+dt@kernel.org>; Shawn Guo
> <shawnguo@kernel.org>; Vinod Koul <vkoul@kernel.org>;
> devicetree@vger.kernel.org; linux-phy@lists.infradead.org
> Subject: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
> bindings
> 
> This adds appropriate bindings for the macs which use the SerDes. The
> 156.25MHz fixed clock is a crystal. The 100MHz clocks (there are
> actually 3) come from a Renesas 6V49205B at address 69 on i2c0. There is
> no driver for this device (and as far as I know all you can do with the
> 100MHz clocks is gate them), so I have chosen to model it as a single
> fixed clock.
> 
> Note: the SerDes1 lane numbering for the LS1046A is *reversed*.
> This means that Lane A (what the driver thinks is lane 0) uses pins
> SD1_TX3_P/N.
> 
> Because this will break ethernet if the serdes is not enabled, enable
> the serdes driver by default on Layerscape.
> 
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
> Please let me know if there is a better/more specific config I can use
> here.
> 
> (no changes since v1)

My LS1046ARDB hangs at boot with this patch right after the second SerDes is probed,
right before the point where the PCI host bridge is registered. I can get around this
either by disabling the second SerDes node from the device tree, or disabling
CONFIG_PCI_LAYERSCAPE at build.

I haven't debugged it more but there seems to be an issue here.

>  .../boot/dts/freescale/fsl-ls1046a-rdb.dts    | 34 +++++++++++++++++++
>  drivers/phy/freescale/Kconfig                 |  1 +
>  2 files changed, 35 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
> b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
> index 7025aad8ae89..4f4dd0ed8c53 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
> @@ -26,6 +26,32 @@ aliases {
>  	chosen {
>  		stdout-path = "serial0:115200n8";
>  	};
> +
> +	clocks {
> +		clk_100mhz: clock-100mhz {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <100000000>;
> +		};
> +
> +		clk_156mhz: clock-156mhz {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <156250000>;
> +		};
> +	};
> +};
> +
> +&serdes1 {
> +	clocks = <&clk_100mhz>, <&clk_156mhz>;
> +	clock-names = "ref0", "ref1";
> +	status = "okay";
> +};
> +
> +&serdes2 {
> +	clocks = <&clk_100mhz>, <&clk_100mhz>;
> +	clock-names = "ref0", "ref1";
> +	status = "okay";
>  };
> 
>  &duart0 {
> @@ -140,21 +166,29 @@ ethernet@e6000 {
>  	ethernet@e8000 {
>  		phy-handle = <&sgmii_phy1>;
>  		phy-connection-type = "sgmii";
> +		phys = <&serdes1 1>;
> +		phy-names = "serdes";
>  	};
> 
>  	ethernet@ea000 {
>  		phy-handle = <&sgmii_phy2>;
>  		phy-connection-type = "sgmii";
> +		phys = <&serdes1 0>;
> +		phy-names = "serdes";
>  	};
> 
>  	ethernet@f0000 { /* 10GEC1 */
>  		phy-handle = <&aqr106_phy>;
>  		phy-connection-type = "xgmii";
> +		phys = <&serdes1 3>;
> +		phy-names = "serdes";
>  	};
> 
>  	ethernet@f2000 { /* 10GEC2 */
>  		fixed-link = <0 1 1000 0 0>;
>  		phy-connection-type = "xgmii";
> +		phys = <&serdes1 2>;
> +		phy-names = "serdes";
>  	};
> 
>  	mdio@fc000 {
> diff --git a/drivers/phy/freescale/Kconfig b/drivers/phy/freescale/Kconfig
> index fe2a3efe0ba4..9595666213d0 100644
> --- a/drivers/phy/freescale/Kconfig
> +++ b/drivers/phy/freescale/Kconfig
> @@ -43,6 +43,7 @@ config PHY_FSL_LYNX_10G
>  	tristate "Freescale Layerscale Lynx 10G SerDes support"
>  	select GENERIC_PHY
>  	select REGMAP_MMIO
> +	default y if ARCH_LAYERSCAPE
>  	help
>  	  This adds support for the Lynx "SerDes" devices found on various
> QorIQ
>  	  SoCs. There may be up to four SerDes devices on each SoC, and
> each
> --
> 2.35.1.1320.gc452695387.dirty
Camelia Groza July 21, 2022, 2:26 p.m. UTC | #3
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Saturday, July 16, 2022 0:59
> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
> <sean.anderson@seco.com>; Alexandru Marginean
> <alexandru.marginean@nxp.com>; Andrew Lunn <andrew@lunn.ch>;
> Benjamin Herrenschmidt <benh@kernel.crashing.org>; Heiner Kallweit
> <hkallweit1@gmail.com>; Ioana Ciornei <ioana.ciornei@nxp.com>; Jonathan
> Corbet <corbet@lwn.net>; Kishon Vijay Abraham I <kishon@ti.com>;
> Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Leo Li
> <leoyang.li@nxp.com>; Michael Ellerman <mpe@ellerman.id.au>; Paul
> Mackerras <paulus@samba.org>; Rob Herring <robh+dt@kernel.org>;
> Shawn Guo <shawnguo@kernel.org>; Vinod Koul <vkoul@kernel.org>;
> Vladimir Oltean <olteanv@gmail.com>; devicetree@vger.kernel.org; linux-
> doc@vger.kernel.org; linux-phy@lists.infradead.org; linuxppc-
> dev@lists.ozlabs.org
> Subject: [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink
> 
> This series converts the DPAA driver to phylink. Additionally,
> it also adds a serdes driver to allow for dynamic reconfiguration
> between 1g and 10g interfaces (such as in an SFP+ slot). These changes
> are submitted together for this RFT, but they will eventually be
> submitted separately to the appropriate subsystem maintainers.
> 
> I have tried to maintain backwards compatibility with existing device
> trees whereever possible. However, one area where I was unable to
> achieve this was with QSGMII. Please refer to patch 4 for details.
> 
> All mac drivers have now been converted. I would greatly appreciate if
> anyone has QorIQ boards they can test/debug this series on. I only have an
> LS1046ARDB. Everything but QSGMII should work without breakage; QSGMII
> needs patches 42 and 43.
> 
> The serdes driver is mostly functional (except for XFI). This series
> only adds support for the LS1046ARDB SerDes (and untested LS1088ARDB),
> but it should be fairly straightforward to add support for other SoCs
> and boards (see Documentation/driver-api/phy/qoriq.rst).
> 
> This is the last spin of this series with all patches included. After next
> week (depending on feedback) I will resend the patches broken up as
> follows:
> - 5: 1000BASE-KX support
> - 1, 6, 44, 45: Lynx 10G support
> - 7-10, 12-14: Phy rate adaptation support
> - 2-4, 15-43, 46, 47: DPAA phylink conversion

Please also send patches 15-38 separately from the DPAA1 SerDes and phylink set for easier review

> Patches 15-19 were first submitted as [1].
> 
> [1] https://lore.kernel.org/netdev/20220531195851.1592220-1-sean.anderson@seco.com/
> 
> Changes in v3:
> - Manually expand yaml references
> - Add mode configuration to device tree
> - Expand pcs-handle to an array
> - Incorperate some minor changes into the first FMan binding commit
> - Add vendor prefix 'fsl,' to rgmii and mii properties.
> - Set maxItems for pcs-names
> - Remove phy-* properties from example because dt-schema complains and
> I
>   can't be bothered to figure out how to make it work.
> - Add pcs-handle as a preferred version of pcsphy-handle
> - Deprecate pcsphy-handle
> - Remove mii/rmii properties
> - Add 1000BASE-KX interface mode
> - Rename remaining references to QorIQ SerDes to Lynx 10G
> - Fix PLL enable sequence by waiting for our reset request to be cleared
>   before continuing. Do the same for the lock, even though it isn't as
>   critical. Because we will delay for 1.5ms on average, use prepare
>   instead of enable so we can sleep.
> - Document the status of each protocol
> - Fix offset of several bitfields in RECR0
> - Take into account PLLRST_B, SDRST_B, and SDEN when considering whether
>   a PLL is "enabled."
> - Only power off unused lanes.
> - Split mode lane mask into first/last lane (like group)
> - Read modes from device tree
> - Use caps to determine whether KX/KR are supported
> - Move modes to lynx_priv
> - Ensure that the protocol controller is not already in-use when we try
>   to configure a new mode. This should only occur if the device tree is
>   misconfigured (e.g. when QSGMII is selected on two lanes but there is
>   only one QSGMII controller).
> - Split PLL drivers off into their own file
> - Add clock for "ext_dly" instead of writing the bit directly (and
>   racing with any clock code).
> - Use kasprintf instead of open-coding the snprintf dance
> - Support 1000BASE-KX in lynx_lookup_proto. This still requires PCS
>   support, so nothing is truly "enabled" yet.
> - Add support for phy rate adaptation
> - Support differing link speeds and interface speeds
> - Adjust advertisement based on rate adaptation
> - Adjust link settings based on rate adaptation
> - Add support for CRS-based rate adaptation
> - Add support for AQR115
> - Add some additional phy interfaces
> - Add support for aquantia rate adaptation
> - Put the PCS mdiodev only after we are done with it (since the PCS
>   does not perform a get itself).
> - Remove _return label from memac_initialization in favor of returning
>   directly
> - Fix grabbing the default PCS not checking for -ENODATA from
>   of_property_match_string
> - Set DTSEC_ECNTRL_R100M in dtsec_link_up instead of dtsec_mac_config
> - Remove rmii/mii properties
> - Replace 1000Base... with 1000BASE... to match IEEE capitalization
> - Add compatibles for QSGMII PCSs
> - Split arm and powerpcs dts updates
> - Describe modes in device tree
> - ls1088a: Add serdes bindings
> 
> Changes in v2:
> - Rename to fsl,lynx-10g.yaml
> - Refer to the device in the documentation, rather than the binding
> - Move compatible first
> - Document phy cells in the description
> - Allow a value of 1 for phy-cells. This allows for compatibility with
>   the similar (but according to Ioana Ciornei different enough) lynx-28g
>   binding.
> - Remove minItems
> - Use list for clock-names
> - Fix example binding having too many cells in regs
> - Add #clock-cells. This will allow using assigned-clocks* to configure
>   the PLLs.
> - Document the structure of the compatible strings
> - Convert FMan MAC bindings to yaml
> - Better document how we select which PCS to use in the default case
> - Rename driver to Lynx 10G (etc.)
> - Fix not clearing group->pll after disabling it
> - Support 1 and 2 phy-cells
> - Power off lanes during probe
> - Clear SGMIIaCR1_PCS_EN during probe
> - Rename LYNX_PROTO_UNKNOWN to LYNX_PROTO_NONE
> - Handle 1000BASE-KX in lynx_proto_mode_prep
> - Remove some unused variables
> - Fix prototype for dtsec_initialization
> - Fix warning if sizeof(void *) != sizeof(resource_size_t)
> - Specify type of mac_dev for exception_cb
> - Add helper for sanity checking cgr ops
> - Add CGR update function
> - Adjust queue depth on rate change
> - Move PCS_LYNX dependency to fman Kconfig
> - Remove unused variable slow_10g_if
> - Restrict valid link modes based on the phy interface. This is easier
>   to set up, and mostly captures what I intended to do the first time.
>   We now have a custom validate which restricts half-duplex for some SoCs
>   for RGMII, but generally just uses the default phylink validate.
> - Configure the SerDes in enable/disable
> - Properly implement all ethtool ops and ioctls. These were mostly
>   stubbed out just enough to compile last time.
> - Convert 10GEC and dTSEC as well
> - Fix capitalization of mEMAC in commit messages
> - Add nodes for QSGMII PCSs
> - Add nodes for QSGMII PCSs
> - Use one phy cell for SerDes1, since no lanes can be grouped
> - Disable SerDes by default to prevent breaking boards inadvertently.
> 
> Sean Anderson (47):
>   dt-bindings: phy: Add Lynx 10G phy binding
>   dt-bindings: net: Expand pcs-handle to an array
>   dt-bindings: net: Convert FMan MAC bindings to yaml
>   dt-bindings: net: fman: Add additional interface properties
>   net: phy: Add 1000BASE-KX interface mode
>   [RFT] phy: fsl: Add Lynx 10G SerDes driver
>   net: phy: Add support for rate adaptation
>   net: phylink: Support differing link speeds and interface speeds
>   net: phylink: Adjust advertisement based on rate adaptation
>   net: phylink: Adjust link settings based on rate adaptation
>   [RFC] net: phylink: Add support for CRS-based rate adaptation
>   net: phy: aquantia: Add support for AQR115
>   net: phy: aquantia: Add some additional phy interfaces
>   net: phy: aquantia: Add support for rate adaptation
>   net: fman: Convert to SPDX identifiers
>   net: fman: Don't pass comm_mode to enable/disable
>   net: fman: Store en/disable in mac_device instead of mac_priv_s
>   net: fman: dtsec: Always gracefully stop/start
>   net: fman: Get PCS node in per-mac init
>   net: fman: Store initialization function in match data
>   net: fman: Move struct dev to mac_device
>   net: fman: Configure fixed link in memac_initialization
>   net: fman: Export/rename some common functions
>   net: fman: memac: Use params instead of priv for max_speed
>   net: fman: Move initialization to mac-specific files
>   net: fman: Mark mac methods static
>   net: fman: Inline several functions into initialization
>   net: fman: Remove internal_phy_node from params
>   net: fman: Map the base address once
>   net: fman: Pass params directly to mac init
>   net: fman: Use mac_dev for some params
>   net: fman: Specify type of mac_dev for exception_cb
>   net: fman: Clean up error handling
>   net: fman: Change return type of disable to void
>   net: dpaa: Use mac_dev variable in dpaa_netdev_init
>   soc: fsl: qbman: Add helper for sanity checking cgr ops
>   soc: fsl: qbman: Add CGR update function
>   net: dpaa: Adjust queue depth on rate change
>   net: fman: memac: Add serdes support
>   net: fman: memac: Use lynx pcs driver
>   [RFT] net: dpaa: Convert to phylink
>   powerpc: dts: qoriq: Add nodes for QSGMII PCSs
>   arm64: dts: layerscape: Add nodes for QSGMII PCSs
>   arm64: dts: ls1046a: Add serdes bindings
>   arm64: dts: ls1088a: Add serdes bindings
>   arm64: dts: ls1046ardb: Add serdes bindings
>   [WIP] arm64: dts: ls1088ardb: Add serdes bindings
> 
>  .../bindings/net/dsa/renesas,rzn1-a5psw.yaml  |    1 +
>  .../bindings/net/ethernet-controller.yaml     |   10 +-
>  .../bindings/net/fsl,fman-dtsec.yaml          |  172 +++
>  .../bindings/net/fsl,qoriq-mc-dpmac.yaml      |    2 +-
>  .../devicetree/bindings/net/fsl-fman.txt      |  133 +-
>  .../devicetree/bindings/phy/fsl,lynx-10g.yaml |  311 ++++
>  Documentation/driver-api/phy/index.rst        |    1 +
>  Documentation/driver-api/phy/lynx_10g.rst     |   73 +
>  MAINTAINERS                                   |    6 +
>  .../boot/dts/freescale/fsl-ls1043-post.dtsi   |   24 +
>  .../boot/dts/freescale/fsl-ls1046-post.dtsi   |   25 +
>  .../boot/dts/freescale/fsl-ls1046a-rdb.dts    |   34 +
>  .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi |  179 +++
>  .../boot/dts/freescale/fsl-ls1088a-rdb.dts    |   87 ++
>  .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi |   96 ++
>  .../fsl/qoriq-fman3-0-10g-0-best-effort.dtsi  |    3 +-
>  .../boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi     |   10 +-
>  .../fsl/qoriq-fman3-0-10g-1-best-effort.dtsi  |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi     |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi      |    3 +-
>  .../boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi      |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi      |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi      |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi      |    3 +-
>  .../boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi      |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi     |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi     |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi      |    3 +-
>  .../boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi      |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi      |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi      |   10 +-
>  .../boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi      |    3 +-
>  .../boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi      |   10 +-
>  drivers/net/ethernet/freescale/dpaa/Kconfig   |    4 +-
>  .../net/ethernet/freescale/dpaa/dpaa_eth.c    |  132 +-
>  .../ethernet/freescale/dpaa/dpaa_eth_sysfs.c  |    2 +-
>  .../ethernet/freescale/dpaa/dpaa_ethtool.c    |   90 +-
>  drivers/net/ethernet/freescale/fman/Kconfig   |    4 +-
>  drivers/net/ethernet/freescale/fman/fman.c    |   31 +-
>  drivers/net/ethernet/freescale/fman/fman.h    |   31 +-
>  .../net/ethernet/freescale/fman/fman_dtsec.c  |  674 ++++-----
>  .../net/ethernet/freescale/fman/fman_dtsec.h  |   58 +-
>  .../net/ethernet/freescale/fman/fman_keygen.c |   29 +-
>  .../net/ethernet/freescale/fman/fman_keygen.h |   29 +-
>  .../net/ethernet/freescale/fman/fman_mac.h    |   34 +-
>  .../net/ethernet/freescale/fman/fman_memac.c  |  864 +++++------
>  .../net/ethernet/freescale/fman/fman_memac.h  |   57 +-
>  .../net/ethernet/freescale/fman/fman_muram.c  |   31 +-
>  .../net/ethernet/freescale/fman/fman_muram.h  |   32 +-
>  .../net/ethernet/freescale/fman/fman_port.c   |   29 +-
>  .../net/ethernet/freescale/fman/fman_port.h   |   29 +-
>  drivers/net/ethernet/freescale/fman/fman_sp.c |   29 +-
>  drivers/net/ethernet/freescale/fman/fman_sp.h |   28 +-
>  .../net/ethernet/freescale/fman/fman_tgec.c   |  274 ++--
>  .../net/ethernet/freescale/fman/fman_tgec.h   |   54 +-
>  drivers/net/ethernet/freescale/fman/mac.c     |  653 +--------
>  drivers/net/ethernet/freescale/fman/mac.h     |   66 +-
>  drivers/net/phy/aquantia_main.c               |   86 +-
>  drivers/net/phy/phy.c                         |   21 +
>  drivers/net/phy/phylink.c                     |  161 +-
>  drivers/phy/freescale/Kconfig                 |   20 +
>  drivers/phy/freescale/Makefile                |    3 +
>  drivers/phy/freescale/lynx-10g.h              |   36 +
>  drivers/phy/freescale/phy-fsl-lynx-10g-clk.c  |  438 ++++++
>  drivers/phy/freescale/phy-fsl-lynx-10g.c      | 1297 +++++++++++++++++
>  drivers/soc/fsl/qbman/qman.c                  |   76 +-
>  include/linux/phy.h                           |   42 +
>  include/linux/phylink.h                       |   12 +-
>  include/soc/fsl/qman.h                        |    9 +
>  69 files changed, 4408 insertions(+), 2356 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/net/fsl,fman-
> dtsec.yaml
>  create mode 100644 Documentation/devicetree/bindings/phy/fsl,lynx-
> 10g.yaml
>  create mode 100644 Documentation/driver-api/phy/lynx_10g.rst
>  create mode 100644 drivers/phy/freescale/lynx-10g.h
>  create mode 100644 drivers/phy/freescale/phy-fsl-lynx-10g-clk.c
>  create mode 100644 drivers/phy/freescale/phy-fsl-lynx-10g.c
> 
> --
> 2.35.1.1320.gc452695387.dirty
Sean Anderson July 21, 2022, 3:39 p.m. UTC | #4
On 7/21/22 10:26 AM, Camelia Alexandra Groza wrote:
>> -----Original Message-----
>> From: Sean Anderson <sean.anderson@seco.com>
>> Sent: Saturday, July 16, 2022 0:59
>> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
>> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
>> netdev@vger.kernel.org
>> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
>> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
>> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
>> <sean.anderson@seco.com>; Alexandru Marginean
>> <alexandru.marginean@nxp.com>; Andrew Lunn <andrew@lunn.ch>;
>> Benjamin Herrenschmidt <benh@kernel.crashing.org>; Heiner Kallweit
>> <hkallweit1@gmail.com>; Ioana Ciornei <ioana.ciornei@nxp.com>; Jonathan
>> Corbet <corbet@lwn.net>; Kishon Vijay Abraham I <kishon@ti.com>;
>> Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Leo Li
>> <leoyang.li@nxp.com>; Michael Ellerman <mpe@ellerman.id.au>; Paul
>> Mackerras <paulus@samba.org>; Rob Herring <robh+dt@kernel.org>;
>> Shawn Guo <shawnguo@kernel.org>; Vinod Koul <vkoul@kernel.org>;
>> Vladimir Oltean <olteanv@gmail.com>; devicetree@vger.kernel.org; linux-
>> doc@vger.kernel.org; linux-phy@lists.infradead.org; linuxppc-
>> dev@lists.ozlabs.org
>> Subject: [PATCH net-next v3 00/47] [RFT] net: dpaa: Convert to phylink
>> 
>> This series converts the DPAA driver to phylink. Additionally,
>> it also adds a serdes driver to allow for dynamic reconfiguration
>> between 1g and 10g interfaces (such as in an SFP+ slot). These changes
>> are submitted together for this RFT, but they will eventually be
>> submitted separately to the appropriate subsystem maintainers.
>> 
>> I have tried to maintain backwards compatibility with existing device
>> trees whereever possible. However, one area where I was unable to
>> achieve this was with QSGMII. Please refer to patch 4 for details.
>> 
>> All mac drivers have now been converted. I would greatly appreciate if
>> anyone has QorIQ boards they can test/debug this series on. I only have an
>> LS1046ARDB. Everything but QSGMII should work without breakage; QSGMII
>> needs patches 42 and 43.
>> 
>> The serdes driver is mostly functional (except for XFI). This series
>> only adds support for the LS1046ARDB SerDes (and untested LS1088ARDB),
>> but it should be fairly straightforward to add support for other SoCs
>> and boards (see Documentation/driver-api/phy/qoriq.rst).
>> 
>> This is the last spin of this series with all patches included. After next
>> week (depending on feedback) I will resend the patches broken up as
>> follows:
>> - 5: 1000BASE-KX support
>> - 1, 6, 44, 45: Lynx 10G support
>> - 7-10, 12-14: Phy rate adaptation support
>> - 2-4, 15-43, 46, 47: DPAA phylink conversion
> 
> Please also send patches 15-38 separately from the DPAA1 SerDes and phylink set for easier review

OK.

--Sean

>> Patches 15-19 were first submitted as [1].
>> 
>> [1] https://lore.kernel.org/netdev/20220531195851.1592220-1-sean.anderson@seco.com/
>> 
>> Changes in v3:
>> - Manually expand yaml references
>> - Add mode configuration to device tree
>> - Expand pcs-handle to an array
>> - Incorperate some minor changes into the first FMan binding commit
>> - Add vendor prefix 'fsl,' to rgmii and mii properties.
>> - Set maxItems for pcs-names
>> - Remove phy-* properties from example because dt-schema complains and
>> I
>>   can't be bothered to figure out how to make it work.
>> - Add pcs-handle as a preferred version of pcsphy-handle
>> - Deprecate pcsphy-handle
>> - Remove mii/rmii properties
>> - Add 1000BASE-KX interface mode
>> - Rename remaining references to QorIQ SerDes to Lynx 10G
>> - Fix PLL enable sequence by waiting for our reset request to be cleared
>>   before continuing. Do the same for the lock, even though it isn't as
>>   critical. Because we will delay for 1.5ms on average, use prepare
>>   instead of enable so we can sleep.
>> - Document the status of each protocol
>> - Fix offset of several bitfields in RECR0
>> - Take into account PLLRST_B, SDRST_B, and SDEN when considering whether
>>   a PLL is "enabled."
>> - Only power off unused lanes.
>> - Split mode lane mask into first/last lane (like group)
>> - Read modes from device tree
>> - Use caps to determine whether KX/KR are supported
>> - Move modes to lynx_priv
>> - Ensure that the protocol controller is not already in-use when we try
>>   to configure a new mode. This should only occur if the device tree is
>>   misconfigured (e.g. when QSGMII is selected on two lanes but there is
>>   only one QSGMII controller).
>> - Split PLL drivers off into their own file
>> - Add clock for "ext_dly" instead of writing the bit directly (and
>>   racing with any clock code).
>> - Use kasprintf instead of open-coding the snprintf dance
>> - Support 1000BASE-KX in lynx_lookup_proto. This still requires PCS
>>   support, so nothing is truly "enabled" yet.
>> - Add support for phy rate adaptation
>> - Support differing link speeds and interface speeds
>> - Adjust advertisement based on rate adaptation
>> - Adjust link settings based on rate adaptation
>> - Add support for CRS-based rate adaptation
>> - Add support for AQR115
>> - Add some additional phy interfaces
>> - Add support for aquantia rate adaptation
>> - Put the PCS mdiodev only after we are done with it (since the PCS
>>   does not perform a get itself).
>> - Remove _return label from memac_initialization in favor of returning
>>   directly
>> - Fix grabbing the default PCS not checking for -ENODATA from
>>   of_property_match_string
>> - Set DTSEC_ECNTRL_R100M in dtsec_link_up instead of dtsec_mac_config
>> - Remove rmii/mii properties
>> - Replace 1000Base... with 1000BASE... to match IEEE capitalization
>> - Add compatibles for QSGMII PCSs
>> - Split arm and powerpcs dts updates
>> - Describe modes in device tree
>> - ls1088a: Add serdes bindings
>> 
>> Changes in v2:
>> - Rename to fsl,lynx-10g.yaml
>> - Refer to the device in the documentation, rather than the binding
>> - Move compatible first
>> - Document phy cells in the description
>> - Allow a value of 1 for phy-cells. This allows for compatibility with
>>   the similar (but according to Ioana Ciornei different enough) lynx-28g
>>   binding.
>> - Remove minItems
>> - Use list for clock-names
>> - Fix example binding having too many cells in regs
>> - Add #clock-cells. This will allow using assigned-clocks* to configure
>>   the PLLs.
>> - Document the structure of the compatible strings
>> - Convert FMan MAC bindings to yaml
>> - Better document how we select which PCS to use in the default case
>> - Rename driver to Lynx 10G (etc.)
>> - Fix not clearing group->pll after disabling it
>> - Support 1 and 2 phy-cells
>> - Power off lanes during probe
>> - Clear SGMIIaCR1_PCS_EN during probe
>> - Rename LYNX_PROTO_UNKNOWN to LYNX_PROTO_NONE
>> - Handle 1000BASE-KX in lynx_proto_mode_prep
>> - Remove some unused variables
>> - Fix prototype for dtsec_initialization
>> - Fix warning if sizeof(void *) != sizeof(resource_size_t)
>> - Specify type of mac_dev for exception_cb
>> - Add helper for sanity checking cgr ops
>> - Add CGR update function
>> - Adjust queue depth on rate change
>> - Move PCS_LYNX dependency to fman Kconfig
>> - Remove unused variable slow_10g_if
>> - Restrict valid link modes based on the phy interface. This is easier
>>   to set up, and mostly captures what I intended to do the first time.
>>   We now have a custom validate which restricts half-duplex for some SoCs
>>   for RGMII, but generally just uses the default phylink validate.
>> - Configure the SerDes in enable/disable
>> - Properly implement all ethtool ops and ioctls. These were mostly
>>   stubbed out just enough to compile last time.
>> - Convert 10GEC and dTSEC as well
>> - Fix capitalization of mEMAC in commit messages
>> - Add nodes for QSGMII PCSs
>> - Add nodes for QSGMII PCSs
>> - Use one phy cell for SerDes1, since no lanes can be grouped
>> - Disable SerDes by default to prevent breaking boards inadvertently.
>> 
>> Sean Anderson (47):
>>   dt-bindings: phy: Add Lynx 10G phy binding
>>   dt-bindings: net: Expand pcs-handle to an array
>>   dt-bindings: net: Convert FMan MAC bindings to yaml
>>   dt-bindings: net: fman: Add additional interface properties
>>   net: phy: Add 1000BASE-KX interface mode
>>   [RFT] phy: fsl: Add Lynx 10G SerDes driver
>>   net: phy: Add support for rate adaptation
>>   net: phylink: Support differing link speeds and interface speeds
>>   net: phylink: Adjust advertisement based on rate adaptation
>>   net: phylink: Adjust link settings based on rate adaptation
>>   [RFC] net: phylink: Add support for CRS-based rate adaptation
>>   net: phy: aquantia: Add support for AQR115
>>   net: phy: aquantia: Add some additional phy interfaces
>>   net: phy: aquantia: Add support for rate adaptation
>>   net: fman: Convert to SPDX identifiers
>>   net: fman: Don't pass comm_mode to enable/disable
>>   net: fman: Store en/disable in mac_device instead of mac_priv_s
>>   net: fman: dtsec: Always gracefully stop/start
>>   net: fman: Get PCS node in per-mac init
>>   net: fman: Store initialization function in match data
>>   net: fman: Move struct dev to mac_device
>>   net: fman: Configure fixed link in memac_initialization
>>   net: fman: Export/rename some common functions
>>   net: fman: memac: Use params instead of priv for max_speed
>>   net: fman: Move initialization to mac-specific files
>>   net: fman: Mark mac methods static
>>   net: fman: Inline several functions into initialization
>>   net: fman: Remove internal_phy_node from params
>>   net: fman: Map the base address once
>>   net: fman: Pass params directly to mac init
>>   net: fman: Use mac_dev for some params
>>   net: fman: Specify type of mac_dev for exception_cb
>>   net: fman: Clean up error handling
>>   net: fman: Change return type of disable to void
>>   net: dpaa: Use mac_dev variable in dpaa_netdev_init
>>   soc: fsl: qbman: Add helper for sanity checking cgr ops
>>   soc: fsl: qbman: Add CGR update function
>>   net: dpaa: Adjust queue depth on rate change
>>   net: fman: memac: Add serdes support
>>   net: fman: memac: Use lynx pcs driver
>>   [RFT] net: dpaa: Convert to phylink
>>   powerpc: dts: qoriq: Add nodes for QSGMII PCSs
>>   arm64: dts: layerscape: Add nodes for QSGMII PCSs
>>   arm64: dts: ls1046a: Add serdes bindings
>>   arm64: dts: ls1088a: Add serdes bindings
>>   arm64: dts: ls1046ardb: Add serdes bindings
>>   [WIP] arm64: dts: ls1088ardb: Add serdes bindings
>> 
>>  .../bindings/net/dsa/renesas,rzn1-a5psw.yaml  |    1 +
>>  .../bindings/net/ethernet-controller.yaml     |   10 +-
>>  .../bindings/net/fsl,fman-dtsec.yaml          |  172 +++
>>  .../bindings/net/fsl,qoriq-mc-dpmac.yaml      |    2 +-
>>  .../devicetree/bindings/net/fsl-fman.txt      |  133 +-
>>  .../devicetree/bindings/phy/fsl,lynx-10g.yaml |  311 ++++
>>  Documentation/driver-api/phy/index.rst        |    1 +
>>  Documentation/driver-api/phy/lynx_10g.rst     |   73 +
>>  MAINTAINERS                                   |    6 +
>>  .../boot/dts/freescale/fsl-ls1043-post.dtsi   |   24 +
>>  .../boot/dts/freescale/fsl-ls1046-post.dtsi   |   25 +
>>  .../boot/dts/freescale/fsl-ls1046a-rdb.dts    |   34 +
>>  .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi |  179 +++
>>  .../boot/dts/freescale/fsl-ls1088a-rdb.dts    |   87 ++
>>  .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi |   96 ++
>>  .../fsl/qoriq-fman3-0-10g-0-best-effort.dtsi  |    3 +-
>>  .../boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi     |   10 +-
>>  .../fsl/qoriq-fman3-0-10g-1-best-effort.dtsi  |   10 +-
>>  .../boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi     |   10 +-
>>  .../boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi      |    3 +-
>>  .../boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi      |   10 +-
>>  .../boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi      |   10 +-
>>  .../boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi      |   10 +-
>>  .../boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi      |    3 +-
>>  .../boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi      |   10 +-
>>  .../boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi     |   10 +-
>>  .../boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi     |   10 +-
>>  .../boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi      |    3 +-
>>  .../boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi      |   10 +-
>>  .../boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi      |   10 +-
>>  .../boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi      |   10 +-
>>  .../boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi      |    3 +-
>>  .../boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi      |   10 +-
>>  drivers/net/ethernet/freescale/dpaa/Kconfig   |    4 +-
>>  .../net/ethernet/freescale/dpaa/dpaa_eth.c    |  132 +-
>>  .../ethernet/freescale/dpaa/dpaa_eth_sysfs.c  |    2 +-
>>  .../ethernet/freescale/dpaa/dpaa_ethtool.c    |   90 +-
>>  drivers/net/ethernet/freescale/fman/Kconfig   |    4 +-
>>  drivers/net/ethernet/freescale/fman/fman.c    |   31 +-
>>  drivers/net/ethernet/freescale/fman/fman.h    |   31 +-
>>  .../net/ethernet/freescale/fman/fman_dtsec.c  |  674 ++++-----
>>  .../net/ethernet/freescale/fman/fman_dtsec.h  |   58 +-
>>  .../net/ethernet/freescale/fman/fman_keygen.c |   29 +-
>>  .../net/ethernet/freescale/fman/fman_keygen.h |   29 +-
>>  .../net/ethernet/freescale/fman/fman_mac.h    |   34 +-
>>  .../net/ethernet/freescale/fman/fman_memac.c  |  864 +++++------
>>  .../net/ethernet/freescale/fman/fman_memac.h  |   57 +-
>>  .../net/ethernet/freescale/fman/fman_muram.c  |   31 +-
>>  .../net/ethernet/freescale/fman/fman_muram.h  |   32 +-
>>  .../net/ethernet/freescale/fman/fman_port.c   |   29 +-
>>  .../net/ethernet/freescale/fman/fman_port.h   |   29 +-
>>  drivers/net/ethernet/freescale/fman/fman_sp.c |   29 +-
>>  drivers/net/ethernet/freescale/fman/fman_sp.h |   28 +-
>>  .../net/ethernet/freescale/fman/fman_tgec.c   |  274 ++--
>>  .../net/ethernet/freescale/fman/fman_tgec.h   |   54 +-
>>  drivers/net/ethernet/freescale/fman/mac.c     |  653 +--------
>>  drivers/net/ethernet/freescale/fman/mac.h     |   66 +-
>>  drivers/net/phy/aquantia_main.c               |   86 +-
>>  drivers/net/phy/phy.c                         |   21 +
>>  drivers/net/phy/phylink.c                     |  161 +-
>>  drivers/phy/freescale/Kconfig                 |   20 +
>>  drivers/phy/freescale/Makefile                |    3 +
>>  drivers/phy/freescale/lynx-10g.h              |   36 +
>>  drivers/phy/freescale/phy-fsl-lynx-10g-clk.c  |  438 ++++++
>>  drivers/phy/freescale/phy-fsl-lynx-10g.c      | 1297 +++++++++++++++++
>>  drivers/soc/fsl/qbman/qman.c                  |   76 +-
>>  include/linux/phy.h                           |   42 +
>>  include/linux/phylink.h                       |   12 +-
>>  include/soc/fsl/qman.h                        |    9 +
>>  69 files changed, 4408 insertions(+), 2356 deletions(-)
>>  create mode 100644 Documentation/devicetree/bindings/net/fsl,fman-
>> dtsec.yaml
>>  create mode 100644 Documentation/devicetree/bindings/phy/fsl,lynx-
>> 10g.yaml
>>  create mode 100644 Documentation/driver-api/phy/lynx_10g.rst
>>  create mode 100644 drivers/phy/freescale/lynx-10g.h
>>  create mode 100644 drivers/phy/freescale/phy-fsl-lynx-10g-clk.c
>>  create mode 100644 drivers/phy/freescale/phy-fsl-lynx-10g.c
>> 
>> --
>> 2.35.1.1320.gc452695387.dirty
>
Sean Anderson July 21, 2022, 3:40 p.m. UTC | #5
On 7/21/22 10:20 AM, Camelia Alexandra Groza wrote:
>> -----Original Message-----
>> From: Sean Anderson <sean.anderson@seco.com>
>> Sent: Saturday, July 16, 2022 1:00
>> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
>> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
>> netdev@vger.kernel.org
>> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
>> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
>> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean Anderson
>> <sean.anderson@seco.com>; Kishon Vijay Abraham I <kishon@ti.com>;
>> Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Leo Li
>> <leoyang.li@nxp.com>; Rob Herring <robh+dt@kernel.org>; Shawn Guo
>> <shawnguo@kernel.org>; Vinod Koul <vkoul@kernel.org>;
>> devicetree@vger.kernel.org; linux-phy@lists.infradead.org
>> Subject: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
>> bindings
>> 
>> This adds appropriate bindings for the macs which use the SerDes. The
>> 156.25MHz fixed clock is a crystal. The 100MHz clocks (there are
>> actually 3) come from a Renesas 6V49205B at address 69 on i2c0. There is
>> no driver for this device (and as far as I know all you can do with the
>> 100MHz clocks is gate them), so I have chosen to model it as a single
>> fixed clock.
>> 
>> Note: the SerDes1 lane numbering for the LS1046A is *reversed*.
>> This means that Lane A (what the driver thinks is lane 0) uses pins
>> SD1_TX3_P/N.
>> 
>> Because this will break ethernet if the serdes is not enabled, enable
>> the serdes driver by default on Layerscape.
>> 
>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
>> ---
>> Please let me know if there is a better/more specific config I can use
>> here.
>> 
>> (no changes since v1)
> 
> My LS1046ARDB hangs at boot with this patch right after the second SerDes is probed,
> right before the point where the PCI host bridge is registered. I can get around this
> either by disabling the second SerDes node from the device tree, or disabling
> CONFIG_PCI_LAYERSCAPE at build.
> 
> I haven't debugged it more but there seems to be an issue here.

Hm. Do you have anything plugged into the PCIe/SATA slots? I haven't been testing with
anything there. For now, it may be better to just leave it disabled.

--Sean
Sean Anderson July 21, 2022, 5:51 p.m. UTC | #6
On 7/21/22 9:48 AM, Camelia Alexandra Groza wrote:
>> -----Original Message-----
>> From: Linuxppc-dev <linuxppc-dev-
>> bounces+camelia.groza=nxp.com@lists.ozlabs.org> On Behalf Of Sean
>> Anderson
>> Sent: Saturday, July 16, 2022 1:00
>> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
>> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
>> netdev@vger.kernel.org
>> Cc: devicetree@vger.kernel.org; Leo Li <leoyang.li@nxp.com>; Sean
>> Anderson <sean.anderson@seco.com>; linuxppc-dev@lists.ozlabs.org;
>> Russell King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Eric
>> Dumazet <edumazet@google.com>; Rob Herring <robh+dt@kernel.org>;
>> Paul Mackerras <paulus@samba.org>; Krzysztof Kozlowski
>> <krzysztof.kozlowski+dt@linaro.org>; Paolo Abeni <pabeni@redhat.com>;
>> Shawn Guo <shawnguo@kernel.org>; linux-arm-kernel@lists.infradead.org
>> Subject: [PATCH net-next v3 42/47] powerpc: dts: qoriq: Add nodes for
>> QSGMII PCSs
>> 
>> Now that we actually read registers from QSGMII PCSs, it's important
>> that we have the correct address (instead of hoping that we're the MAC
>> with all the QSGMII PCSs on its bus). This adds nodes for the QSGMII
>> PCSs. They have the same addresses on all SoCs (e.g. if QSGMIIA is
>> present it's used for MACs 1 through 4).
>> 
>> Since the first QSGMII PCSs share an address with the SGMII and XFI
>> PCSs, we only add new nodes for PCSs 2-4. This avoids address conflicts
>> on the bus.
>> 
>> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> 
> MAC1 and MAC2 can be XFI on T2080. This needs to be reflected in qoriq-fman3-0-1g-0.dtsi
> and qoriq-fman3-0-1g-1.dtsi
> 
> The two associated netdevs fail to probe on a T2080RDB without "xfi" added to the pcs-names:
> fsl_dpaa_mac ffe4e0000.ethernet (unnamed net_device) (uninitialized): failed to validate link configuration for in-band status
> fsl_dpaa_mac ffe4e0000.ethernet: error -EINVAL: Could not create phylink
> fsl_dpa: probe of dpaa-ethernet.0 failed with error -22

Ah, I missed that this SoC had 10G on MAC1/MAC2. Going with the existing
naming scheme, these MACs should probably go in DTSs named
qoriq-fman3-0-1g-2.dtsi and qoriq-fman3-0-1g-3.dtsi. Alternatively, this
could be done in t2081si-post.dtsi, since it is only for one SoC. I don't
want to add these to qoriq-fman3-0-1g-0.dtsi and qoriq-fman3-0-1g-1.dtsi
because they are used on other SoCs which don't have 10G.

--Sean

>> ---
>> 
>> Changes in v3:
>> - Add compatibles for QSGMII PCSs
>> - Split arm and powerpcs dts updates
>> 
>> Changes in v2:
>> - New
>> 
>>  .../boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi  |  3 ++-
>>  arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi     | 10 +++++++++-
>>  .../boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi  | 10 +++++++++-
>>  arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi     | 10 +++++++++-
>>  arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi      |  3 ++-
>>  arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi      | 10 +++++++++-
>>  arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi      | 10 +++++++++-
>>  arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi      | 10 +++++++++-
>>  arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi      |  3 ++-
>>  arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi      | 10 +++++++++-
>>  arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi     | 10 +++++++++-
>>  arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi     | 10 +++++++++-
>>  arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi      |  3 ++-
>>  arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi      | 10 +++++++++-
>>  arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi      | 10 +++++++++-
>>  arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi      | 10 +++++++++-
>>  arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi      |  3 ++-
>>  arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi      | 10 +++++++++-
>>  18 files changed, 127 insertions(+), 18 deletions(-)
>> 
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
>> index baa0c503e741..db169d630db3 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi
>> @@ -55,7 +55,8 @@ ethernet@e0000 {
>>  		reg = <0xe0000 0x1000>;
>>  		fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
>>  		ptp-timer = <&ptp_timer0>;
>> -		pcsphy-handle = <&pcsphy0>;
>> +		pcsphy-handle = <&pcsphy0>, <&pcsphy0>;
>> +		pcs-names = "sgmii", "qsgmii";
>>  	};
>> 
>>  	mdio@e1000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
>> index 93095600e808..e80ad8675be8 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
>> @@ -52,7 +52,15 @@ ethernet@f0000 {
>>  		compatible = "fsl,fman-memac";
>>  		reg = <0xf0000 0x1000>;
>>  		fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>;
>> -		pcsphy-handle = <&pcsphy6>;
>> +		pcsphy-handle = <&pcsphy6>, <&qsgmiib_pcs2>,
>> <&pcsphy6>;
>> +		pcs-names = "sgmii", "qsgmii", "xfi";
>> +	};
>> +
>> +	mdio@e9000 {
>> +		qsgmiib_pcs2: ethernet-pcs@2 {
>> +			compatible = "fsl,lynx-pcs";
>> +			reg = <2>;
>> +		};
>>  	};
>> 
>>  	mdio@f1000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
>> index ff4bd38f0645..6a6f51842ad5 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi
>> @@ -55,7 +55,15 @@ ethernet@e2000 {
>>  		reg = <0xe2000 0x1000>;
>>  		fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
>>  		ptp-timer = <&ptp_timer0>;
>> -		pcsphy-handle = <&pcsphy1>;
>> +		pcsphy-handle = <&pcsphy1>, <&qsgmiia_pcs1>;
>> +		pcs-names = "sgmii", "qsgmii";
>> +	};
>> +
>> +	mdio@e1000 {
>> +		qsgmiia_pcs1: ethernet-pcs@1 {
>> +			compatible = "fsl,lynx-pcs";
>> +			reg = <1>;
>> +		};
>>  	};
>> 
>>  	mdio@e3000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
>> index 1fa38ed6f59e..543da5493e40 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
>> @@ -52,7 +52,15 @@ ethernet@f2000 {
>>  		compatible = "fsl,fman-memac";
>>  		reg = <0xf2000 0x1000>;
>>  		fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>;
>> -		pcsphy-handle = <&pcsphy7>;
>> +		pcsphy-handle = <&pcsphy7>, <&qsgmiib_pcs3>,
>> <&pcsphy7>;
>> +		pcs-names = "sgmii", "qsgmii", "xfi";
>> +	};
>> +
>> +	mdio@e9000 {
>> +		qsgmiib_pcs3: ethernet-pcs@3 {
>> +			compatible = "fsl,lynx-pcs";
>> +			reg = <3>;
>> +		};
>>  	};
>> 
>>  	mdio@f3000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
>> index a8cc9780c0c4..ce76725e6eb2 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi
>> @@ -51,7 +51,8 @@ ethernet@e0000 {
>>  		reg = <0xe0000 0x1000>;
>>  		fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
>>  		ptp-timer = <&ptp_timer0>;
>> -		pcsphy-handle = <&pcsphy0>;
>> +		pcsphy-handle = <&pcsphy0>, <&pcsphy0>;
>> +		pcs-names = "sgmii", "qsgmii";
>>  	};
>> 
>>  	mdio@e1000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
>> index 8b8bd70c9382..f3af67df4767 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi
>> @@ -51,7 +51,15 @@ ethernet@e2000 {
>>  		reg = <0xe2000 0x1000>;
>>  		fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
>>  		ptp-timer = <&ptp_timer0>;
>> -		pcsphy-handle = <&pcsphy1>;
>> +		pcsphy-handle = <&pcsphy1>, <&qsgmiia_pcs1>;
>> +		pcs-names = "sgmii", "qsgmii";
>> +	};
>> +
>> +	mdio@e1000 {
>> +		qsgmiia_pcs1: ethernet-pcs@1 {
>> +			compatible = "fsl,lynx-pcs";
>> +			reg = <1>;
>> +		};
>>  	};
>> 
>>  	mdio@e3000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
>> index 619c880b54d8..f6d74de84bfe 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi
>> @@ -51,7 +51,15 @@ ethernet@e4000 {
>>  		reg = <0xe4000 0x1000>;
>>  		fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>;
>>  		ptp-timer = <&ptp_timer0>;
>> -		pcsphy-handle = <&pcsphy2>;
>> +		pcsphy-handle = <&pcsphy2>, <&qsgmiia_pcs2>;
>> +		pcs-names = "sgmii", "qsgmii";
>> +	};
>> +
>> +	mdio@e1000 {
>> +		qsgmiia_pcs2: ethernet-pcs@2 {
>> +			compatible = "fsl,lynx-pcs";
>> +			reg = <2>;
>> +		};
>>  	};
>> 
>>  	mdio@e5000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
>> index d7ebb73a400d..6e091d8ae9e2 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi
>> @@ -51,7 +51,15 @@ ethernet@e6000 {
>>  		reg = <0xe6000 0x1000>;
>>  		fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>;
>>  		ptp-timer = <&ptp_timer0>;
>> -		pcsphy-handle = <&pcsphy3>;
>> +		pcsphy-handle = <&pcsphy3>, <&qsgmiia_pcs3>;
>> +		pcs-names = "sgmii", "qsgmii";
>> +	};
>> +
>> +	mdio@e1000 {
>> +		qsgmiia_pcs3: ethernet-pcs@3 {
>> +			compatible = "fsl,lynx-pcs";
>> +			reg = <3>;
>> +		};
>>  	};
>> 
>>  	mdio@e7000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
>> index b151d696a069..e2174c0fc841 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi
>> @@ -51,7 +51,8 @@ ethernet@e8000 {
>>  		reg = <0xe8000 0x1000>;
>>  		fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;
>>  		ptp-timer = <&ptp_timer0>;
>> -		pcsphy-handle = <&pcsphy4>;
>> +		pcsphy-handle = <&pcsphy4>, <&pcsphy4>;
>> +		pcs-names = "sgmii", "qsgmii";
>>  	};
>> 
>>  	mdio@e9000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
>> index adc0ae0013a3..9106815bd63e 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi
>> @@ -51,7 +51,15 @@ ethernet@ea000 {
>>  		reg = <0xea000 0x1000>;
>>  		fsl,fman-ports = <&fman0_rx_0x0d &fman0_tx_0x2d>;
>>  		ptp-timer = <&ptp_timer0>;
>> -		pcsphy-handle = <&pcsphy5>;
>> +		pcsphy-handle = <&pcsphy5>, <&qsgmiib_pcs1>;
>> +		pcs-names = "sgmii", "qsgmii";
>> +	};
>> +
>> +	mdio@e9000 {
>> +		qsgmiib_pcs1: ethernet-pcs@1 {
>> +			compatible = "fsl,lynx-pcs";
>> +			reg = <1>;
>> +		};
>>  	};
>> 
>>  	mdio@eb000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
>> index 435047e0e250..a3c1538dfda1 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi
>> @@ -52,7 +52,15 @@ ethernet@f0000 {
>>  		compatible = "fsl,fman-memac";
>>  		reg = <0xf0000 0x1000>;
>>  		fsl,fman-ports = <&fman1_rx_0x10 &fman1_tx_0x30>;
>> -		pcsphy-handle = <&pcsphy14>;
>> +		pcsphy-handle = <&pcsphy14>, <&qsgmiid_pcs2>,
>> <&pcsphy14>;
>> +		pcs-names = "sgmii", "qsgmii", "xfi";
>> +	};
>> +
>> +	mdio@e9000 {
>> +		qsgmiid_pcs2: ethernet-pcs@2 {
>> +			compatible = "fsl,lynx-pcs";
>> +			reg = <2>;
>> +		};
>>  	};
>> 
>>  	mdio@f1000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
>> index c098657cca0a..c024517e70d6 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi
>> @@ -52,7 +52,15 @@ ethernet@f2000 {
>>  		compatible = "fsl,fman-memac";
>>  		reg = <0xf2000 0x1000>;
>>  		fsl,fman-ports = <&fman1_rx_0x11 &fman1_tx_0x31>;
>> -		pcsphy-handle = <&pcsphy15>;
>> +		pcsphy-handle = <&pcsphy15>, <&qsgmiid_pcs3>,
>> <&pcsphy15>;
>> +		pcs-names = "sgmii", "qsgmii", "xfi";
>> +	};
>> +
>> +	mdio@e9000 {
>> +		qsgmiid_pcs3: ethernet-pcs@3 {
>> +			compatible = "fsl,lynx-pcs";
>> +			reg = <3>;
>> +		};
>>  	};
>> 
>>  	mdio@f3000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
>> index 9d06824815f3..16fb299f615a 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi
>> @@ -51,7 +51,8 @@ ethernet@e0000 {
>>  		reg = <0xe0000 0x1000>;
>>  		fsl,fman-ports = <&fman1_rx_0x08 &fman1_tx_0x28>;
>>  		ptp-timer = <&ptp_timer1>;
>> -		pcsphy-handle = <&pcsphy8>;
>> +		pcsphy-handle = <&pcsphy8>, <&pcsphy8>;
>> +		pcs-names = "sgmii", "qsgmii";
>>  	};
>> 
>>  	mdio@e1000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
>> index 70e947730c4b..75cecbef8469 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi
>> @@ -51,7 +51,15 @@ ethernet@e2000 {
>>  		reg = <0xe2000 0x1000>;
>>  		fsl,fman-ports = <&fman1_rx_0x09 &fman1_tx_0x29>;
>>  		ptp-timer = <&ptp_timer1>;
>> -		pcsphy-handle = <&pcsphy9>;
>> +		pcsphy-handle = <&pcsphy9>, <&qsgmiic_pcs1>;
>> +		pcs-names = "sgmii", "qsgmii";
>> +	};
>> +
>> +	mdio@e1000 {
>> +		qsgmiic_pcs1: ethernet-pcs@1 {
>> +			compatible = "fsl,lynx-pcs";
>> +			reg = <1>;
>> +		};
>>  	};
>> 
>>  	mdio@e3000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
>> index ad96e6529595..98c1d27f17e7 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi
>> @@ -51,7 +51,15 @@ ethernet@e4000 {
>>  		reg = <0xe4000 0x1000>;
>>  		fsl,fman-ports = <&fman1_rx_0x0a &fman1_tx_0x2a>;
>>  		ptp-timer = <&ptp_timer1>;
>> -		pcsphy-handle = <&pcsphy10>;
>> +		pcsphy-handle = <&pcsphy10>, <&qsgmiic_pcs2>;
>> +		pcs-names = "sgmii", "qsgmii";
>> +	};
>> +
>> +	mdio@e1000 {
>> +		qsgmiic_pcs2: ethernet-pcs@2 {
>> +			compatible = "fsl,lynx-pcs";
>> +			reg = <2>;
>> +		};
>>  	};
>> 
>>  	mdio@e5000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
>> index 034bc4b71f7a..203a00036f17 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi
>> @@ -51,7 +51,15 @@ ethernet@e6000 {
>>  		reg = <0xe6000 0x1000>;
>>  		fsl,fman-ports = <&fman1_rx_0x0b &fman1_tx_0x2b>;
>>  		ptp-timer = <&ptp_timer1>;
>> -		pcsphy-handle = <&pcsphy11>;
>> +		pcsphy-handle = <&pcsphy11>, <&qsgmiic_pcs3>;
>> +		pcs-names = "sgmii", "qsgmii";
>> +	};
>> +
>> +	mdio@e1000 {
>> +		qsgmiic_pcs3: ethernet-pcs@3 {
>> +			compatible = "fsl,lynx-pcs";
>> +			reg = <3>;
>> +		};
>>  	};
>> 
>>  	mdio@e7000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
>> index 93ca23d82b39..9366935ebc02 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi
>> @@ -51,7 +51,8 @@ ethernet@e8000 {
>>  		reg = <0xe8000 0x1000>;
>>  		fsl,fman-ports = <&fman1_rx_0x0c &fman1_tx_0x2c>;
>>  		ptp-timer = <&ptp_timer1>;
>> -		pcsphy-handle = <&pcsphy12>;
>> +		pcsphy-handle = <&pcsphy12>, <&pcsphy12>;
>> +		pcs-names = "sgmii", "qsgmii";
>>  	};
>> 
>>  	mdio@e9000 {
>> diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
>> b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
>> index 23b3117a2fd2..39f7c6133017 100644
>> --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
>> +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi
>> @@ -51,7 +51,15 @@ ethernet@ea000 {
>>  		reg = <0xea000 0x1000>;
>>  		fsl,fman-ports = <&fman1_rx_0x0d &fman1_tx_0x2d>;
>>  		ptp-timer = <&ptp_timer1>;
>> -		pcsphy-handle = <&pcsphy13>;
>> +		pcsphy-handle = <&pcsphy13>, <&qsgmiid_pcs1>;
>> +		pcs-names = "sgmii", "qsgmii";
>> +	};
>> +
>> +	mdio@e9000 {
>> +		qsgmiid_pcs1: ethernet-pcs@1 {
>> +			compatible = "fsl,lynx-pcs";
>> +			reg = <1>;
>> +		};
>>  	};
>> 
>>  	mdio@eb000 {
>> --
>> 2.35.1.1320.gc452695387.dirty
>
Camelia Groza July 22, 2022, 12:41 p.m. UTC | #7
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Thursday, July 21, 2022 18:41
> To: Camelia Alexandra Groza <camelia.groza@nxp.com>; David S . Miller
> <davem@davemloft.net>; Jakub Kicinski <kuba@kernel.org>; Madalin Bucur
> <madalin.bucur@nxp.com>; netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Kishon Vijay
> Abraham I <kishon@ti.com>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Leo Li <leoyang.li@nxp.com>; Rob
> Herring <robh+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Vinod
> Koul <vkoul@kernel.org>; devicetree@vger.kernel.org; linux-
> phy@lists.infradead.org
> Subject: Re: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
> bindings
> 
> 
> 
> On 7/21/22 10:20 AM, Camelia Alexandra Groza wrote:
> >> -----Original Message-----
> >> From: Sean Anderson <sean.anderson@seco.com>
> >> Sent: Saturday, July 16, 2022 1:00
> >> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> >> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> >> netdev@vger.kernel.org
> >> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> >> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> >> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean
> Anderson
> >> <sean.anderson@seco.com>; Kishon Vijay Abraham I <kishon@ti.com>;
> >> Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Leo Li
> >> <leoyang.li@nxp.com>; Rob Herring <robh+dt@kernel.org>; Shawn Guo
> >> <shawnguo@kernel.org>; Vinod Koul <vkoul@kernel.org>;
> >> devicetree@vger.kernel.org; linux-phy@lists.infradead.org
> >> Subject: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
> >> bindings
> >>
> >> This adds appropriate bindings for the macs which use the SerDes. The
> >> 156.25MHz fixed clock is a crystal. The 100MHz clocks (there are
> >> actually 3) come from a Renesas 6V49205B at address 69 on i2c0. There is
> >> no driver for this device (and as far as I know all you can do with the
> >> 100MHz clocks is gate them), so I have chosen to model it as a single
> >> fixed clock.
> >>
> >> Note: the SerDes1 lane numbering for the LS1046A is *reversed*.
> >> This means that Lane A (what the driver thinks is lane 0) uses pins
> >> SD1_TX3_P/N.
> >>
> >> Because this will break ethernet if the serdes is not enabled, enable
> >> the serdes driver by default on Layerscape.
> >>
> >> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> >> ---
> >> Please let me know if there is a better/more specific config I can use
> >> here.
> >>
> >> (no changes since v1)
> >
> > My LS1046ARDB hangs at boot with this patch right after the second SerDes
> is probed,
> > right before the point where the PCI host bridge is registered. I can get
> around this
> > either by disabling the second SerDes node from the device tree, or
> disabling
> > CONFIG_PCI_LAYERSCAPE at build.
> >
> > I haven't debugged it more but there seems to be an issue here.
> 
> Hm. Do you have anything plugged into the PCIe/SATA slots? I haven't been
> testing with
> anything there. For now, it may be better to just leave it disabled.
> 
> --Sean

Yes, I have an Intel e1000 card plugged in.

Camelia
Camelia Groza July 26, 2022, 11:35 a.m. UTC | #8
> -----Original Message-----
> From: Sean Anderson <sean.anderson@seco.com>
> Sent: Monday, July 25, 2022 23:02
> To: Camelia Alexandra Groza <camelia.groza@nxp.com>; David S . Miller
> <davem@davemloft.net>; Jakub Kicinski <kuba@kernel.org>; Madalin Bucur
> <madalin.bucur@nxp.com>; netdev@vger.kernel.org
> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Kishon Vijay
> Abraham I <kishon@ti.com>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Leo Li <leoyang.li@nxp.com>; Rob
> Herring <robh+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>; Vinod
> Koul <vkoul@kernel.org>; devicetree@vger.kernel.org; linux-
> phy@lists.infradead.org
> Subject: Re: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
> bindings
> 
> 
> 
> On 7/22/22 8:41 AM, Camelia Alexandra Groza wrote:
> >> -----Original Message-----
> >> From: Sean Anderson <sean.anderson@seco.com>
> >> Sent: Thursday, July 21, 2022 18:41
> >> To: Camelia Alexandra Groza <camelia.groza@nxp.com>; David S . Miller
> >> <davem@davemloft.net>; Jakub Kicinski <kuba@kernel.org>; Madalin
> Bucur
> >> <madalin.bucur@nxp.com>; netdev@vger.kernel.org
> >> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> >> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org; Russell
> >> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Kishon Vijay
> >> Abraham I <kishon@ti.com>; Krzysztof Kozlowski
> >> <krzysztof.kozlowski+dt@linaro.org>; Leo Li <leoyang.li@nxp.com>; Rob
> >> Herring <robh+dt@kernel.org>; Shawn Guo <shawnguo@kernel.org>;
> Vinod
> >> Koul <vkoul@kernel.org>; devicetree@vger.kernel.org; linux-
> >> phy@lists.infradead.org
> >> Subject: Re: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add
> serdes
> >> bindings
> >>
> >>
> >>
> >> On 7/21/22 10:20 AM, Camelia Alexandra Groza wrote:
> >> >> -----Original Message-----
> >> >> From: Sean Anderson <sean.anderson@seco.com>
> >> >> Sent: Saturday, July 16, 2022 1:00
> >> >> To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
> >> >> <kuba@kernel.org>; Madalin Bucur <madalin.bucur@nxp.com>;
> >> >> netdev@vger.kernel.org
> >> >> Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
> >> >> <edumazet@google.com>; linux-arm-kernel@lists.infradead.org;
> Russell
> >> >> King <linux@armlinux.org.uk>; linux-kernel@vger.kernel.org; Sean
> >> Anderson
> >> >> <sean.anderson@seco.com>; Kishon Vijay Abraham I
> <kishon@ti.com>;
> >> >> Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Leo Li
> >> >> <leoyang.li@nxp.com>; Rob Herring <robh+dt@kernel.org>; Shawn
> Guo
> >> >> <shawnguo@kernel.org>; Vinod Koul <vkoul@kernel.org>;
> >> >> devicetree@vger.kernel.org; linux-phy@lists.infradead.org
> >> >> Subject: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
> >> >> bindings
> >> >>
> >> >> This adds appropriate bindings for the macs which use the SerDes. The
> >> >> 156.25MHz fixed clock is a crystal. The 100MHz clocks (there are
> >> >> actually 3) come from a Renesas 6V49205B at address 69 on i2c0. There
> is
> >> >> no driver for this device (and as far as I know all you can do with the
> >> >> 100MHz clocks is gate them), so I have chosen to model it as a single
> >> >> fixed clock.
> >> >>
> >> >> Note: the SerDes1 lane numbering for the LS1046A is *reversed*.
> >> >> This means that Lane A (what the driver thinks is lane 0) uses pins
> >> >> SD1_TX3_P/N.
> >> >>
> >> >> Because this will break ethernet if the serdes is not enabled, enable
> >> >> the serdes driver by default on Layerscape.
> >> >>
> >> >> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> >> >> ---
> >> >> Please let me know if there is a better/more specific config I can use
> >> >> here.
> >> >>
> >> >> (no changes since v1)
> >> >
> >> > My LS1046ARDB hangs at boot with this patch right after the second
> SerDes
> >> is probed,
> >> > right before the point where the PCI host bridge is registered. I can get
> >> around this
> >> > either by disabling the second SerDes node from the device tree, or
> >> disabling
> >> > CONFIG_PCI_LAYERSCAPE at build.
> >> >
> >> > I haven't debugged it more but there seems to be an issue here.
> >>
> >> Hm. Do you have anything plugged into the PCIe/SATA slots? I haven't
> been
> >> testing with
> >> anything there. For now, it may be better to just leave it disabled.
> >>
> >> --Sean
> >
> > Yes, I have an Intel e1000 card plugged in.
> >
> > Camelia
> >
> 
> Can you try the following patch? I was able to boot with PCI with it applied.

Works for me as well. The board boots fine and the PCI card is functional. Thanks. 

> From 71f4136f1bdda89009936a9c24561b60e0554859 Mon Sep 17 00:00:00
> 2001
> From: Sean Anderson <sean.anderson@seco.com>
> Date: Mon, 25 Jul 2022 16:01:16 -0400
> Subject: [PATCH] arm64: dts: ls1046a: Fix missing PCIe lane
> 
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
>  arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> index 0b3765cad383..3841ba274782 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> @@ -532,7 +532,7 @@ pcie-0 {
>  					/* PCIe.1 x1 */
>  					cfg-1 {
>  						fsl,cfg = <0x1>;
> -						fsl,first-lane = <1>;
> +						fsl,first-lane = <0>;
>  					};
> 
>  					/* PCIe.1 x4 */
> @@ -543,6 +543,14 @@ cfg-3 {
>  					};
>  				};
> 
> +				/* PCIe.2 x1 */
> +				pcie-1 {
> +					fsl,index = <1>;
> +					fsl,proto = "pcie";
> +					fsl,cfg = <0x1>;
> +					fsl,first-lane = <1>;
> +				};
> +
>  				pcie-2 {
>  					fsl,index = <2>;
>  					fsl,proto = "pcie";
> --
> 2.35.1.1320.gc452695387.dirty