From patchwork Tue Apr 26 12:50:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?QWxsZW4tS0ggQ2hlbmcgKOeoi+WGoOWLsyk=?= X-Patchwork-Id: 1622361 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4KnhZd4sPFz9sDX for ; Tue, 26 Apr 2022 22:51:05 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239843AbiDZMyI (ORCPT ); Tue, 26 Apr 2022 08:54:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45394 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347133AbiDZMyH (ORCPT ); Tue, 26 Apr 2022 08:54:07 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C7E317C7BE; Tue, 26 Apr 2022 05:50:55 -0700 (PDT) X-UUID: 9b00ccdc0862465cbb6b52b87af257e8-20220426 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.4,REQID:35255217-e8a6-4c02-8a25-02df3857853d,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:-20,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,AC TION:release,TS:-20 X-CID-META: VersionHash:faefae9,CLOUDID:63e08ac6-85ee-4ac1-ac05-bd3f1e72e732,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,File:nil,QS:0,BEC:nil X-UUID: 9b00ccdc0862465cbb6b52b87af257e8-20220426 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1447591296; Tue, 26 Apr 2022 20:50:49 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Tue, 26 Apr 2022 20:50:48 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 26 Apr 2022 20:50:48 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski CC: , , , , , , "Chen-Yu Tsai" , Ryder Lee , Allen-KH Cheng Subject: [PATCH v5 0/2] Add basic node support for Mediatek MT8186 SoC Date: Tue, 26 Apr 2022 20:50:44 +0800 Message-ID: <20220426125046.17311-1-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-0.9 required=5.0 tests=BAYES_00,MAY_BE_FORGED, SPF_HELO_NONE,T_SPF_TEMPERROR,UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org MT8186 is a SoC based on 64bit ARMv8 architecture. It contains 6 CA55 and 2 CA78 cores. MT8186 share many HW IP with MT65xx series. This patchset was tested on MT8186 evaluation board to shell. Based on matthias/, v5.18-next/dts64. and add the below PATCHs - clk series: 20220409132251.31725-1-chun-jie.chen@mediatek.com - mt8186 timer compatible: 20220311130732.22706-2-allen-kh.cheng@mediatek.com - mt8186 watchdog compatible from commit 888423f98c8f in linux/kernel/git/groeck/linux-staging.git, watchdog-next - reset header from commit 457ece3a0fbf in linux/kernel/git/groeck/linux-staging.git, watchdog-next changes since v4: - correct driver clock of mt8186 - add power domains controller and clock controllers - add pinctrl, usb host, spi and i2c nodes - add node status in mt8186-evb.dts - correct some dtbs_check warnings changes since v3: - remove serial, mmc and phy patch from series. (already merged) - remove mcusysoff node - move oscillator nodes at the head of dts - change name from usb-phy to t-phy changes since v2:$ - add soc {} in mt8186.dtsi changes since v1: - add dt-bindings: arm: Add compatible for Mediatek MT8186 Allen-KH Cheng (2): dt-bindings: arm: Add compatible for Mediatek MT8186 arm64: dts: Add Mediatek SoC MT8186 dts and evaluation board and Makefile .../devicetree/bindings/arm/mediatek.yaml | 4 + arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8186-evb.dts | 232 +++++ arch/arm64/boot/dts/mediatek/mt8186.dtsi | 932 ++++++++++++++++++ 4 files changed, 1169 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8186-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8186.dtsi