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[v5,00/24] NVIDIA Tegra ARM32 device-tree patches for 5.17 (new devices and more)

Message ID 20211208173609.4064-1-digetx@gmail.com
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Series NVIDIA Tegra ARM32 device-tree patches for 5.17 (new devices and more) | expand

Message

Dmitry Osipenko Dec. 8, 2021, 5:35 p.m. UTC
In this patchset you will find:

  - New device-trees of ASUS Transformer and Pegatron Chagall tablets.

  - New device-tree of Nyan Big Chromebook variant that has 1080p display
    panel.

  - Enabled video decoder on Tegra114.

  - Minor cleanup of Nexus7 device-tree.

  - Renamed clocks and regulator nodes. I'm sending this patch second time
    because previously there was no good reason given about why not to apply
    it. Please apply it this time.

  - Fixes for T124 device-trees.

Changelog:

v5: - Minor update. Maxim improved commit messages. We added links to the
      postmarketOS Wiki.

v4: - Factored out common parts of ASUS device-trees into separate patches.
      I retained the original author of the tegra30-asus-transformer-common.dtsi
      after chatting with Svyatoslav. Initially I wanted to change the
      authorship to Michał, but not that much left from the original DT that
      was created by Michał, so it's fair to keep Svyatoslav the author.
      I explained in the commit message that the common DT was derived from
      the Michał's TF300T DT and then reworked heavily, I also added Michał
      as co-developer of the common part.

    - Added new T124 patches that were requested by Thomas Graichen. They
      restore USB, CPUFreq and fix overheating of Nyan Chromebooks.

    - Added patches that update tegra_defconfig and multi_v7_defconfig with
      enabled drivers used by ASUS Transformers and Nyan Chromebooks.

    - Added acks that were given by Rob Herring to v3.

    - Changed display panel compatible of ASUS TF701T like it was suggested
      by Rob Herring in other thread.

    - Removed yet unused SDMMC1 pinmux from TF701T DT as was requested by
      Anton Bambura.

    - Added patch which adds node labels to T30 DTSI. It eases porting
      devices to upstream. This was requested by Michał Mirosław.

v3: - Maxim added couple "FIXME" comments to Transformer device-trees for
      things that are yet missing on kernel side, and thus, can't be enabled
      in the DT for now.

    - Maxim also found that v2 had a small problem in the patch which adds
      device-tree for Chagall tablet. Turned out I made a mistake during
      rebase of the patches and haven't noticed it, it's fixed now.

v2: - Svyatoslav and Maxim made couple corrections to regulators, comments
      and default brightness of the device-trees.

    - Added thermtrip node to transformers DT as we now have PMIC fix for
      it [1], it works properly now.

      [1] https://patchwork.ozlabs.org/project/linux-tegra/patch/20211124190104.23554-1-digetx@gmail.com/

    - Changed sound card model names to make them per-device and consistent
      with the names that other Tegra DTs already use in upstream. This will
      prevent potential ABI breakages in the future if we will find that sound
      of some device needs extra differentiation.

Anton Bambura (3):
  ARM: tegra: Add labels to tegra114.dtsi
  ARM: tegra: Add device-tree for ASUS Transformer Pad TF701T
  ARM: tegra: Enable video decoder on Tegra114

David Heidelberg (3):
  dt-bindings: ARM: tegra: Document Pegatron Chagall
  ARM: tegra: Name clock and regulator nodes according to DT-schema
  ARM: tegra: nexus7: Drop clock-frequency from NFC node

Dmitry Osipenko (6):
  ARM: tegra: Add device-tree for 1080p version of Nyan Big
  ARM: tegra: Enable HDMI CEC on Nyan
  ARM: tegra: Enable CPU DFLL on Nyan
  ARM: tegra: Add CPU thermal zones to Nyan device-tree
  ARM: tegra_defconfig: Enable drivers wanted by Acer Chromebooks and
    ASUS tablets
  ARM: config: multi v7: Enable display drivers used by Tegra devices

Maxim Schwalm (2):
  ARM: tegra: Add common device-tree for LVDS display panels of Tegra30
    ASUS tablets
  ARM: tegra: nexus7: Use common LVDS display device-tree

Michał Mirosław (2):
  ARM: tegra: Add labels to tegra30.dtsi
  ARM: tegra: Add device-tree for ASUS Transformer Pad TF300T

Nikola Milosavljevic (1):
  ARM: tegra: Add device-tree for ASUS Transformer EeePad TF101

Stefan Eichenberger (1):
  ARM: tegra: Add usb-role-switch property to USB OTG ports

Svyatoslav Ryhel (6):
  dt-bindings: ARM: tegra: Document ASUS Transformers
  ARM: tegra: Add common device-tree base for Tegra30 ASUS Transformers
  ARM: tegra: Add device-tree for ASUS Transformer Prime TF201
  ARM: tegra: Add device-tree for ASUS Transformer Pad TF300TG
  ARM: tegra: Add device-tree for ASUS Transformer Infinity TF700T
  ARM: tegra: Add device-tree for Pegatron Chagall

 .../devicetree/bindings/arm/tegra.yaml        |   19 +
 arch/arm/boot/dts/Makefile                    |   10 +-
 arch/arm/boot/dts/tegra114-asus-tf701t.dts    |  802 +++++
 arch/arm/boot/dts/tegra114-dalmore.dts        |   16 +-
 arch/arm/boot/dts/tegra114-roth.dts           |   14 +-
 arch/arm/boot/dts/tegra114-tn7.dts            |    8 +-
 arch/arm/boot/dts/tegra114.dtsi               |   90 +-
 arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi   |    1 +
 arch/arm/boot/dts/tegra124-apalis.dtsi        |    1 +
 arch/arm/boot/dts/tegra124-jetson-tk1.dts     |   26 +-
 arch/arm/boot/dts/tegra124-nyan-big-fhd.dts   |   11 +
 arch/arm/boot/dts/tegra124-nyan.dtsi          |   84 +-
 arch/arm/boot/dts/tegra124-venice2.dts        |   30 +-
 .../boot/dts/tegra20-acer-a500-picasso.dts    |   12 +-
 arch/arm/boot/dts/tegra20-asus-tf101.dts      | 1191 +++++++
 arch/arm/boot/dts/tegra20-harmony.dts         |   16 +-
 arch/arm/boot/dts/tegra20-medcom-wide.dts     |    8 +-
 arch/arm/boot/dts/tegra20-paz00.dts           |    6 +-
 arch/arm/boot/dts/tegra20-plutux.dts          |    8 +-
 arch/arm/boot/dts/tegra20-seaboard.dts        |   16 +-
 arch/arm/boot/dts/tegra20-tamonten.dtsi       |    4 +-
 arch/arm/boot/dts/tegra20-tec.dts             |    8 +-
 arch/arm/boot/dts/tegra20-trimslice.dts       |   12 +-
 arch/arm/boot/dts/tegra20-ventana.dts         |   12 +-
 .../boot/dts/tegra30-asus-lvds-display.dtsi   |   61 +
 .../tegra30-asus-nexus7-grouper-common.dtsi   |   64 +-
 ...egra30-asus-nexus7-grouper-maxim-pmic.dtsi |    4 +-
 .../tegra30-asus-nexus7-grouper-ti-pmic.dtsi  |    2 +-
 .../boot/dts/tegra30-asus-nexus7-grouper.dtsi |    1 -
 .../boot/dts/tegra30-asus-nexus7-tilapia.dtsi |    2 -
 arch/arm/boot/dts/tegra30-asus-tf201.dts      |  623 ++++
 arch/arm/boot/dts/tegra30-asus-tf300t.dts     | 1031 ++++++
 arch/arm/boot/dts/tegra30-asus-tf300tg.dts    | 1072 +++++++
 arch/arm/boot/dts/tegra30-asus-tf700t.dts     |  818 +++++
 .../dts/tegra30-asus-transformer-common.dtsi  | 1729 ++++++++++
 arch/arm/boot/dts/tegra30-beaver.dts          |   20 +-
 arch/arm/boot/dts/tegra30-cardhu-a02.dts      |   12 +-
 arch/arm/boot/dts/tegra30-cardhu-a04.dts      |   14 +-
 arch/arm/boot/dts/tegra30-cardhu.dtsi         |   28 +-
 .../arm/boot/dts/tegra30-pegatron-chagall.dts | 2794 +++++++++++++++++
 arch/arm/boot/dts/tegra30.dtsi                |   36 +-
 arch/arm/configs/multi_v7_defconfig           |    5 +
 arch/arm/configs/tegra_defconfig              |    6 +
 43 files changed, 10469 insertions(+), 258 deletions(-)
 create mode 100644 arch/arm/boot/dts/tegra114-asus-tf701t.dts
 create mode 100644 arch/arm/boot/dts/tegra124-nyan-big-fhd.dts
 create mode 100644 arch/arm/boot/dts/tegra20-asus-tf101.dts
 create mode 100644 arch/arm/boot/dts/tegra30-asus-lvds-display.dtsi
 create mode 100644 arch/arm/boot/dts/tegra30-asus-tf201.dts
 create mode 100644 arch/arm/boot/dts/tegra30-asus-tf300t.dts
 create mode 100644 arch/arm/boot/dts/tegra30-asus-tf300tg.dts
 create mode 100644 arch/arm/boot/dts/tegra30-asus-tf700t.dts
 create mode 100644 arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi
 create mode 100644 arch/arm/boot/dts/tegra30-pegatron-chagall.dts

Comments

Thierry Reding Dec. 10, 2021, 3:22 p.m. UTC | #1
On Wed, Dec 08, 2021 at 08:35:48PM +0300, Dmitry Osipenko wrote:
> From: Michał Mirosław <mirq-linux@rere.qmqm.pl>
> 
> Add phandle names for memory/I2C/SPI/USB/SDMMC controller nodes to allow
> for cleaner device descriptions.
> 
> Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
> ---
>  arch/arm/boot/dts/tegra30.dtsi | 36 +++++++++++++++++-----------------
>  1 file changed, 18 insertions(+), 18 deletions(-)

We typically only add those when they are really needed. These are
technically harmless because without a reference, DTC won't actually
create a phandle property, but dangling labels are the kind of thing
that some janitor may at some point want to remove with some scripts,
so I'm hesitant to apply this because it'll likely cause churn in the
future.

Thierry
Thierry Reding Dec. 10, 2021, 3:46 p.m. UTC | #2
On Wed, Dec 08, 2021 at 08:35:50PM +0300, Dmitry Osipenko wrote:
> From: Nikola Milosavljevic <mnidza@outlook.com>
> 
> Add device-tree for Tegra20-based ASUS Transformer EeePad TF101.
> 
> Link: https://wiki.postmarketos.org/wiki/ASUS_Eee_Pad_Transformer_(asus-tf101)
> Co-developed-by: David Heidelberg <david@ixit.cz>
> Signed-off-by: David Heidelberg <david@ixit.cz>
> Co-developed-by: Svyatoslav Ryhel <clamor95@gmail.com>
> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> Co-developed-by: Antoni Aloy Torrens <aaloytorrens@gmail.com>
> Signed-off-by: Antoni Aloy Torrens <aaloytorrens@gmail.com>
> Signed-off-by: Nikola Milosavljevic <mnidza@outlook.com>
> Co-developed-by: Dmitry Osipenko <digetx@gmail.com>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
>  arch/arm/boot/dts/Makefile               |    1 +
>  arch/arm/boot/dts/tegra20-asus-tf101.dts | 1191 ++++++++++++++++++++++
>  2 files changed, 1192 insertions(+)
>  create mode 100644 arch/arm/boot/dts/tegra20-asus-tf101.dts
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 8a2dfdf01ce3..8fdebf7c1afe 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1304,6 +1304,7 @@ dtb-$(CONFIG_MACH_SUNIV) += \
>  	suniv-f1c100s-licheepi-nano.dtb
>  dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
>  	tegra20-acer-a500-picasso.dtb \
> +	tegra20-asus-tf101.dtb \
>  	tegra20-harmony.dtb \
>  	tegra20-colibri-eval-v3.dtb \
>  	tegra20-colibri-iris.dtb \
> diff --git a/arch/arm/boot/dts/tegra20-asus-tf101.dts b/arch/arm/boot/dts/tegra20-asus-tf101.dts
> new file mode 100644
> index 000000000000..4dc0722c28f5
> --- /dev/null
> +++ b/arch/arm/boot/dts/tegra20-asus-tf101.dts
> @@ -0,0 +1,1191 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/dts-v1/;
> +
> +#include <dt-bindings/input/atmel-maxtouch.h>
> +#include <dt-bindings/input/gpio-keys.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/thermal/thermal.h>
> +
> +#include "tegra20.dtsi"
> +#include "tegra20-cpu-opp.dtsi"
> +#include "tegra20-cpu-opp-microvolt.dtsi"
> +
> +/ {
> +	model = "ASUS EeePad Transformer TF101";
> +	compatible = "asus,tf101", "nvidia,tegra20";
> +	chassis-type = "convertible";
> +
> +	aliases {
> +		mmc0 = &sdmmc4; /* eMMC */
> +		mmc1 = &sdmmc3; /* MicroSD */
> +		mmc2 = &sdmmc1; /* WiFi */
> +
> +		rtc0 = &pmic;
> +		rtc1 = "/rtc@7000e000";
> +
> +		serial0 = &uartd;
> +		serial1 = &uartc; /* Bluetooth */
> +		serial2 = &uartb; /* GPS */
> +	};
> +
> +	/*
> +	 * The decompressor and also some bootloaders rely on a
> +	 * pre-existing /chosen node to be available to insert the
> +	 * command line and merge other ATAGS info.
> +	 */
> +	chosen {};
> +
> +	memory@0 {
> +		reg = <0x00000000 0x40000000>;
> +	};
> +
> +	reserved-memory {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges;
> +
> +		ramoops@2ffe0000 {
> +			compatible = "ramoops";
> +			reg = <0x2ffe0000 0x10000>;	/* 64kB */
> +			console-size = <0x8000>;	/* 32kB */
> +			record-size = <0x400>;		/*  1kB */
> +			ecc-size = <16>;
> +		};
> +
> +		linux,cma@30000000 {
> +			compatible = "shared-dma-pool";
> +			alloc-ranges = <0x30000000 0x10000000>;
> +			size = <0x10000000>; /* 256MiB */
> +			linux,cma-default;
> +			reusable;
> +		};
> +	};
> +
> +	host1x@50000000 {
> +		dc@54200000 {
> +			rgb {
> +				status = "okay";
> +
> +				port@0 {
> +					lcd_output: endpoint {
> +						remote-endpoint = <&lvds_encoder_input>;
> +						bus-width = <18>;
> +					};
> +				};
> +			};
> +		};
> +
> +		hdmi@54280000 {
> +			status = "okay";
> +
> +			vdd-supply = <&hdmi_vdd_reg>;
> +			pll-supply = <&hdmi_pll_reg>;
> +			hdmi-supply = <&vdd_hdmi_en>;
> +
> +			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
> +			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
> +				GPIO_ACTIVE_HIGH>;
> +		};
> +	};
> +
> +	gpio@6000d000 {
> +		charging-enable-hog {
> +			gpio-hog;
> +			gpios = <TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
> +			output-low;
> +		};
> +	};

Isn't this something that we may want to change at some point? My
understanding is that GPIO hogs are permanent, so it won't be possible
to grab GPIO R.6 and change this.

Are there any plans to allow setting this at runtime?

[...]
> +	i2c2: i2c@7000c400 {
> +		status = "okay";
> +		clock-frequency = <100000>;
> +	};
> +
> +	i2cmux {

This doesn't belong here. The ordering is by unit-address and everything
without unit-address needs to move after the nodes with unit-addresses
and be sorted alphabetically.

> +		compatible = "i2c-mux-pinctrl";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		i2c-parent = <&i2c2>;
> +
> +		pinctrl-names = "ddc", "pta", "idle";
> +		pinctrl-0 = <&state_i2cmux_ddc>;
> +		pinctrl-1 = <&state_i2cmux_pta>;
> +		pinctrl-2 = <&state_i2cmux_idle>;
> +
> +		hdmi_ddc: i2c@0 {
> +			reg = <0>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +		};
> +
> +		lvds_ddc: i2c@1 {
> +			reg = <1>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			smart-battery@b {
> +				compatible = "ti,bq20z75", "sbs,sbs-battery";
> +				reg = <0xb>;
> +				sbs,i2c-retry-count = <2>;
> +				sbs,poll-retry-count = <10>;
> +				power-supplies = <&mains>;
> +			};
> +		};
> +	};
> +
> +	i2c@7000c500 {
> +		status = "okay";
> +		clock-frequency = <400000>;
> +	};
> +
> +	i2c@7000d000 {
> +		status = "okay";
> +		clock-frequency = <400000>;
> +
> +		pmic: pmic@34 {
> +			compatible = "ti,tps6586x";
> +			reg = <0x34>;
> +			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
> +
> +			ti,system-power-controller;
> +
> +			#gpio-cells = <2>;
> +			gpio-controller;
> +
> +			sys-supply = <&vdd_5v0_sys>;
> +			vin-sm0-supply = <&sys_reg>;
> +			vin-sm1-supply = <&sys_reg>;
> +			vin-sm2-supply = <&sys_reg>;
> +			vinldo01-supply = <&sm2_reg>;
> +			vinldo23-supply = <&sm2_reg>;
> +			vinldo4-supply = <&sm2_reg>;
> +			vinldo678-supply = <&sm2_reg>;
> +			vinldo9-supply = <&sm2_reg>;
> +
> +			regulators {
> +				sys_reg: sys {
> +					regulator-name = "vdd_sys";
> +					regulator-always-on;
> +				};
> +
> +				vdd_core: sm0 {
> +					regulator-name = "vdd_sm0,vdd_core";
> +					regulator-min-microvolt = <950000>;
> +					regulator-max-microvolt = <1300000>;
> +					regulator-coupled-with = <&rtc_vdd &vdd_cpu>;
> +					regulator-coupled-max-spread = <170000 550000>;
> +					regulator-always-on;
> +					regulator-boot-on;
> +
> +					nvidia,tegra-core-regulator;
> +				};
> +
> +				vdd_cpu: sm1 {
> +					regulator-name = "vdd_sm1,vdd_cpu";
> +					regulator-min-microvolt = <750000>;
> +					regulator-max-microvolt = <1125000>;
> +					regulator-coupled-with = <&vdd_core &rtc_vdd>;
> +					regulator-coupled-max-spread = <550000 550000>;
> +					regulator-always-on;
> +					regulator-boot-on;
> +
> +					nvidia,tegra-cpu-regulator;
> +				};
> +
> +				sm2_reg: sm2 {
> +					regulator-name = "vdd_sm2,vin_ldo*";
> +					regulator-min-microvolt = <3700000>;
> +					regulator-max-microvolt = <3700000>;
> +					regulator-always-on;
> +				};
> +
> +				/* LDO0 is not connected to anything */
> +
> +				ldo1 {
> +					regulator-name = "vdd_ldo1,avdd_pll*";
> +					regulator-min-microvolt = <1100000>;
> +					regulator-max-microvolt = <1100000>;
> +					regulator-always-on;
> +				};
> +
> +				rtc_vdd: ldo2 {
> +					regulator-name = "vdd_ldo2,vdd_rtc";
> +					regulator-min-microvolt = <950000>;
> +					regulator-max-microvolt = <1300000>;
> +					regulator-coupled-with = <&vdd_core &vdd_cpu>;
> +					regulator-coupled-max-spread = <170000 550000>;
> +					regulator-always-on;
> +					regulator-boot-on;
> +
> +					nvidia,tegra-rtc-regulator;
> +				};
> +
> +				ldo3 {
> +					regulator-name = "vdd_ldo3,avdd_usb*";
> +					regulator-min-microvolt = <3300000>;
> +					regulator-max-microvolt = <3300000>;
> +					regulator-always-on;
> +				};
> +
> +				ldo4 {
> +					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
> +					regulator-min-microvolt = <1800000>;
> +					regulator-max-microvolt = <1800000>;
> +					regulator-always-on;
> +				};
> +
> +				vcore_emmc: ldo5 {
> +					regulator-name = "vdd_ldo5,vcore_mmc";
> +					regulator-min-microvolt = <2850000>;
> +					regulator-max-microvolt = <2850000>;
> +					regulator-always-on;
> +				};
> +
> +				ldo6 {
> +					regulator-name = "vdd_ldo6,avdd_vdac";
> +					regulator-min-microvolt = <1800000>;
> +					regulator-max-microvolt = <1800000>;
> +				};
> +
> +				hdmi_vdd_reg: ldo7 {
> +					regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
> +					regulator-min-microvolt = <3300000>;
> +					regulator-max-microvolt = <3300000>;
> +				};
> +
> +				hdmi_pll_reg: ldo8 {
> +					regulator-name = "vdd_ldo8,avdd_hdmi_pll";
> +					regulator-min-microvolt = <1800000>;
> +					regulator-max-microvolt = <1800000>;
> +				};
> +
> +				ldo9 {
> +					regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
> +					regulator-min-microvolt = <2850000>;
> +					regulator-max-microvolt = <2850000>;
> +					regulator-always-on;
> +				};
> +
> +				ldo_rtc {
> +					regulator-name = "vdd_rtc_out,vdd_cell";
> +					regulator-min-microvolt = <3300000>;
> +					regulator-max-microvolt = <3300000>;
> +					regulator-always-on;
> +				};
> +			};
> +		};
> +
> +		nct1008: temperature-sensor@4c {
> +			compatible = "onnn,nct1008";
> +			reg = <0x4c>;
> +			vcc-supply = <&vdd_3v3_sys>;
> +
> +			interrupt-parent = <&gpio>;
> +			interrupts = <TEGRA_GPIO(N, 6) IRQ_TYPE_EDGE_FALLING>;
> +
> +			#thermal-sensor-cells = <1>;
> +		};
> +	};
> +
> +	pmc@7000e400 {
> +		nvidia,invert-interrupt;
> +		nvidia,suspend-mode = <1>;
> +		nvidia,cpu-pwr-good-time = <2000>;
> +		nvidia,cpu-pwr-off-time = <100>;
> +		nvidia,core-pwr-good-time = <3845 3845>;
> +		nvidia,core-pwr-off-time = <458>;
> +		nvidia,sys-clock-req-active-high;
> +		core-supply = <&vdd_core>;
> +	};
> +
> +	/* Peripheral USB via ASUS connector */
> +	usb@c5000000 {
> +		compatible = "nvidia,tegra20-udc";
> +		status = "okay";
> +		dr_mode = "peripheral";
> +	};
> +
> +	usb-phy@c5000000 {
> +		status = "okay";
> +		dr_mode = "peripheral";
> +		nvidia,xcvr-setup-use-fuses;
> +		nvidia,xcvr-lsfslew = <2>;
> +		nvidia,xcvr-lsrslew = <2>;
> +		vbus-supply = <&vdd_5v0_sys>;
> +	};
> +
> +	/* Dock's USB port */
> +	usb@c5008000 {
> +		status = "okay";
> +	};
> +
> +	usb-phy@c5008000 {
> +		status = "okay";
> +		nvidia,xcvr-setup-use-fuses;
> +		vbus-supply = <&vdd_5v0_sys>;
> +	};
> +
> +	brcm_wifi_pwrseq: wifi-pwrseq {
> +		compatible = "mmc-pwrseq-simple";
> +
> +		clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
> +		clock-names = "ext_clock";
> +
> +		reset-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_LOW>;
> +		post-power-on-delay-ms = <200>;
> +		power-off-delay-us = <200>;
> +	};
> +
> +	sdmmc1: mmc@c8000000 {
> +		status = "okay";
> +
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		assigned-clocks = <&tegra_car TEGRA20_CLK_SDMMC1>;
> +		assigned-clock-parents = <&tegra_car TEGRA20_CLK_PLL_C>;
> +		assigned-clock-rates = <40000000>;
> +
> +		max-frequency = <40000000>;
> +		keep-power-in-suspend;
> +		bus-width = <4>;
> +		non-removable;
> +
> +		mmc-pwrseq = <&brcm_wifi_pwrseq>;
> +		vmmc-supply = <&vdd_3v3_sys>;
> +		vqmmc-supply = <&vdd_3v3_sys>;
> +
> +		/* Azurewave AW-NH615 BCM4329B1 */
> +		wifi@1 {
> +			compatible = "brcm,bcm4329-fmac";
> +			reg = <1>;
> +
> +			interrupt-parent = <&gpio>;
> +			interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "host-wake";
> +		};
> +	};
> +
> +	sdmmc3: mmc@c8000400 {
> +		status = "okay";
> +		bus-width = <4>;
> +		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
> +		wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
> +		power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
> +		vmmc-supply = <&vdd_3v3_sys>;
> +		vqmmc-supply = <&vdd_3v3_sys>;
> +	};
> +
> +	sdmmc4: mmc@c8000600 {
> +		status = "okay";
> +		bus-width = <8>;
> +		vmmc-supply = <&vcore_emmc>;
> +		vqmmc-supply = <&vdd_3v3_sys>;
> +		non-removable;
> +	};
> +
> +	mains: ac-adapter-detect {
> +		compatible = "gpio-charger";
> +		charger-type = "mains";
> +		gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
> +	};
> +
> +	backlight: backlight {
> +		compatible = "pwm-backlight";
> +
> +		enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
> +		power-supply = <&vdd_3v3_sys>;
> +		pwms = <&pwm 2 4000000>;
> +
> +		brightness-levels = <7 255>;
> +		num-interpolated-steps = <248>;
> +		default-brightness-level = <20>;
> +	};
> +
> +	/* PMIC has a built-in 32KHz oscillator which is used by PMC */
> +	clk32k_in: clock-32k-in {
> +		compatible = "fixed-clock";
> +		clock-frequency = <32768>;
> +		#clock-cells = <0>;
> +	};
> +
> +	cpus {
> +		cpu0: cpu@0 {
> +			cpu-supply = <&vdd_cpu>;
> +			operating-points-v2 = <&cpu0_opp_table>;
> +			#cooling-cells = <2>;
> +		};
> +
> +		cpu1: cpu@1 {
> +			cpu-supply = <&vdd_cpu>;
> +			operating-points-v2 = <&cpu0_opp_table>;
> +			#cooling-cells = <2>;
> +		};
> +	};
> +
> +	gpio-keys {
> +		compatible = "gpio-keys";
> +
> +		dock-hall-sensor {
> +			label = "Lid";
> +			gpios = <&gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_LOW>;
> +			linux,input-type = <EV_SW>;
> +			linux,code = <SW_LID>;
> +			debounce-interval = <500>;
> +			wakeup-event-action = <EV_ACT_ASSERTED>;
> +			wakeup-source;
> +		};
> +
> +		power {
> +			label = "Power";
> +			gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
> +			linux,code = <KEY_POWER>;
> +			debounce-interval = <10>;
> +			wakeup-event-action = <EV_ACT_ASSERTED>;
> +			wakeup-source;
> +		};
> +
> +		volume-up {
> +			label = "Volume Up";
> +			gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
> +			linux,code = <KEY_VOLUMEUP>;
> +			debounce-interval = <10>;
> +			wakeup-event-action = <EV_ACT_ASSERTED>;
> +			wakeup-source;
> +		};
> +
> +		volume-down {
> +			label = "Volume Down";
> +			gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
> +			linux,code = <KEY_VOLUMEDOWN>;
> +			debounce-interval = <10>;
> +			wakeup-event-action = <EV_ACT_ASSERTED>;
> +			wakeup-source;
> +		};
> +	};
> +
> +	lvds-encoder {
> +		compatible = "ti,sn75lvds83", "lvds-encoder";
> +
> +		powerdown-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_LOW>;
> +		power-supply = <&vdd_3v3_sys>;
> +
> +		ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			port@0 {
> +				reg = <0>;
> +
> +				lvds_encoder_input: endpoint {
> +					remote-endpoint = <&lcd_output>;
> +				};
> +			};
> +
> +			port@1 {
> +				reg = <1>;
> +
> +				lvds_encoder_output: endpoint {
> +					remote-endpoint = <&panel_input>;
> +				};
> +			};
> +		};
> +	};
> +
> +	display-panel {
> +		compatible = "panel-lvds";
> +
> +		/* AUO B101EW05 using custom timings */
> +
> +		backlight = <&backlight>;
> +		ddc-i2c-bus = <&lvds_ddc>;
> +		power-supply = <&vdd_pnl_reg>;
> +
> +		width-mm = <218>;
> +		height-mm = <135>;
> +
> +		data-mapping = "jeida-18";
> +
> +		panel-timing {
> +			clock-frequency = <71200000>;
> +			hactive = <1280>;
> +			vactive = <800>;
> +			hfront-porch = <8>;
> +			hback-porch = <18>;
> +			hsync-len = <184>;
> +			vsync-len = <3>;
> +			vfront-porch = <4>;
> +			vback-porch = <8>;
> +		};
> +
> +		port {
> +			panel_input: endpoint {
> +				remote-endpoint = <&lvds_encoder_output>;
> +			};
> +		};
> +	};
> +
> +	vdd_5v0_sys: regulator-0 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vdd_5v0";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		regulator-always-on;
> +	};
> +
> +	vdd_3v3_sys: regulator-1 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vdd_3v3_vs";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		regulator-always-on;
> +		vin-supply = <&vdd_5v0_sys>;
> +	};
> +
> +	regulator-2 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "pcie_vdd";
> +		regulator-min-microvolt = <1500000>;
> +		regulator-max-microvolt = <1500000>;
> +		gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
> +		regulator-always-on;
> +	};
> +
> +	vdd_pnl_reg: regulator-3 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vdd_pnl";
> +		regulator-min-microvolt = <2800000>;
> +		regulator-max-microvolt = <2800000>;
> +		gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +	};
> +
> +	vdd_1v8_sys: regulator-4 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vdd_1v8_vs";
> +		regulator-min-microvolt = <1800000>;
> +		regulator-max-microvolt = <1800000>;
> +		regulator-always-on;
> +		vin-supply = <&vdd_5v0_sys>;
> +	};
> +
> +	vdd_hdmi_en: regulator-5 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vdd_5v0_hdmi_en";
> +		regulator-min-microvolt = <5000000>;
> +		regulator-max-microvolt = <5000000>;
> +		regulator-always-on;
> +		vin-supply = <&vdd_5v0_sys>;
> +		gpio = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +	};
> +
> +	sound {
> +		compatible = "asus,tegra-audio-wm8903-tf101",
> +			     "nvidia,tegra-audio-wm8903";
> +		nvidia,model = "Asus EeePad Transformer WM8903";
> +
> +		nvidia,audio-routing =
> +			"Headphone Jack", "HPOUTR",
> +			"Headphone Jack", "HPOUTL",
> +			"Int Spk", "ROP",
> +			"Int Spk", "RON",
> +			"Int Spk", "LOP",
> +			"Int Spk", "LON",
> +			"Mic Jack", "MICBIAS",
> +			"IN1L", "Mic Jack";
> +
> +		nvidia,i2s-controller = <&tegra_i2s1>;
> +		nvidia,audio-codec = <&wm8903>;
> +
> +		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
> +		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
> +		nvidia,headset;
> +
> +		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
> +			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
> +			 <&tegra_car TEGRA20_CLK_CDEV1>;
> +		clock-names = "pll_a", "pll_a_out0", "mclk";
> +	};
> +
> +	thermal-zones {
> +		skin-thermal {
> +			polling-delay-passive = <1000>; /* milliseconds */
> +			polling-delay = <0>; /* milliseconds */
> +
> +			thermal-sensors = <&nct1008 0>;
> +		};
> +
> +		cpu-thermal {
> +			polling-delay-passive = <1000>; /* milliseconds */
> +			polling-delay = <5000>; /* milliseconds */
> +
> +			thermal-sensors = <&nct1008 1>;
> +
> +			trips {
> +				trip0: cpu-alert0 {
> +					/* start throttling at 50C */
> +					temperature = <50000>;
> +					hysteresis = <200>;
> +					type = "passive";
> +				};
> +
> +				trip1: cpu-crit {
> +					/* shut down at 60C */
> +					temperature = <60000>;
> +					hysteresis = <2000>;
> +					type = "critical";
> +				};
> +			};
> +
> +			cooling-maps {
> +				map0 {
> +					trip = <&trip0>;
> +					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +				};
> +			};
> +		};
> +	};
> +
> +	memory-controller@7000f400 {
> +		nvidia,use-ram-code;
> +
> +		emc-tables@3 {
> +			reg = <0x3>;
> +
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			lpddr2 {
> +				compatible = "elpida,B8132B2PB-6D-F", "jedec,lpddr2-s4";
> +				revision-id1 = <1>;
> +				density = <2048>;
> +				io-width = <16>;
> +			};
> +
> +			emc-table@25000 {

Ugh... looking at the bindings for this the naming here is rather
unfortunate. emc-tables@3 and emc-table@*... the top-level emc-tables
are really tables, but the emc-table@* are really entries or rows in
that table, not tables themselves. It's also rather unfortunate that we
duplicate the frequency in both the "reg" and "clock-frequency"
properties. One of them would've been enough.

Anyway, looks like this has basically been like this since forever, so
not much that can be done about it.

Again, the memory-controller node needs to be sorted differently. There
are other occurrences of this throughout the file.

Thierry
Thierry Reding Dec. 10, 2021, 3:50 p.m. UTC | #3
On Wed, Dec 08, 2021 at 08:35:51PM +0300, Dmitry Osipenko wrote:
> From: Svyatoslav Ryhel <clamor95@gmail.com>
> 
> Add common DTSI for Tegra30 ASUS Transformers. It will be used by multiple
> device-trees of ASUS devices. The common part initially was born out of
> the ASUS TF300T tablet's device-tree that was created by Michał Mirosław.
> It was heavily reworked and improved by Svyatoslav Ryhel, Maxim Schwalm,
> Ion Agorria et al.
> 
> [digetx@gmail.com: factored out common part into separate patch and wrote commit message]
> Co-developed-by: Ion Agorria <ion@agorria.com>
> Signed-off-by: Ion Agorria <ion@agorria.com>
> Co-developed-by: Maxim Schwalm <maxim.schwalm@gmail.com>
> Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com>
> Co-developed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
> Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
>  .../dts/tegra30-asus-transformer-common.dtsi  | 1729 +++++++++++++++++
>  1 file changed, 1729 insertions(+)
>  create mode 100644 arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi
> 
> diff --git a/arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi b/arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi
> new file mode 100644
> index 000000000000..be77212dd8c7
> --- /dev/null
> +++ b/arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi
> @@ -0,0 +1,1729 @@
> +// SPDX-License-Identifier: GPL-2.0
> +
> +#include <dt-bindings/input/gpio-keys.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/thermal/thermal.h>
> +
> +#include "tegra30.dtsi"
> +#include "tegra30-cpu-opp.dtsi"
> +#include "tegra30-cpu-opp-microvolt.dtsi"
> +
> +/ {
> +	chassis-type = "convertible";
> +
> +	aliases {
> +		mmc0 = &sdmmc4;	/* eMMC */

Looks like a tab snuck in there... otherwise this also has some nodes
sorted in the wrong order.

[...]
> +	pad-keys {

Any specific reason why this is called pad-keys? We call it gpio-keys
everywhere else.

Thierry
Dmitry Osipenko Dec. 10, 2021, 4:26 p.m. UTC | #4
10.12.2021 18:22, Thierry Reding пишет:
> On Wed, Dec 08, 2021 at 08:35:48PM +0300, Dmitry Osipenko wrote:
>> From: Michał Mirosław <mirq-linux@rere.qmqm.pl>
>>
>> Add phandle names for memory/I2C/SPI/USB/SDMMC controller nodes to allow
>> for cleaner device descriptions.
>>
>> Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
>> ---
>>  arch/arm/boot/dts/tegra30.dtsi | 36 +++++++++++++++++-----------------
>>  1 file changed, 18 insertions(+), 18 deletions(-)
> 
> We typically only add those when they are really needed. These are
> technically harmless because without a reference, DTC won't actually
> create a phandle property, but dangling labels are the kind of thing
> that some janitor may at some point want to remove with some scripts,
> so I'm hesitant to apply this because it'll likely cause churn in the
> future.

The plan is to add labels for T20 and switch all DTs to use those
phandles consistently, but that's the plan for the next kernel release.

Those labels are practically useful when you porting something from old
downstream kernel because it uses those human-readable names instead of
the addresses.
Dmitry Osipenko Dec. 10, 2021, 4:42 p.m. UTC | #5
10.12.2021 18:46, Thierry Reding пишет:
...
>> +	gpio@6000d000 {
>> +		charging-enable-hog {
>> +			gpio-hog;
>> +			gpios = <TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
>> +			output-low;
>> +		};
>> +	};
> 
> Isn't this something that we may want to change at some point? My
> understanding is that GPIO hogs are permanent, so it won't be possible
> to grab GPIO R.6 and change this.
> 
> Are there any plans to allow setting this at runtime?

I'm not aware about plans to change that charging hog.

It's not a problem to remove the hog. I don't understand why you're
saying that it's permanent. We have such hogs in Nexus7 DT for the 3G
modem pins. If we'll ever have a driver for that modem, then we will
remove those hogs, not a problem.

> [...]
>> +	i2c2: i2c@7000c400 {
>> +		status = "okay";
>> +		clock-frequency = <100000>;
>> +	};
>> +
>> +	i2cmux {
> 
> This doesn't belong here. The ordering is by unit-address and everything
> without unit-address needs to move after the nodes with unit-addresses
> and be sorted alphabetically.

Logically it belongs here, since mux uses i2c2. All other DTs do the same.

...
>> +	memory-controller@7000f400 {
>> +		nvidia,use-ram-code;
>> +
>> +		emc-tables@3 {
>> +			reg = <0x3>;
>> +
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +
>> +			lpddr2 {
>> +				compatible = "elpida,B8132B2PB-6D-F", "jedec,lpddr2-s4";
>> +				revision-id1 = <1>;
>> +				density = <2048>;
>> +				io-width = <16>;
>> +			};
>> +
>> +			emc-table@25000 {
> 
> Ugh... looking at the bindings for this the naming here is rather
> unfortunate. emc-tables@3 and emc-table@*... the top-level emc-tables
> are really tables, but the emc-table@* are really entries or rows in
> that table, not tables themselves. It's also rather unfortunate that we
> duplicate the frequency in both the "reg" and "clock-frequency"
> properties. One of them would've been enough.

It's emc-tables@3 here because initially there were other tables that I
removed during preparation of the DT for upstream. Those tables were
untested and looked questionable to me.

> Anyway, looks like this has basically been like this since forever, so
> not much that can be done about it.
> 
> Again, the memory-controller node needs to be sorted differently. There
> are other occurrences of this throughout the file.

Please feel free to reorder it.
Dmitry Osipenko Dec. 10, 2021, 5:02 p.m. UTC | #6
10.12.2021 18:50, Thierry Reding пишет:
> On Wed, Dec 08, 2021 at 08:35:51PM +0300, Dmitry Osipenko wrote:
>> From: Svyatoslav Ryhel <clamor95@gmail.com>
>>
>> Add common DTSI for Tegra30 ASUS Transformers. It will be used by multiple
>> device-trees of ASUS devices. The common part initially was born out of
>> the ASUS TF300T tablet's device-tree that was created by Michał Mirosław.
>> It was heavily reworked and improved by Svyatoslav Ryhel, Maxim Schwalm,
>> Ion Agorria et al.
>>
>> [digetx@gmail.com: factored out common part into separate patch and wrote commit message]
>> Co-developed-by: Ion Agorria <ion@agorria.com>
>> Signed-off-by: Ion Agorria <ion@agorria.com>
>> Co-developed-by: Maxim Schwalm <maxim.schwalm@gmail.com>
>> Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com>
>> Co-developed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
>> Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
>> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
>> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
>> ---
>>  .../dts/tegra30-asus-transformer-common.dtsi  | 1729 +++++++++++++++++
>>  1 file changed, 1729 insertions(+)
>>  create mode 100644 arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi
>>
>> diff --git a/arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi b/arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi
>> new file mode 100644
>> index 000000000000..be77212dd8c7
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/tegra30-asus-transformer-common.dtsi
>> @@ -0,0 +1,1729 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +
>> +#include <dt-bindings/input/gpio-keys.h>
>> +#include <dt-bindings/input/input.h>
>> +#include <dt-bindings/thermal/thermal.h>
>> +
>> +#include "tegra30.dtsi"
>> +#include "tegra30-cpu-opp.dtsi"
>> +#include "tegra30-cpu-opp-microvolt.dtsi"
>> +
>> +/ {
>> +	chassis-type = "convertible";
>> +
>> +	aliases {
>> +		mmc0 = &sdmmc4;	/* eMMC */
> 
> Looks like a tab snuck in there... otherwise this also has some nodes
> sorted in the wrong order.

I was fixing these tabs, but missed that one. Good catch.

Apparently I missed to recheck the order after the most recent changes,
good that you noticed it.

> [...]
>> +	pad-keys {
> 
> Any specific reason why this is called pad-keys? We call it gpio-keys
> everywhere else.

Not sure about the name. Perhaps Svyatoslav likes the pad-keys name
more. I recall it was named gpio-keys at some point in the past.

Again, will you change it all by yourself or should I make v6?
Dmitry Osipenko Dec. 11, 2021, 3:28 p.m. UTC | #7
10.12.2021 18:46, Thierry Reding пишет:
> Again, the memory-controller node needs to be sorted differently. There
> are other occurrences of this throughout the file.

Memory-controller node is placed on purpose in the end of DT to keep it
readable. Those huge timings make it unreadable. I don't want to change
it. Alternatively, we can factor out timings into separate DTSI, but
it's unnecessary to me. I leave it up to you to decide what to do.

I'll reorder couple nodes alphabetically, those that don't have address
and were missed by me. The by-address nodes are all okay to me.

Please feel free to reorder nodes to yours liking by yourself while
applying if I'll miss something.