[v9,0/3] Add driver for lan966x Generic Clock Controller

This patch series adds a device driver for Generic Clock Controller
of lan966x SoC.

v8 -> v9:
- Added Acked-by to dt-bindings and Documentation file.
- Changed clk_name "timer" to "timer1"
- Updated devm_kzalloc in probe function.

v7 -> v8:
- Defined new constant DIV_MAX.
- Corrected and updated prescaler divider condition check.
- Added Acked-by.

v6 -> v7:
- Added Kconfig and Makefile entires for lan966x clock driver.

v5 -> v6:
- Added Acked-by to dt-bindings file.
- Removed "_clk" in clock-names.
- Added Reviewed-by to Documentation file.

v4 -> v5:
- In v4 dt-bindings, missed adding "clock-names" in required
  properties and example. So, added them.
- Returning proper error - PTR_ERR.
- Removed unused variable "ret" in probe function.

v3 -> v4:
- Updated "clocks" and added "clock-names" in dt-bindings.
- Used clk_parent_data instead of of_clk_get_parent_name().

v2 -> v3:
- Fixed dt_binding_check errors.

v1 -> v2:
- Updated license in dt-bindings.
- Updated example provided for clock controller node.

Kavyasree Kotagiri (3):
  dt-bindings: clock: lan966x: Add binding includes for lan966x SoC
    clock IDs
  dt-bindings: clock: lan966x: Add LAN966X Clock Controller
  clk: lan966x: Add lan966x SoC clock driver

 .../bindings/clock/microchip,lan966x-gck.yaml |  57 +++++
 drivers/clk/Kconfig                           |   7 +
 drivers/clk/Makefile                          |   1 +
 drivers/clk/clk-lan966x.c                     | 240 ++++++++++++++++++
 include/dt-bindings/clock/microchip,lan966x.h |  28 ++
 5 files changed, 333 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml
 create mode 100644 drivers/clk/clk-lan966x.c
 create mode 100644 include/dt-bindings/clock/microchip,lan966x.h

Hi Stephen,

Could you please let me know if this patch series will be taken for 5.16?

Thanks,
Kavya
> -----Original Message-----
> From: Kavyasree Kotagiri [mailto:kavyasree.kotagiri@microchip.com]
> Sent: Tuesday, October 19, 2021 1:10 PM
> To: robh+dt@kernel.org; mturquette@baylibre.com; sboyd@kernel.org
> Cc: Nicolas Ferre - M43238 <Nicolas.Ferre@microchip.com>; linux-
> kernel@vger.kernel.org; devicetree@vger.kernel.org; linux-
> clk@vger.kernel.org; UNGLinuxDriver <UNGLinuxDriver@microchip.com>;
> Eugen Hristev - M18282 <Eugen.Hristev@microchip.com>; Kavyasree Kotagiri
> - I30978 <Kavyasree.Kotagiri@microchip.com>; Manohar Puri - I30488
> <Manohar.Puri@microchip.com>
> Subject: [PATCH v9 0/3] Add driver for lan966x Generic Clock Controller
> 
> This patch series adds a device driver for Generic Clock Controller
> of lan966x SoC.
> 
> v8 -> v9:
> - Added Acked-by to dt-bindings and Documentation file.
> - Changed clk_name "timer" to "timer1"
> - Updated devm_kzalloc in probe function.
> 
> v7 -> v8:
> - Defined new constant DIV_MAX.
> - Corrected and updated prescaler divider condition check.
> - Added Acked-by.
> 
> v6 -> v7:
> - Added Kconfig and Makefile entires for lan966x clock driver.
> 
> v5 -> v6:
> - Added Acked-by to dt-bindings file.
> - Removed "_clk" in clock-names.
> - Added Reviewed-by to Documentation file.
> 
> v4 -> v5:
> - In v4 dt-bindings, missed adding "clock-names" in required
>   properties and example. So, added them.
> - Returning proper error - PTR_ERR.
> - Removed unused variable "ret" in probe function.
> 
> v3 -> v4:
> - Updated "clocks" and added "clock-names" in dt-bindings.
> - Used clk_parent_data instead of of_clk_get_parent_name().
> 
> v2 -> v3:
> - Fixed dt_binding_check errors.
> 
> v1 -> v2:
> - Updated license in dt-bindings.
> - Updated example provided for clock controller node.
> 
> Kavyasree Kotagiri (3):
>   dt-bindings: clock: lan966x: Add binding includes for lan966x SoC
>     clock IDs
>   dt-bindings: clock: lan966x: Add LAN966X Clock Controller
>   clk: lan966x: Add lan966x SoC clock driver
> 
>  .../bindings/clock/microchip,lan966x-gck.yaml |  57 +++++
>  drivers/clk/Kconfig                           |   7 +
>  drivers/clk/Makefile                          |   1 +
>  drivers/clk/clk-lan966x.c                     | 240 ++++++++++++++++++
>  include/dt-bindings/clock/microchip,lan966x.h |  28 ++
>  5 files changed, 333 insertions(+)
>  create mode 100644
> Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml
>  create mode 100644 drivers/clk/clk-lan966x.c
>  create mode 100644 include/dt-bindings/clock/microchip,lan966x.h
> 
> --
> 2.17.1

Quoting Kavyasree Kotagiri (2021-10-19 00:40:30)
> diff --git a/drivers/clk/clk-lan966x.c b/drivers/clk/clk-lan966x.c
> new file mode 100644
> index 000000000000..19bec94e1551
> --- /dev/null
> +++ b/drivers/clk/clk-lan966x.c
> @@ -0,0 +1,240 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Microchip LAN966x SoC Clock driver.
> + *
> + * Copyright (C) 2021 Microchip Technology, Inc. and its subsidiaries
> + *
> + * Author: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
> + */
> +
> +#include <linux/bitfield.h>
> +#include <linux/clk-provider.h>
> +#include <linux/io.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +
> +#include <dt-bindings/clock/microchip,lan966x.h>
> +
> +#define GCK_ENA         BIT(0)
> +#define GCK_SRC_SEL     GENMASK(9, 8)
> +#define GCK_PRESCALER   GENMASK(23, 16)
> +
> +#define DIV_MAX                255
> +
> +static const char *clk_names[N_CLOCKS] = {
> +       "qspi0", "qspi1", "qspi2", "sdmmc0",
> +       "pi", "mcan0", "mcan1", "flexcom0",
> +       "flexcom1", "flexcom2", "flexcom3",
> +       "flexcom4", "timer1", "usb_refclk",
> +};
> +
> +struct lan966x_gck {
> +       struct clk_hw hw;
> +       void __iomem *reg;
> +};
> +#define to_lan966x_gck(hw) container_of(hw, struct lan966x_gck, hw)
> +
> +static const struct clk_parent_data lan966x_gck_pdata[] = {
> +       { .fw_name = "cpu_clk", .name = "cpu_clk" },

name shouldn't be required if the binding is new. That's the case
right?


> +       { .fw_name = "ddr_clk", .name = "ddr_clk" },
> +       { .fw_name = "sys_clk", .name = "sys_clk" },
> +};
> +

Quoting Kavyasree.Kotagiri@microchip.com (2021-11-02 05:47:27)
> Hi Stephen,
> 
> Could you please let me know if this patch series will be taken for 5.16?
> 

One question on the driver but otherwise looks possible. I'll send
another PR next week.