Message ID | 20210820092803.78523-1-claudiu.beznea@microchip.com |
---|---|
Headers | show |
Series | mmc: pwrseq: sd8787: add support wilc1000 devices | expand |
On Fri, Aug 20, 2021 at 12:28:03PM +0300, Claudiu Beznea wrote: > From: Eugen Hristev <eugen.hristev@microchip.com> > > SAMA5D27 WLSOM1 boards has a WILC3000 device soldered. Add proper > device tree nodes for this. > > [eugen.hristev: original author of this code] > Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> > [nicolas.ferre: original author of this code] > Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> > Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> > --- > arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi | 71 +++++++++++++++++++++ > 1 file changed, 71 insertions(+) > > diff --git a/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi b/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi > index 025a78310e3a..c7bcfd3ce91d 100644 > --- a/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi > +++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi > @@ -30,6 +30,15 @@ main_xtal { > clock-frequency = <24000000>; > }; > }; > + > + wifi_pwrseq: wifi_pwrseq { > + compatible = "mmc-pwrseq-wilc1000"; > + reset-gpios = <&pioA PIN_PA27 GPIO_ACTIVE_HIGH>; > + powerdown-gpios = <&pioA PIN_PA29 GPIO_ACTIVE_HIGH>; > + pinctrl-0 = <&pinctrl_wilc_pwrseq>; > + pinctrl-names = "default"; > + status = "okay"; 'okay' is the default, so you can drop this. > + }; > }; > > &flx1 { > @@ -310,5 +319,67 @@ pinctrl_qspi1_default: qspi1_default { > <PIN_PB10__QSPI1_IO3>; > bias-pull-up; > }; > + > + pinctrl_sdmmc1_default: sdmmc1_default { > + cmd-data { > + pinmux = <PIN_PA28__SDMMC1_CMD>, > + <PIN_PA18__SDMMC1_DAT0>, > + <PIN_PA19__SDMMC1_DAT1>, > + <PIN_PA20__SDMMC1_DAT2>, > + <PIN_PA21__SDMMC1_DAT3>; > + bias-disable; > + }; > + > + conf-ck { > + pinmux = <PIN_PA22__SDMMC1_CK>; > + bias-disable; > + }; > + }; > + > + pinctrl_wilc_default: wilc_default { > + conf-irq { > + pinmux = <PIN_PB25__GPIO>; > + bias-disable; > + }; > + }; > + > + pinctrl_wilc_pwrseq: wilc_pwrseq { > + conf-ce-nrst { > + pinmux = <PIN_PA27__GPIO>, > + <PIN_PA29__GPIO>; > + bias-disable; > + }; > + > + conf-rtcclk { > + pinmux = <PIN_PB13__PCK1>; > + bias-disable; > + }; > + }; > +}; > + > +&sdmmc1 { > + #address-cells = <1>; > + #size-cells = <0>; > + bus-width = <4>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_sdmmc1_default>; > + mmc-pwrseq = <&wifi_pwrseq>; > + no-1-8-v; > + non-removable; > + status = "okay"; > + > + wilc: wilc@0 { wifi@0 > + reg = <0>; > + bus-width = <4>; > + compatible = "microchip,wilc3000", "microchip,wilc1000"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_wilc_default>; > + irq-gpios = <&pioA PIN_PB25 GPIO_ACTIVE_LOW>; > + clocks = <&pmc PMC_TYPE_SYSTEM 9>; > + clock-names = "rtc"; > + assigned-clocks = <&pmc PMC_TYPE_SYSTEM 9>; > + assigned-clock-rates = <32768>; > + status = "okay"; Again, that's the default so drop. Did you run validation (make dtbs_check) on your changes because I see multiple problems. Rob
On Fri, 20 Aug 2021 at 11:30, Claudiu Beznea <claudiu.beznea@microchip.com> wrote: > > Hi, > > This series adds support for WILC1000 devices on pwrseq-sd8787 driver. > WILC1000 devices needs a minimum delay of 5ms b/w reset and power lines. > Adapt the sd8787 driver for this by adding a new compatible for WILC1000 > devices and specify the delay on .data field of struct of_device_id. > > Thank you, > Claudiu Beznea > > Changes in v3: > - fixed dt binding compilation > > Changes in v2: > - changed cover letter title (it was: mmc: pwrseq: sd8787: add support > for selectable) > - use new compatible in pwrseq-sd8787 driver instead of adding a new > binding for specifying the delay; with this, the patch 1/1 from v1 is > not necessary > - adapt patch 3/3 from this version with the new compatible > > > Claudiu Beznea (3): > dt-bindings: pwrseq-sd8787: add binding for wilc1000 > mmc: pwrseq: sd8787: add support for wilc1000 > mmc: pwrseq: add wilc1000_sdio dependency for pwrseq_sd8787 > > Eugen Hristev (1): > ARM: dts: at91: sama5d27_wlsom1: add wifi device > > .../bindings/mmc/mmc-pwrseq-sd8787.yaml | 4 +- > arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi | 71 +++++++++++++++++++ > drivers/mmc/core/Kconfig | 2 +- > drivers/mmc/core/pwrseq_sd8787.c | 11 ++- > 4 files changed, 84 insertions(+), 4 deletions(-) > Applied patch1 -> patch3, thanks! I leave patch 4 for soc maintainers. Kind regards Uffe
On 24.08.2021 15:23, Rob Herring wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On Fri, Aug 20, 2021 at 12:28:03PM +0300, Claudiu Beznea wrote: >> From: Eugen Hristev <eugen.hristev@microchip.com> >> >> SAMA5D27 WLSOM1 boards has a WILC3000 device soldered. Add proper >> device tree nodes for this. >> >> [eugen.hristev: original author of this code] >> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> >> [nicolas.ferre: original author of this code] >> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> >> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> >> --- >> arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi | 71 +++++++++++++++++++++ >> 1 file changed, 71 insertions(+) >> >> diff --git a/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi b/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi >> index 025a78310e3a..c7bcfd3ce91d 100644 >> --- a/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi >> +++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi >> @@ -30,6 +30,15 @@ main_xtal { >> clock-frequency = <24000000>; >> }; >> }; >> + >> + wifi_pwrseq: wifi_pwrseq { >> + compatible = "mmc-pwrseq-wilc1000"; >> + reset-gpios = <&pioA PIN_PA27 GPIO_ACTIVE_HIGH>; >> + powerdown-gpios = <&pioA PIN_PA29 GPIO_ACTIVE_HIGH>; >> + pinctrl-0 = <&pinctrl_wilc_pwrseq>; >> + pinctrl-names = "default"; >> + status = "okay"; > > 'okay' is the default, so you can drop this. > >> + }; >> }; >> >> &flx1 { >> @@ -310,5 +319,67 @@ pinctrl_qspi1_default: qspi1_default { >> <PIN_PB10__QSPI1_IO3>; >> bias-pull-up; >> }; >> + >> + pinctrl_sdmmc1_default: sdmmc1_default { >> + cmd-data { >> + pinmux = <PIN_PA28__SDMMC1_CMD>, >> + <PIN_PA18__SDMMC1_DAT0>, >> + <PIN_PA19__SDMMC1_DAT1>, >> + <PIN_PA20__SDMMC1_DAT2>, >> + <PIN_PA21__SDMMC1_DAT3>; >> + bias-disable; >> + }; >> + >> + conf-ck { >> + pinmux = <PIN_PA22__SDMMC1_CK>; >> + bias-disable; >> + }; >> + }; >> + >> + pinctrl_wilc_default: wilc_default { >> + conf-irq { >> + pinmux = <PIN_PB25__GPIO>; >> + bias-disable; >> + }; >> + }; >> + >> + pinctrl_wilc_pwrseq: wilc_pwrseq { >> + conf-ce-nrst { >> + pinmux = <PIN_PA27__GPIO>, >> + <PIN_PA29__GPIO>; >> + bias-disable; >> + }; >> + >> + conf-rtcclk { >> + pinmux = <PIN_PB13__PCK1>; >> + bias-disable; >> + }; >> + }; >> +}; >> + >> +&sdmmc1 { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + bus-width = <4>; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinctrl_sdmmc1_default>; >> + mmc-pwrseq = <&wifi_pwrseq>; >> + no-1-8-v; >> + non-removable; >> + status = "okay"; >> + >> + wilc: wilc@0 { > > wifi@0 > >> + reg = <0>; >> + bus-width = <4>; >> + compatible = "microchip,wilc3000", "microchip,wilc1000"; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&pinctrl_wilc_default>; >> + irq-gpios = <&pioA PIN_PB25 GPIO_ACTIVE_LOW>; >> + clocks = <&pmc PMC_TYPE_SYSTEM 9>; >> + clock-names = "rtc"; >> + assigned-clocks = <&pmc PMC_TYPE_SYSTEM 9>; >> + assigned-clock-rates = <32768>; >> + status = "okay"; > > Again, that's the default so drop. > > Did you run validation (make dtbs_check) on your changes because I see > multiple problems. No, I haven't. Apologies! I'll do the proper adjustments in v3. Thank you for your review, Claudiu Beznea > > Rob >
On 24/08/2021 at 16:56, Ulf Hansson wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On Fri, 20 Aug 2021 at 11:30, Claudiu Beznea > <claudiu.beznea@microchip.com> wrote: >> >> Hi, >> >> This series adds support for WILC1000 devices on pwrseq-sd8787 driver. >> WILC1000 devices needs a minimum delay of 5ms b/w reset and power lines. >> Adapt the sd8787 driver for this by adding a new compatible for WILC1000 >> devices and specify the delay on .data field of struct of_device_id. >> >> Thank you, >> Claudiu Beznea >> >> Changes in v3: >> - fixed dt binding compilation >> >> Changes in v2: >> - changed cover letter title (it was: mmc: pwrseq: sd8787: add support >> for selectable) >> - use new compatible in pwrseq-sd8787 driver instead of adding a new >> binding for specifying the delay; with this, the patch 1/1 from v1 is >> not necessary >> - adapt patch 3/3 from this version with the new compatible >> >> >> Claudiu Beznea (3): >> dt-bindings: pwrseq-sd8787: add binding for wilc1000 >> mmc: pwrseq: sd8787: add support for wilc1000 >> mmc: pwrseq: add wilc1000_sdio dependency for pwrseq_sd8787 >> >> Eugen Hristev (1): >> ARM: dts: at91: sama5d27_wlsom1: add wifi device >> >> .../bindings/mmc/mmc-pwrseq-sd8787.yaml | 4 +- >> arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi | 71 +++++++++++++++++++ >> drivers/mmc/core/Kconfig | 2 +- >> drivers/mmc/core/pwrseq_sd8787.c | 11 ++- >> 4 files changed, 84 insertions(+), 4 deletions(-) >> > > Applied patch1 -> patch3, thanks! I leave patch 4 for soc maintainers. Perfect, we take care of patch 4 through at91 -> arm-soc trees for 5.16 kernel timeframe. Best regards, Nicolas