From patchwork Thu Apr 11 08:26:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Walmsley X-Patchwork-Id: 1083755 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=sifive.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=sifive.com header.i=@sifive.com header.b="jtBPM0uK"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44fvJT6Mrcz9s70 for ; Thu, 11 Apr 2019 18:26:49 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726633AbfDKI0s (ORCPT ); Thu, 11 Apr 2019 04:26:48 -0400 Received: from mail-pf1-f194.google.com ([209.85.210.194]:44047 "EHLO mail-pf1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725783AbfDKI0s (ORCPT ); Thu, 11 Apr 2019 04:26:48 -0400 Received: by mail-pf1-f194.google.com with SMTP id y13so3091412pfm.11 for ; Thu, 11 Apr 2019 01:26:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=eI+tQazR5An6Y/OSr8wxU+9RbkrTFLTQCf+Sjow2u5c=; b=jtBPM0uKIksF0uxyGF7ie4zWZavYx1OXYnKFel0MgH3cgDyorOZqR5H2g21i0LDruB LRfSom10ilaADBXGQKIBLI/O4ojx23oDmtVXf5T5Opwb7PZOoBAi8ZqjTTc8RAIKdhsv kmHkjSKjGbxhKKSp6mKDL5sEDB9nlZj9s0sL9I8B8yxYwG9AQXZfng1lMgtQ4igJ44E4 5YUEVTnlbqw1YXpggX2aqTlNKs3DeWJbmt3Yo8PqJhiIAdUXUNqi2J7QwcwvVNg3nXOi D+XYf45s4AJu9+4wLXc/Wy9b1+tQiIU/4NzxQH9xJliieBaOnBtTJlrNCzcXudSj4Doo hETA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=eI+tQazR5An6Y/OSr8wxU+9RbkrTFLTQCf+Sjow2u5c=; b=ebOcWcN9BVxNYKUs80Yav1mS5pdJbCXfhPlWxzowVQVq7mJkIVLj/WYvQj/M2rNcud ujzDkEy6Gpu8ngAzZWAd/opN12hIn/eX0OQk31Xv7x0wQRv42iDAPitDOVyMpnU7c8rn B8n4eyX6v0fIeA7V56JGnVCO290MzqoVa2AjDe/s1ryxKahDX27/atD+fX2ZdB5LPLPj 71N8NL2UKb+Djos0vwNrQ5Pwvin76lvNu+4zq9CBSQLJ5eQpTdILGLY5XEyoRms+iu9Z X2pVte2o4rLbXb6UEA/SzEDefz/Vt/F8l59sfX5kGcifSr63FOuHYo1A9L5/CifsAk5g VmQw== X-Gm-Message-State: APjAAAX9anqNKAaDbmXGbP0H+/juZR+Y54VIgwZWtkDrL/8W1PWWuXLl fns3+pwkfsFVSLI/4GBYhVqogG8EQBE= X-Google-Smtp-Source: APXvYqy2KN/ugGsiGTtSdgnZH7biVx1GMF+NrYkwSH4fgxSkHOCPM7MZ28Xt8L8KnRjx+ZrR6K4btw== X-Received: by 2002:aa7:864a:: with SMTP id a10mr48652416pfo.181.1554971207324; Thu, 11 Apr 2019 01:26:47 -0700 (PDT) Received: from viisi.sifive.com ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id k65sm81608225pfb.68.2019.04.11.01.26.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 11 Apr 2019 01:26:46 -0700 (PDT) From: Paul Walmsley To: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, sboyd@kernel.org, mturquette@baylibre.com Cc: Paul Walmsley Subject: [PATCH v3 0/3] clk: add driver for the SiFive FU540 PRCI and PLLs it controls Date: Thu, 11 Apr 2019 01:26:16 -0700 Message-Id: <20190411082618.3502-1-paul.walmsley@sifive.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org clk: add driver for the SiFive FU540 PRCI and PLLs it controls Add a driver for the SiFive FU540 PRCI IP block, which handles clock and some device reset control for the SiFive FU540 chip. Also add a driver- independent library for the Analog Bits Wide-Range PLL (WRPLL), used by the PRCI driver to monitor and control the WRPLL instances on the FU540 chip. Boot-tested on a SiFive HiFive Unleashed board, using BBL and the open-source FSBL with a mainline-focused DTB. This third version incorporates changes requested by Stephen Boyd and Rob Herring . This patch series is also available, along with the DT macro prerequisite patch, at: https://github.com/sifive/riscv-linux/tree/dev/paulw/prci-v5.1-rc4 - Paul Paul Walmsley (3): clk: analogbits: add Wide-Range PLL library dt-bindings: clk: add documentation for the SiFive PRCI driver clk: sifive: add a driver for the SiFive FU540 PRCI IP block .../bindings/clock/sifive/fu540-prci.txt | 46 ++ MAINTAINERS | 6 + drivers/clk/Kconfig | 2 + drivers/clk/Makefile | 2 + drivers/clk/analogbits/Kconfig | 2 + drivers/clk/analogbits/Makefile | 1 + drivers/clk/analogbits/wrpll-cln28hpc.c | 360 ++++++++++ drivers/clk/sifive/Kconfig | 18 + drivers/clk/sifive/Makefile | 1 + drivers/clk/sifive/fu540-prci.c | 630 ++++++++++++++++++ include/linux/clk/analogbits-wrpll-cln28hpc.h | 96 +++ 11 files changed, 1164 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt create mode 100644 drivers/clk/analogbits/Kconfig create mode 100644 drivers/clk/analogbits/Makefile create mode 100644 drivers/clk/analogbits/wrpll-cln28hpc.c create mode 100644 drivers/clk/sifive/Kconfig create mode 100644 drivers/clk/sifive/Makefile create mode 100644 drivers/clk/sifive/fu540-prci.c create mode 100644 include/linux/clk/analogbits-wrpll-cln28hpc.h