From patchwork Thu Apr 4 05:09:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 1076797 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="s74VQzUV"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44ZWGV688Tz9sRV for ; Thu, 4 Apr 2019 16:09:54 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726222AbfDDFJo (ORCPT ); Thu, 4 Apr 2019 01:09:44 -0400 Received: from mail-pl1-f193.google.com ([209.85.214.193]:33606 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725919AbfDDFJo (ORCPT ); Thu, 4 Apr 2019 01:09:44 -0400 Received: by mail-pl1-f193.google.com with SMTP id t16so559782plo.0 for ; Wed, 03 Apr 2019 22:09:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=RmLw52QFU499QKVl87l87i+PamhSMMPdT6L4OvZV0xs=; b=s74VQzUV6jI0Up6hSBwt3N5+5HN5nhbt6HGjVf4SCrSEAZReV6gHPJoU7RHozRreXc lEsT8cR2bdDQsJeQOm9v5PtFp+vu/hXbw4Qb2gAbmRNPkCuIcp4E8htdEm6NLVMT8YOq EDiUySLXP69T8O9zIphOwFrJXkzbIcFzWIIowjJZAnZs96/MZUk3p2NFJ0T9OSEkiyKw MIV0e3shFgOPYTHVay9iqdB5I/qaAnrAaN9mm20rfvRomG+9+YMDOcKkVDgoPYwLSA1q kcsy1WazMxNReWyKRzx1NL3yvmFQJozYDVljgudNVhV2RnudxyMsY7mG7GNIKsYBeRT0 l0KQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=RmLw52QFU499QKVl87l87i+PamhSMMPdT6L4OvZV0xs=; b=OM7hXk4Eub9UGr2X/K4ucGGrI08EIacTM7XAGZO+lVypiZXRHJVh1v8PivmmYqKK62 rXpMmomiuH299SmfajHIPV+r5dLGBJZNll7k5DrxuE8qYDgbceNbK3x0mvN1r1kk0MoN CkgBgrIzjS5G+83uV6+RYqGWcQPafGsoJRao0ce+fH4IUp/1OiCkhHhf46XQXOcrscbk 8nlWbNmyXqPBJ063zVpDR/vaYs3Du7Z1Se1RZMhOdqS7tthzs+qYy6gb+Cs7vexefa7s ru43TtJVfuKRmRT7PgppGdMGlvLTx/p3WWQBSqy75ShetwGdJolScZD8gc63Yi7s1Ca/ X1kg== X-Gm-Message-State: APjAAAXCAuRA7hDTeems+pUZ63AmFsdb0kbeq5c2bJMTdlj6mzLDF7O+ hQ+QJIoPdUw0+YM0hSTS/KEL2A== X-Google-Smtp-Source: APXvYqxqN+KLVFxYgy264UzIeI1iplNzLTXCtrNlt8hHPZTOfHToDJQ6bYVRjOTpjn30vi7VCnBW4Q== X-Received: by 2002:a17:902:9a83:: with SMTP id w3mr4256626plp.241.1554354583598; Wed, 03 Apr 2019 22:09:43 -0700 (PDT) Received: from centauri.imgcgcw.net ([147.50.13.10]) by smtp.gmail.com with ESMTPSA id a129sm50589089pfa.152.2019.04.03.22.09.40 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 03 Apr 2019 22:09:42 -0700 (PDT) From: Niklas Cassel To: linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: jorge.ramirez-ortiz@linaro.org, Niklas Cassel , devicetree@vger.kernel.org Subject: [RFC PATCH 0/9] Add support for QCOM Core Power Reduction Date: Thu, 4 Apr 2019 07:09:21 +0200 Message-Id: <20190404050931.9812-1-niklas.cassel@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This is a first RFC for Core Power Reduction (CPR), a form of Adaptive Voltage Scaling (AVS), found on certain Qualcomm SoCs. Since this is simply an RFC, things like MAINTAINERS hasn't been updated yet. CPR is a technology that reduces core power on a CPU or on other device. It reads voltage settings from efuses (that have been written in production), it uses these voltage settings as initial values, for each OPP. After moving to a certain OPP, CPR monitors dynamic factors such as temperature, etc. and adjusts the voltage for that frequency accordingly to save power and meet silicon characteristic requirements. This driver is based on an RFC by Stephen Boyd[1], which in turn is based on work by others on codeaurora.org[2]. [1] https://lkml.org/lkml/2015/9/18/833 [2] https://www.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/regulator/cpr-regulator.c?h=msm-3.10 Jorge Ramirez-Ortiz (3): drivers: regulator: qcom_spmi: enable linear range info cpufreq: qcom: support qcs404 on nvmem driver cpufreq: Add qcs404 to cpufreq-dt-platdev blacklist Niklas Cassel (5): cpufreq: qcom: create a driver struct dt-bindings: opp: Add qcom-opp bindings with properties needed for CPR dt-bindings: power: avs: Add support for CPR (Core Power Reduction) power: avs: Add support for CPR (Core Power Reduction) arm64: dts: qcom: qcs404: Add CPR and populate OPP tables Sricharan R (1): cpufreq: qcom: Re-organise kryo cpufreq to use it for other nvmem based qcom socs ...ryo-cpufreq.txt => qcom-nvmem-cpufreq.txt} | 16 +- .../devicetree/bindings/opp/qcom-opp.txt | 24 + .../bindings/power/avs/qcom,cpr.txt | 119 ++ arch/arm64/boot/dts/qcom/qcs404.dtsi | 152 +- drivers/cpufreq/Kconfig.arm | 4 +- drivers/cpufreq/Makefile | 2 +- drivers/cpufreq/cpufreq-dt-platdev.c | 1 + ...om-cpufreq-kryo.c => qcom-cpufreq-nvmem.c} | 197 +- drivers/power/avs/Kconfig | 15 + drivers/power/avs/Makefile | 1 + drivers/power/avs/qcom-cpr.c | 1777 +++++++++++++++++ drivers/regulator/qcom_spmi-regulator.c | 7 + 12 files changed, 2234 insertions(+), 81 deletions(-) rename Documentation/devicetree/bindings/opp/{kryo-cpufreq.txt => qcom-nvmem-cpufreq.txt} (97%) create mode 100644 Documentation/devicetree/bindings/opp/qcom-opp.txt create mode 100644 Documentation/devicetree/bindings/power/avs/qcom,cpr.txt rename drivers/cpufreq/{qcom-cpufreq-kryo.c => qcom-cpufreq-nvmem.c} (52%) create mode 100644 drivers/power/avs/qcom-cpr.c