From patchwork Mon Oct 22 20:50:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evan Green X-Patchwork-Id: 987931 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="JDM2CCCN"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42f7wh5rB2z9sDb for ; Tue, 23 Oct 2018 07:51:32 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729062AbeJWFLh (ORCPT ); Tue, 23 Oct 2018 01:11:37 -0400 Received: from mail-pl1-f194.google.com ([209.85.214.194]:43204 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729058AbeJWFLh (ORCPT ); Tue, 23 Oct 2018 01:11:37 -0400 Received: by mail-pl1-f194.google.com with SMTP id 30-v6so19602519plb.10 for ; Mon, 22 Oct 2018 13:51:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id; bh=T2MSk5N/ZFFwWz958VZ7adGUXhRzOpdmmoa1YgHIW84=; b=JDM2CCCNoiu5QJYOEjdux8ns1u4aDvsgZn38JRzDLH1ai5PnrjUg3O/d3PkDIcRl5/ FmLw7g3mnHmlWyC5tZ4B7EXQdXRLBSYeSZkWXnEHp/FLsCbDxtJw6PsOm34XO3g5/cPZ ay3oMUgQHAeRfxD6Qvj6zP48Tan/LYvC3fLT4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=T2MSk5N/ZFFwWz958VZ7adGUXhRzOpdmmoa1YgHIW84=; b=Y9v57cpSzXryd/fNh7YUp519mobcwQSHP+xBkAR+a8aDxauhkraFrOtGfr5bjM/3fs joycN+JJeWFtgaEPfSeynp9KktMqRb+1xeEU+YyVxUE1HXPJsFPOWC4E03/7yrC/HvzF 4dOEKKRFsapvObqXAB7IRK41vSsFRaUjxfkd1r82OtroG6u3zwth1cBZHh+bIg8/WlDE rBkrbi1KCEN1yHu3lPv9bnpU7plRpSy9Gc0AzeVfAysWrmkbms5i7Vb2w6rxu5RStePm c4upMtQPjmfQ+zWz6SwEhzsyDYqT8q1UqHmFu9+yM3gewK4a7Kcf86IWyR3YJm9A8/JC bHKw== X-Gm-Message-State: AGRZ1gK3ULJSXpYpZYLItldaoLJiiP8zI6hjoa74a7SfZMjlxTNlNqez 8EFzNgA9RvVyUA2z7pWbsrtz+A== X-Google-Smtp-Source: AJdET5fW55c8Rj5KJQC9jNQr42Bbar7O1Lo4yXK8hPSKAN/F2L+DVpL8mpVjgB+nYZWcgP8+8ibHkw== X-Received: by 2002:a17:902:6801:: with SMTP id h1-v6mr4987247plk.31.1540241490997; Mon, 22 Oct 2018 13:51:30 -0700 (PDT) Received: from evgreen2.mtv.corp.google.com ([2620:15c:202:201:e418:c825:76cf:5f64]) by smtp.gmail.com with ESMTPSA id a11-v6sm37216041pfn.66.2018.10.22.13.51.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 22 Oct 2018 13:51:29 -0700 (PDT) From: Evan Green To: Rob Herring , Andy Gross , Kishon Vijay Abraham I Cc: Douglas Anderson , Stephen Boyd , Evan Green , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, Can Guo , linux-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Vivek Gautam , Manu Gautam , David Brown , Mark Rutland , Rob Herring Subject: [PATCH v3 0/5] arm64: dts: qcom: sdm845: Add UFS DT nodes Date: Mon, 22 Oct 2018 13:50:57 -0700 Message-Id: <20181022205102.74825-1-evgreen@chromium.org> X-Mailer: git-send-email 2.16.4 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Update the device tree bindings for the QMP PHY to properly specify the registers for dual-lane PHYs. Update the driver to use those new registers. Add the DT nodes for UFS on SDM845 and MTP. Finally, fix up the USB3 PHY on SDM845, which also has a dual-lane phy Changes in v3: - Removed erroneous fixup for USB UniPro PHY, which is not dual lane (Doug) Changes in v2: - Added dt bindings change, corresponding driver fixup, and USB PHY fixup - Renamed ufsphy to phy (Vivek) - Removed #clock-cells (Vivek) Can Guo (1): arm64: dts: qcom: sdm845: Add UFS nodes for sdm845-mtp Evan Green (4): dt-bindings: phy-qcom-qmp: Fix register underspecification phy: qcom-qmp: Utilize fully-specified DT registers arm64: dts: qcom: sdm845: add UFS controller arm64: dts: qcom: sdm845: Add USB PHY lane two .../devicetree/bindings/phy/qcom-qmp-phy.txt | 73 +++++++++++++++++++--- arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 14 +++++ arch/arm64/boot/dts/qcom/sdm845.dtsi | 71 ++++++++++++++++++++- drivers/phy/qualcomm/phy-qcom-qmp.c | 51 +++++++++++---- 4 files changed, 187 insertions(+), 22 deletions(-) Reviewed-by: Douglas Anderson