From patchwork Tue Aug 14 10:27:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vivek Gautam X-Patchwork-Id: 957417 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=codeaurora.org header.i=@codeaurora.org header.b="jWo6vCfp"; dkim=pass (1024-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="OMHjq5bk"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41qTLy2tvMz9s7c for ; Tue, 14 Aug 2018 20:27:54 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731360AbeHNNOY (ORCPT ); Tue, 14 Aug 2018 09:14:24 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:48744 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730766AbeHNNOY (ORCPT ); Tue, 14 Aug 2018 09:14:24 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 56FED60B62; Tue, 14 Aug 2018 10:27:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1534242471; bh=Ql3iaYXDrD02dBPNZdnP3nudl1Jl24mHM63EzSesTz8=; h=From:To:Cc:Subject:Date:From; b=jWo6vCfpLTed+abNAsC0s1gYiVOgRgJWVPuEZVnec8ACCtTv3J9lqFnSMrTss/xwU sTVc84gH52HPXlSTLuC+CevbSqcgvAPtsUFoH5cXgqtGKuFZri1BshikYXQVYGISE1 wvmB6FDW7o53XED6i/4awi+exnPAqWaSFNiWGRvo= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED, T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-41.ap.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: vivek.gautam@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 0EF4560214; Tue, 14 Aug 2018 10:27:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1534242470; bh=Ql3iaYXDrD02dBPNZdnP3nudl1Jl24mHM63EzSesTz8=; h=From:To:Cc:Subject:Date:From; b=OMHjq5bkK6pSkb6ZTrsgegL0XtfnufpjR4KTDb24fyPCuJ9dkeAUACBzRYLfoNqEM A2Vz5UINlLnxIUptmDvgFNKdKcQFU2YLeWSJZZ0ng7hCmTHSIXNg+ajK0mYRHdtR+j 5WBmyfzSJivl4DYxHGNx9gKLuDp5ORJCXC3Fo0ps= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 0EF4560214 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=vivek.gautam@codeaurora.org From: Vivek Gautam To: joro@8bytes.org, robh+dt@kernel.org, andy.gross@linaro.org, will.deacon@arm.com, iommu@lists.linux-foundation.org, devicetree@vger.kernel.org Cc: mark.rutland@arm.com, robin.murphy@arm.com, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Vivek Gautam Subject: [PATCH v2 0/3] Enable smmu support on sdm845 Date: Tue, 14 Aug 2018 15:57:37 +0530 Message-Id: <20180814102740.30222-1-vivek.gautam@codeaurora.org> X-Mailer: git-send-email 2.16.1.72.g5be1f00a9a70 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This series enables apps-smmu (arm,mmu-500) and gpu-smmu (qcom,smmu-v2) on sdm845. gpu-smmu needs one power domain from gpu clock controller whose driver was sent by Amit [1]. Changes since v1: - Addressed Rob's review comments by adding a SoC specific compatible. Have added a new dt-bindings patch for this. - Updated node name to 'iommu'. - Addressed Doug's review comment about removing status property from smmu's nodes, as smmu is either present on the soc or not. Enabling it is not a board-level decision. [1] https://lore.kernel.org/patchwork/patch/973839/ Vivek Gautam (3): dt-bindings: arm-smmu: Add binding doc for Qcom smmu-500 dts: arm64/sdm845: Add node for arm,mmu-500 dts: arm64/sdm845: Add node for qcom,smmu-v2 .../devicetree/bindings/iommu/arm,smmu.txt | 5 ++ arch/arm64/boot/dts/qcom/sdm845.dtsi | 95 ++++++++++++++++++++++ 2 files changed, 100 insertions(+)