| Message ID | 20180129155810.7867-1-embed3d@gmail.com |
|---|---|
| Headers | show |
| Series | arm: sunxi: IR support for A83T | expand |
hi, On Mon, Jan 29, 2018 at 04:58:07PM +0100, Philipp Rossak wrote: > The CIR Pin of the A83T is located at PL12. > > Signed-off-by: Philipp Rossak <embed3d@gmail.com> > --- > arch/arm/boot/dts/sun8i-a83t.dtsi | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi > index de5119a2a91c..06e96db7c41a 100644 > --- a/arch/arm/boot/dts/sun8i-a83t.dtsi > +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi > @@ -617,6 +617,11 @@ > interrupt-controller; > #interrupt-cells = <3>; > > + cir_pins: cir-pins@0 { > + pins = "PL12"; > + function = "s_cir_rx"; > + }; > + Sorry for not noticing this earlier, but this should be r_cir_pin, and you should drop the unit-address that generates a dtc warning. Maxime
hi, On Mon, Jan 29, 2018 at 04:58:08PM +0100, Philipp Rossak wrote: > The cir interface is like on the H3 located at 0x01f02000 and is exactly > the same. This patch adds support for the ir interface on the A83T. > > Signed-off-by: Philipp Rossak <embed3d@gmail.com> > --- > arch/arm/boot/dts/sun8i-a83t.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi > index 06e96db7c41a..ddc0d592107f 100644 > --- a/arch/arm/boot/dts/sun8i-a83t.dtsi > +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi > @@ -605,6 +605,16 @@ > #reset-cells = <1>; > }; > > + cir: cir@01f02000 { r_cir: ir@1f02000 > + compatible = "allwinner,sun5i-a13-ir"; You should have an A83t compatible there first. Maxime
On Mon, Jan 29, 2018 at 04:58:09PM +0100, Philipp Rossak wrote: > The Bananapi M3 has an onboard IR receiver. > This enables the onboard IR receiver subnode. > Unlike the other IR receivers this one needs a base clock frequency > of 3000000 Hz (3 MHz), to be able to work. > > Signed-off-by: Philipp Rossak <embed3d@gmail.com> > Acked-by: Chen-Yu Tsai <wens@csie.org> > --- > arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts > index 6550bf0e594b..ffc6445fd281 100644 > --- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts > +++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts > @@ -82,6 +82,13 @@ > }; > }; > > +&cir { > + pinctrl-names = "default"; > + pinctrl-0 = <&cir_pins>; If this is the only muxing option (like your node name suggests), you can put it directly in the DTSI to remove boilerplate from all the DTS. Maxime
This patch series adds support for the sunxi A83T ir module and enhances the sunxi-ir driver. Right now the base clock frequency for the ir driver is a hard coded define and is set to 8 MHz. This works for the most common ir receivers. On the Sinovoip Bananapi M3 the ir receiver needs, a 3 MHz base clock frequency to work without problems with this driver. This patch series adds support for an optinal property that makes it able to override the default base clock frequency and enables the ir interface on the a83t and the Bananapi M3. In general this is a resend of the v3 Patchseries, but with collected acked-by and reviewed-by and some typos fixed. changes since v3: * collecting all acks & reviewd by * fixed typos changes since v2: * reorder cir pin (alphabetical) * fix typo in documentation changes since v1: * fix typos, reword Documentation * initialize 'b_clk_freq' to 'SUNXI_IR_BASE_CLK' & remove if statement * change dev_info() to dev_dbg() * change naming to cir* in dts/dtsi * Added acked Ackedi-by to related patch * use whole memory block instead of registers needed + fix for h3/h5 changes since rfc: * The property is now optinal. If the property is not available in the dtb the driver uses the default base clock frequency. * the driver prints out the the selected base clock frequency. * changed devicetree property from base-clk-frequency to clock-frequency Regards, Philipp Philipp Rossak (6): media: rc: update sunxi-ir driver to get base clock frequency from devicetree media: dt: bindings: Update binding documentation for sunxi IR controller arm: dts: sun8i: a83t: Add the cir pin for the A83T arm: dts: sun8i: a83t: Add support for the cir interface arm: dts: sun8i: a83t: bananapi-m3: Enable IR controller arm: dts: sun8i: h3-h8: ir register size should be the whole memory block Documentation/devicetree/bindings/media/sunxi-ir.txt | 3 +++ arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 7 +++++++ arch/arm/boot/dts/sun8i-a83t.dtsi | 15 +++++++++++++++ arch/arm/boot/dts/sunxi-h3-h5.dtsi | 2 +- drivers/media/rc/sunxi-cir.c | 19 +++++++++++-------- 5 files changed, 37 insertions(+), 9 deletions(-)