From patchwork Tue Jan 29 22:03:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thor Thayer X-Patchwork-Id: 1033012 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43q0np62qkz9sBn for ; Wed, 30 Jan 2019 09:01:34 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727342AbfA2WBd (ORCPT ); Tue, 29 Jan 2019 17:01:33 -0500 Received: from mga11.intel.com ([192.55.52.93]:6466 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727339AbfA2WBd (ORCPT ); Tue, 29 Jan 2019 17:01:33 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Jan 2019 14:01:33 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,538,1539673200"; d="scan'208";a="270963522" Received: from tthayer-hp-z620.an.intel.com ([10.122.105.146]) by orsmga004.jf.intel.com with ESMTP; 29 Jan 2019 14:01:32 -0800 From: thor.thayer@linux.intel.com To: bp@alien8.de, dinguyen@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, mchehab@kernel.org, james.morse@arm.com Cc: thor.thayer@linux.intel.com, devicetree@vger.kernel.org, linux-edac@vger.kernel.org Subject: [PATCH 0/4] Update Stratix10 EDAC Bindings Date: Tue, 29 Jan 2019 16:03:44 -0600 Message-Id: <1548799428-10541-1-git-send-email-thor.thayer@linux.intel.com> X-Mailer: git-send-email 2.7.4 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Thor Thayer Instead of using the Arria10 (ARM32) EDAC bindings for Stratix10 (ARM64), create Stratix10 specific EDAC bindings to capture architecture differences between ARM32 and ARM64. This requires fixing the previous Stratix10 bindings. Also add the peripheral bindings for the Stratix10. Thor Thayer (4): Documentation: dt: edac: Fix Stratix10 IRQ bindings Documentation: dt: edac: Add Stratix10 Peripheral bindings EDAC, altera: Skip DB IRQ for Stratix10 arm64: dts: stratix10: Use new Stratix10 EDAC bindings .../devicetree/bindings/edac/socfpga-eccmgr.txt | 129 +++++++++++++++++++-- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 25 ++-- drivers/edac/altera_edac.c | 31 ++--- 3 files changed, 153 insertions(+), 32 deletions(-)