From patchwork Fri Jul 13 16:27:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thor Thayer X-Patchwork-Id: 943731 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41RypK2TlRz9s0n for ; Sat, 14 Jul 2018 02:25:29 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731639AbeGMQkr (ORCPT ); Fri, 13 Jul 2018 12:40:47 -0400 Received: from mga02.intel.com ([134.134.136.20]:57975 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731210AbeGMQkr (ORCPT ); Fri, 13 Jul 2018 12:40:47 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Jul 2018 09:25:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,348,1526367600"; d="scan'208";a="56665374" Received: from tthayer-hp-z620-workstation.an.intel.com ([10.122.105.144]) by orsmga008.jf.intel.com with ESMTP; 13 Jul 2018 09:25:25 -0700 From: thor.thayer@linux.intel.com To: dinguyen@kernel.org, robh+dt@kernel.org, joro@8bytes.org, mark.rutland@arm.com, robin.murphy@arm.com Cc: catalin.marinas@arm.com, will.deacon@arm.com, iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Thor Thayer Subject: [PATCH 0/3] SOCFPGA Stratix10 SMMU Support Date: Fri, 13 Jul 2018 11:27:55 -0500 Message-Id: <1531499278-32132-1-git-send-email-thor.thayer@linux.intel.com> X-Mailer: git-send-email 2.7.4 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Thor Thayer This patch series adds SMMU support to the SOCFPGA Stratix10 family of parts. The addition of a clock parameter was required to ungate the SMMU clock. Thor Thayer (3): Docs: dt: arm-smmu: Add optional clock parameter iommu/arm-smmu: Add optional SMMU clock arm64: dts: stratix10: Add SMMU Node .../devicetree/bindings/iommu/arm,smmu.txt | 16 ++++++++ arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 44 ++++++++++++++++++++++ drivers/iommu/arm-smmu.c | 17 +++++++++ 3 files changed, 77 insertions(+)