From patchwork Tue Jan 9 10:01:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vivek Gautam X-Patchwork-Id: 857348 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=codeaurora.org header.i=@codeaurora.org header.b="JKxzXbDj"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="jjZLyJ5w"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zG73Q4SW0z9s75 for ; Tue, 9 Jan 2018 21:02:10 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752863AbeAIKCI (ORCPT ); Tue, 9 Jan 2018 05:02:08 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:59042 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753281AbeAIKCE (ORCPT ); Tue, 9 Jan 2018 05:02:04 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id F355560BEB; Tue, 9 Jan 2018 10:02:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1515492124; bh=RGDRdAzEDXCAaKfz+cfeOduIx4xA6M48W4k+4PVB9DE=; h=From:To:Cc:Subject:Date:From; b=JKxzXbDj5MRrFdCUslNrJfIIfC3tXjBROk9/VrIWFTrg1Pwk2hBi13vVyRl3dW4db HqD9RaXU4qy8VCBHggn3rtS0WNySxqV3mwvMr4Ovh83DqITvsU4dz10hFUiLJ1WRWD yfSo2ZaRg87eI1DR9sfEOMhCzfZyWpyABEkfFb3g= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED, T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-41.ap.qualcomm.com (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.1 with cipher ECDHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: vivek.gautam@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 0AE4B60208; Tue, 9 Jan 2018 10:01:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1515492122; bh=RGDRdAzEDXCAaKfz+cfeOduIx4xA6M48W4k+4PVB9DE=; h=From:To:Cc:Subject:Date:From; b=jjZLyJ5wnsoQNRP945fMsMQZX2eU+QR6Lz4ioXgTeKqVmAFjBhV0g+dUKCyRL7RqB lbdVCHyq0vUT5Kqgildp7w8lspDesCCVfRX4aYFupOWogvgRSQR7V6BNzxmXOIzBtG HhpmQuEG0WdKSn8wkZlYYTeT2hnON8z3NhjHp6w8= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 0AE4B60208 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=vivek.gautam@codeaurora.org From: Vivek Gautam To: joro@8bytes.org, robh+dt@kernel.org, mark.rutland@arm.com, rjw@rjwysocki.net, gregkh@linuxfoundation.org, robdclark@gmail.com, will.deacon@arm.com, robin.murphy@arm.com, sboyd@codeaurora.org, iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Cc: len.brown@intel.com, pavel@ucw.cz, airlied@linux.ie, sricharan@codeaurora.org, m.szyprowski@samsung.com, architt@codeaurora.org, linux-arm-msm@vger.kernel.org, Vivek Gautam Subject: [PATCH v5 0/6] iommu/arm-smmu: Add runtime pm/sleep support Date: Tue, 9 Jan 2018 15:31:43 +0530 Message-Id: <1515492109-753-1-git-send-email-vivek.gautam@codeaurora.org> X-Mailer: git-send-email 1.9.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This series provides the support for turning on the arm-smmu's clocks/power domains using runtime pm. This is done using the recently introduced device links patches, which lets the smmu's runtime to follow the master's runtime pm, so the smmu remains powered only when the masters use it. It also adds support for Qcom's arm-smmu-v2 variant that has different clocks and power requirements. Took some reference from the exynos runtime patches [2]. Previous version of the patchset [1]. After much discussion [4] over the use of pm_runtime_get/put() in .unmap op path for the arm-smmu, and after disussing over more than a couple of approaches to address this, we are putting forward the changes *without* using pm_runtime APIs in 'unmap'. Rather, letting the client device take the control of powering on/off the connected iommu through pm_runtime_get(put)_suppliers() APIs for the scnerios when the iommu power can't be directly controlled by clients through device links. Rafael has agreed to export the suppliers APIs [5]. [V5] * Dropped runtime pm calls from "arm_smmu_unmap" op as discussed over the list [4] for the last patch series. * Added a patch to export pm_runtime_get/put_suppliers() APIs to the series as agreed with Rafael [5]. * Added the related patch for msm drm iommu layer to use pm_runtime_get/put_suppliers() APIs in msm_mmu_funcs. * Dropped arm-mmu500 clock patch since that would break existing platforms. * Changed compatible 'qcom,msm8996-smmu-v2' to 'qcom,smmu-v2' to reflect the IP version rather than the platform on which it is used. The same IP is used across multiple platforms including msm8996, and sdm845 etc. * Using clock bulk APIs to handle the clocks available to the IP as suggested by Stephen Boyd. * The first patch in v4 version of the patch-series: ("iommu/arm-smmu: Fix the error path in arm_smmu_add_device") has already made it to mainline. [V4] * Reworked the clock handling part. We now take clock names as data in the driver for supported compatible versions, and loop over them to get, enable, and disable the clocks. * Using qcom,msm8996 based compatibles for bindings instead of a generic qcom compatible. * Refactor MMU500 patch to just add the necessary clock names data and corresponding bindings. * Added the pm_runtime_get/put() calls in .unmap iommu op (fix added by Stanimir on top of previous patch version. * Added a patch to fix error path in arm_smmu_add_device() * Removed patch 3/5 of V3 patch series that added qcom,smmu-v2 bindings. [V3] * Reworked the patches to keep the clocks init/enabling function separately for each compatible. * Added clocks bindings for MMU40x/500. * Added a new compatible for qcom,smmu-v2 implementation and the clock bindings for the same. * Rebased on top of 4.11-rc1 [V2] * Split the patches little differently. * Addressed comments. * Removed the patch #4 [3] from previous post for arm-smmu context save restore. Planning to post this separately after reworking/addressing Robin's feedback. * Reversed the sequence to disable clocks than enabling. This was required for those cases where the clocks are populated in a dependent order from DT. [1] https://www.spinics.net/lists/arm-kernel/msg567488.html [2] https://lkml.org/lkml/2016/10/20/70 [3] https://patchwork.kernel.org/patch/9389717/ [4] https://patchwork.kernel.org/patch/9827825/ [5] https://patchwork.kernel.org/patch/10102445/ Sricharan R (3): iommu/arm-smmu: Add pm_runtime/sleep ops iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device iommu/arm-smmu: Add the device_link between masters and smmu Vivek Gautam (3): base: power: runtime: Export pm_runtime_get/put_suppliers iommu/arm-smmu: Add support for qcom,smmu-v2 variant drm/msm: iommu: Replace runtime calls with runtime suppliers .../devicetree/bindings/iommu/arm,smmu.txt | 35 ++++++ drivers/base/power/runtime.c | 2 + drivers/gpu/drm/msm/msm_iommu.c | 16 +-- drivers/iommu/arm-smmu.c | 124 ++++++++++++++++++++- 4 files changed, 163 insertions(+), 14 deletions(-) Acked-by: Rafael J. Wysocki