From patchwork Mon Aug 28 10:04:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrice Gasnier X-Patchwork-Id: 806480 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xgnWM4pC0z9sNq for ; Mon, 28 Aug 2017 20:07:27 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751727AbdH1KHL (ORCPT ); Mon, 28 Aug 2017 06:07:11 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:35092 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751435AbdH1KFR (ORCPT ); Mon, 28 Aug 2017 06:05:17 -0400 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v7SA4e11015962; Mon, 28 Aug 2017 12:04:40 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-.pphosted.com with ESMTP id 2cjyveha6m-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 28 Aug 2017 12:04:36 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 90AA338; Mon, 28 Aug 2017 10:04:35 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag5node3.st.com [10.75.127.15]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 41D59201F; Mon, 28 Aug 2017 10:04:35 +0000 (GMT) Received: from localhost (10.75.127.45) by SFHDAG5NODE3.st.com (10.75.127.15) with Microsoft SMTP Server (TLS) id 15.0.1178.4; Mon, 28 Aug 2017 12:04:34 +0200 From: Fabrice Gasnier To: , , , , CC: , , , , , , , , , , Subject: [RESEND PATCH v3 0/9] Add STM32 LPTimer: PWM, trigger and counter Date: Mon, 28 Aug 2017 12:04:05 +0200 Message-ID: <1503914654-19963-1-git-send-email-fabrice.gasnier@st.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG1NODE1.st.com (10.75.127.1) To SFHDAG5NODE3.st.com (10.75.127.15) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-08-28_06:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This series adds support for Low-Power Timer that can be found on some STM32 devices. STM32 LPTimer (LPTIM) is a 16-bit timer that provides several functionalities. This series adds support for following features: - PWM output (with programmable prescaler, configurable polarity) - Trigger source for STM32 ADC or DAC (LPTIM_OUT) - Quadrature encoder and counter The MFD core is used to manage common resources (clock, register map) and to detect encoder feature. "stm32_lptimer" structure is provided to its sub-nodes to share those information: - PWM driver is used to implement single PWM channel - IIO trigger - IIO quadrature encoder and counter Acked-by: Lee Jones --- Resend v3 with collected Acks Changes in v3: - I sent this v3 with various changes, but still need to discuss ABI for counter driver (no change on this in v3). - Remarks for Rob on dt-bindings - Add validate_device in Trigger driver - Update PWM driver after Thierry's comments - Additional patch for STM32 ADC trigger Changes in v2: - Various remarks from Lee, on MFD part, extended to the full series, such as: clock name, use "Low-Power Timer", file headers, dt-bindings props descriptions, fix dt example. Fabrice Gasnier (9): dt-bindings: mfd: Add STM32 LPTimer binding mfd: Add STM32 LPTimer driver dt-bindings: pwm: Add STM32 LPTimer PWM binding pwm: Add STM32 LPTimer PWM driver dt-bindings: iio: Add STM32 LPTimer trigger binding iio: trigger: Add STM32 LPTimer trigger driver dt-bindings: iio: Add STM32 LPTimer quadrature encoder and counter iio: counter: Add support for STM32 LPTimer iio: adc: stm32: add support for lptimer triggers .../ABI/testing/sysfs-bus-iio-lptimer-stm32 | 57 +++ .../bindings/iio/counter/stm32-lptimer-cnt.txt | 27 ++ .../bindings/iio/timer/stm32-lptimer-trigger.txt | 23 ++ .../devicetree/bindings/mfd/stm32-lptimer.txt | 48 +++ .../devicetree/bindings/pwm/pwm-stm32-lp.txt | 24 ++ drivers/iio/adc/stm32-adc.c | 14 +- drivers/iio/counter/Kconfig | 9 + drivers/iio/counter/Makefile | 1 + drivers/iio/counter/stm32-lptimer-cnt.c | 383 +++++++++++++++++++++ drivers/iio/trigger/Kconfig | 11 + drivers/iio/trigger/Makefile | 1 + drivers/iio/trigger/stm32-lptimer-trigger.c | 118 +++++++ drivers/mfd/Kconfig | 14 + drivers/mfd/Makefile | 1 + drivers/mfd/stm32-lptimer.c | 107 ++++++ drivers/pwm/Kconfig | 10 + drivers/pwm/Makefile | 1 + drivers/pwm/pwm-stm32-lp.c | 246 +++++++++++++ include/linux/iio/timer/stm32-lptim-trigger.h | 27 ++ include/linux/mfd/stm32-lptimer.h | 62 ++++ 20 files changed, 1182 insertions(+), 2 deletions(-) create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-lptimer-stm32 create mode 100644 Documentation/devicetree/bindings/iio/counter/stm32-lptimer-cnt.txt create mode 100644 Documentation/devicetree/bindings/iio/timer/stm32-lptimer-trigger.txt create mode 100644 Documentation/devicetree/bindings/mfd/stm32-lptimer.txt create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt create mode 100644 drivers/iio/counter/stm32-lptimer-cnt.c create mode 100644 drivers/iio/trigger/stm32-lptimer-trigger.c create mode 100644 drivers/mfd/stm32-lptimer.c create mode 100644 drivers/pwm/pwm-stm32-lp.c create mode 100644 include/linux/iio/timer/stm32-lptim-trigger.h create mode 100644 include/linux/mfd/stm32-lptimer.h