Message ID | 548B0AD0.6050304@arm.com |
---|---|
State | New |
Headers | show |
Ping. https://gcc.gnu.org/ml/gcc-patches/2014-12/msg01116.html Thanks, Kyrill On 12/12/14 15:33, Kyrill Tkachov wrote: > Hi all, > > Since the movsi_aarch64 and movdi_aarch64 patterns became splitters we > want to make sure that the splitting happens only when we deal with GP > registers. > > This patch guards the splitting part by GP_REGNUM_P rather than trying > to complicate aarch64_expand_mov_immediate too much to try and handle > the SIMD registers case. > > A testcase is added. > Bootstrap on aarch64-none-linux-gnu and testing on aarch64-none-elf was > succesfull. > > Ok for trunk? > > Thanks, > Kyrill > > 2014-12-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> > Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> > > PR target/64263 > * config/aarch64/aarch64.md (*movsi_aarch64): Don't split if the > destination is not a GP reg. > (*movdi_aarch64): Likewise. > > 2014-12-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> > > PR target/64263 > * gcc.target/aarch64/pr64263_1.c: New test.
Ping. Thanks, Kyrill On 09/01/15 11:32, Kyrill Tkachov wrote: > Ping. > > https://gcc.gnu.org/ml/gcc-patches/2014-12/msg01116.html > > Thanks, > Kyrill > > On 12/12/14 15:33, Kyrill Tkachov wrote: >> Hi all, >> >> Since the movsi_aarch64 and movdi_aarch64 patterns became splitters we >> want to make sure that the splitting happens only when we deal with GP >> registers. >> >> This patch guards the splitting part by GP_REGNUM_P rather than trying >> to complicate aarch64_expand_mov_immediate too much to try and handle >> the SIMD registers case. >> >> A testcase is added. >> Bootstrap on aarch64-none-linux-gnu and testing on aarch64-none-elf was >> succesfull. >> >> Ok for trunk? >> >> Thanks, >> Kyrill >> >> 2014-12-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> >> Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> >> >> PR target/64263 >> * config/aarch64/aarch64.md (*movsi_aarch64): Don't split if the >> destination is not a GP reg. >> (*movdi_aarch64): Likewise. >> >> 2014-12-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> >> >> PR target/64263 >> * gcc.target/aarch64/pr64263_1.c: New test. > >
On 12 December 2014 at 15:33, Kyrill Tkachov <kyrylo.tkachov@arm.com> wrote: > 2014-12-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> > Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> > > PR target/64263 > * config/aarch64/aarch64.md (*movsi_aarch64): Don't split if the > destination is not a GP reg. > (*movdi_aarch64): Likewise. > > 2014-12-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> > > PR target/64263 > * gcc.target/aarch64/pr64263_1.c: New test. OK /Marcus
commit befb68e4b1b10e1052748202fcb4a83637fae234 Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com> Date: Thu Dec 11 12:17:30 2014 +0000 [AArch64] Fix PR target/64263 diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 97d7009..693369f 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -854,7 +854,8 @@ (define_insn_and_split "*movsi_aarch64" fmov\\t%s0, %w1 fmov\\t%w0, %s1 fmov\\t%s0, %s1" - "CONST_INT_P (operands[1]) && !aarch64_move_imm (INTVAL (operands[1]), SImode)" + "CONST_INT_P (operands[1]) && !aarch64_move_imm (INTVAL (operands[1]), SImode) + && GP_REGNUM_P (REGNO (operands[0]))" [(const_int 0)] "{ aarch64_expand_mov_immediate (operands[0], operands[1]); @@ -886,7 +887,8 @@ (define_insn_and_split "*movdi_aarch64" fmov\\t%x0, %d1 fmov\\t%d0, %d1 movi\\t%d0, %1" - "(CONST_INT_P (operands[1]) && !aarch64_move_imm (INTVAL (operands[1]), DImode))" + "(CONST_INT_P (operands[1]) && !aarch64_move_imm (INTVAL (operands[1]), DImode)) + && GP_REGNUM_P (REGNO (operands[0]))" [(const_int 0)] "{ aarch64_expand_mov_immediate (operands[0], operands[1]); diff --git a/gcc/testsuite/gcc.target/aarch64/pr64263_1.c b/gcc/testsuite/gcc.target/aarch64/pr64263_1.c new file mode 100644 index 0000000..047e623 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr64263_1.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O1" } */ + +#include "arm_neon.h" + +extern long int vget_lane_s64_1 (int64x1_t, const int); + +void +foo () +{ + int8x8_t val14; + int8x8_t val15; + uint8x8_t val16; + uint32x4_t val40; + val14 = vcreate_s8 (0xff0080f6807f807fUL); + val15 = vcreate_s8 (0x10807fff7f808080UL); + val16 = vcgt_s8 (val14, val15); + val40 = vreinterpretq_u32_u64 ( + vdupq_n_u64 ( + vget_lane_s64_1 ( + vreinterpret_s64_u8 (val16), 0) + )); +}