[v2,RESEND,2/3] Documentation: gpio: Add APM X-Gene standby GPIO controller DTS binding

Documentation for APM X-Gene standby GPIO controller DTS binding.

Signed-off-by: Y Vo <yvo@apm.com>
---
 .../devicetree/bindings/gpio/gpio-xgene-sb.txt     | 31 ++++++++++++++++++++++
 1 file changed, 31 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt

On Wed, Dec 17, 2014 at 6:10 AM, Y Vo <yvo@apm.com> wrote:
> Documentation for APM X-Gene standby GPIO controller DTS binding.
>
> Signed-off-by: Y Vo <yvo@apm.com>
> ---
>  .../devicetree/bindings/gpio/gpio-xgene-sb.txt     | 31 ++++++++++++++++++++++
>  1 file changed, 31 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt
>
> diff --git a/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt b/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt
> new file mode 100644
> index 0000000..3215e4d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt
> @@ -0,0 +1,31 @@
> +APM X-Gene Standby GPIO controller bindings
> +
> +This is a gpio controller in standby domain.
> +
> +There are 20 GPIO pins from 0..21. There is no GPIO_DS14 and GPIO_DS15.
> +Only GPIO_DS8..GPIO_DS13 support interrupt. IRQ mapping 0x28..0x2d.
> +
> +Required properties:
> +- compatible: "apm,xgene-gpio-sb" for X-Gene Standby GPIO controller
> +- reg: Physical base address and size of the controller's registers
> +- #gpio-cells: Should be two.
> +       - first cell is the pin number
> +       - second cell is used to specify the gpio polarity:
> +               0 = active high
> +               1 = active low
> +- gpio-controller: Marks the device node as a GPIO controller.
> +- interrupts: Shall contains the interrupts.

From the example it seems it must contain exactly 6 interrupts?
Then state this.

> +Example:
> +       sbgpio: sbgpio@17001000 {
> +               compatible = "apm,xgene-gpio-sb";
> +               reg = <0x0 0x17001000 0x0 0x400>;
> +               #gpio-cells = <2>;
> +               gpio-controller;
> +               interrupts =    <0x0 0x28 0x1>,
> +                               <0x0 0x29 0x1>,
> +                               <0x0 0x2a 0x1>,
> +                               <0x0 0x2b 0x1>,
> +                               <0x0 0x2c 0x1>,
> +                               <0x0 0x2d 0x1>;
> +       };

Yours,
Linus Walleij
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Yes, exactly 6 interrupts. As I describe before:
- There are 22 GPIO_DSs.
- Only 6 GPIO_DSs from 0x08..0xD which supports interrupts

Regards,
Y

On Tue, Jan 13, 2015 at 4:25 PM, Linus Walleij <linus.walleij@linaro.org> wrote:
> On Wed, Dec 17, 2014 at 6:10 AM, Y Vo <yvo@apm.com> wrote:
>> Documentation for APM X-Gene standby GPIO controller DTS binding.
>>
>> Signed-off-by: Y Vo <yvo@apm.com>
>> ---
>>  .../devicetree/bindings/gpio/gpio-xgene-sb.txt     | 31 ++++++++++++++++++++++
>>  1 file changed, 31 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt
>>
>> diff --git a/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt b/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt
>> new file mode 100644
>> index 0000000..3215e4d
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt
>> @@ -0,0 +1,31 @@
>> +APM X-Gene Standby GPIO controller bindings
>> +
>> +This is a gpio controller in standby domain.
>> +
>> +There are 20 GPIO pins from 0..21. There is no GPIO_DS14 and GPIO_DS15.
>> +Only GPIO_DS8..GPIO_DS13 support interrupt. IRQ mapping 0x28..0x2d.
>> +
>> +Required properties:
>> +- compatible: "apm,xgene-gpio-sb" for X-Gene Standby GPIO controller
>> +- reg: Physical base address and size of the controller's registers
>> +- #gpio-cells: Should be two.
>> +       - first cell is the pin number
>> +       - second cell is used to specify the gpio polarity:
>> +               0 = active high
>> +               1 = active low
>> +- gpio-controller: Marks the device node as a GPIO controller.
>> +- interrupts: Shall contains the interrupts.
>
> From the example it seems it must contain exactly 6 interrupts?
> Then state this.
>
>> +Example:
>> +       sbgpio: sbgpio@17001000 {
>> +               compatible = "apm,xgene-gpio-sb";
>> +               reg = <0x0 0x17001000 0x0 0x400>;
>> +               #gpio-cells = <2>;
>> +               gpio-controller;
>> +               interrupts =    <0x0 0x28 0x1>,
>> +                               <0x0 0x29 0x1>,
>> +                               <0x0 0x2a 0x1>,
>> +                               <0x0 0x2b 0x1>,
>> +                               <0x0 0x2c 0x1>,
>> +                               <0x0 0x2d 0x1>;
>> +       };
>
> Yours,
> Linus Walleij
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On Tue, Jan 13, 2015 at 10:41 AM, Y Vo <yvo@apm.com> wrote:
> Yes, exactly 6 interrupts. As I describe before:
> - There are 22 GPIO_DSs.
> - Only 6 GPIO_DSs from 0x08..0xD which supports interrupts

What I'm saying is that you need to describe this in the binding
document itself.

If you described it somewhere else doesn't count.

So update the patch.

Yours,
Linus Walleij
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