diff mbox

[AArch64] Allow stack pointer as first input to a subtraction

Message ID 87387f2c0j.fsf@e105548-lin.cambridge.arm.com
State New
Headers show

Commit Message

Richard Sandiford Jan. 13, 2015, 10:47 a.m. UTC 
Several sub-based patterns allowed the stack pointer to be the destination
but not the first source.  This looked like an oversight; in all the patterns
changed here (but not for example in *sub_mul_imm_<mode>), the instruction
allows the stack pointer to appear in both positions.

Tested on aarch64-linux-gnu.  OK to install?

Thanks,
Richard


gcc/
	* config/aarch64/aarch64.md (subsi3, *subsi3_uxtw, subdi3)
	(*sub_<optab><ALLX:mode>_<GPI:mode>, *sub_<optab><SHORT:mode>_si_uxtw)
	(*sub_<optab><ALLX:mode>_shft_<GPI:mode>)
	(*sub_<optab><SHORT:mode>_shft_si_uxtw, *sub_<optab><mode>_multp2)
	(*sub_<optab>si_multp2_uxtw, *sub_uxt<mode>_multp2)
	(*sub_uxtsi_multp2_uxtw): Add stack pointer sources.

gcc/testsuite/
	* gcc.target/aarch64/subsp.c: New test.

Comments

Marcus Shawcroft Jan. 13, 2015, 12:28 p.m. UTC | #1 
On 13 January 2015 at 10:47, Richard Sandiford
<richard.sandiford@arm.com> wrote:
> Several sub-based patterns allowed the stack pointer to be the destination
> but not the first source.  This looked like an oversight; in all the patterns
> changed here (but not for example in *sub_mul_imm_<mode>), the instruction
> allows the stack pointer to appear in both positions.
>
> Tested on aarch64-linux-gnu.  OK to install?
>
> Thanks,
> Richard
>
>
> gcc/
>         * config/aarch64/aarch64.md (subsi3, *subsi3_uxtw, subdi3)
>         (*sub_<optab><ALLX:mode>_<GPI:mode>, *sub_<optab><SHORT:mode>_si_uxtw)
>         (*sub_<optab><ALLX:mode>_shft_<GPI:mode>)
>         (*sub_<optab><SHORT:mode>_shft_si_uxtw, *sub_<optab><mode>_multp2)
>         (*sub_<optab>si_multp2_uxtw, *sub_uxt<mode>_multp2)
>         (*sub_uxtsi_multp2_uxtw): Add stack pointer sources.
>
> gcc/testsuite/
>         * gcc.target/aarch64/subsp.c: New test.

OK /Marcus
diff mbox

Patch

Index: gcc/config/aarch64/aarch64.md
===================================================================
--- gcc/config/aarch64/aarch64.md	2015-01-13 09:48:26.901649982 +0000
+++ gcc/config/aarch64/aarch64.md	2015-01-13 09:48:26.897650031 +0000
@@ -1889,8 +1889,8 @@  (define_insn "*add_uxtsi_multp2_uxtw"
 
 (define_insn "subsi3"
   [(set (match_operand:SI 0 "register_operand" "=rk")
-	(minus:SI (match_operand:SI 1 "register_operand" "r")
-		   (match_operand:SI 2 "register_operand" "r")))]
+	(minus:SI (match_operand:SI 1 "register_operand" "rk")
+		  (match_operand:SI 2 "register_operand" "r")))]
   ""
   "sub\\t%w0, %w1, %w2"
   [(set_attr "type" "alu_sreg")]
@@ -1900,7 +1900,7 @@  (define_insn "subsi3"
 (define_insn "*subsi3_uxtw"
   [(set (match_operand:DI 0 "register_operand" "=rk")
 	(zero_extend:DI
-         (minus:SI (match_operand:SI 1 "register_operand" "r")
+         (minus:SI (match_operand:SI 1 "register_operand" "rk")
 		   (match_operand:SI 2 "register_operand" "r"))))]
   ""
   "sub\\t%w0, %w1, %w2"
@@ -1909,8 +1909,8 @@  (define_insn "*subsi3_uxtw"
 
 (define_insn "subdi3"
   [(set (match_operand:DI 0 "register_operand" "=rk,w")
-	(minus:DI (match_operand:DI 1 "register_operand" "r,w")
-		   (match_operand:DI 2 "register_operand" "r,w")))]
+	(minus:DI (match_operand:DI 1 "register_operand" "rk,w")
+		  (match_operand:DI 2 "register_operand" "r,w")))]
   ""
   "@
    sub\\t%x0, %x1, %x2
@@ -2013,7 +2013,7 @@  (define_insn "*sub_mul_imm_si_uxtw"
 
 (define_insn "*sub_<optab><ALLX:mode>_<GPI:mode>"
   [(set (match_operand:GPI 0 "register_operand" "=rk")
-	(minus:GPI (match_operand:GPI 1 "register_operand" "r")
+	(minus:GPI (match_operand:GPI 1 "register_operand" "rk")
 		   (ANY_EXTEND:GPI
 		    (match_operand:ALLX 2 "register_operand" "r"))))]
   ""
@@ -2025,7 +2025,7 @@  (define_insn "*sub_<optab><ALLX:mode>_<G
 (define_insn "*sub_<optab><SHORT:mode>_si_uxtw"
   [(set (match_operand:DI 0 "register_operand" "=rk")
 	(zero_extend:DI
-         (minus:SI (match_operand:SI 1 "register_operand" "r")
+         (minus:SI (match_operand:SI 1 "register_operand" "rk")
 		   (ANY_EXTEND:SI
 		    (match_operand:SHORT 2 "register_operand" "r")))))]
   ""
@@ -2035,7 +2035,7 @@  (define_insn "*sub_<optab><SHORT:mode>_s
 
 (define_insn "*sub_<optab><ALLX:mode>_shft_<GPI:mode>"
   [(set (match_operand:GPI 0 "register_operand" "=rk")
-	(minus:GPI (match_operand:GPI 1 "register_operand" "r")
+	(minus:GPI (match_operand:GPI 1 "register_operand" "rk")
 		   (ashift:GPI (ANY_EXTEND:GPI
 				(match_operand:ALLX 2 "register_operand" "r"))
 			       (match_operand 3 "aarch64_imm3" "Ui3"))))]
@@ -2048,7 +2048,7 @@  (define_insn "*sub_<optab><ALLX:mode>_sh
 (define_insn "*sub_<optab><SHORT:mode>_shft_si_uxtw"
   [(set (match_operand:DI 0 "register_operand" "=rk")
 	(zero_extend:DI
-         (minus:SI (match_operand:SI 1 "register_operand" "r")
+         (minus:SI (match_operand:SI 1 "register_operand" "rk")
 		   (ashift:SI (ANY_EXTEND:SI
 			       (match_operand:SHORT 2 "register_operand" "r"))
 			      (match_operand 3 "aarch64_imm3" "Ui3")))))]
@@ -2059,7 +2059,7 @@  (define_insn "*sub_<optab><SHORT:mode>_s
 
 (define_insn "*sub_<optab><mode>_multp2"
   [(set (match_operand:GPI 0 "register_operand" "=rk")
-	(minus:GPI (match_operand:GPI 4 "register_operand" "r")
+	(minus:GPI (match_operand:GPI 4 "register_operand" "rk")
 		   (ANY_EXTRACT:GPI
 		    (mult:GPI (match_operand:GPI 1 "register_operand" "r")
 			      (match_operand 2 "aarch64_pwr_imm3" "Up3"))
@@ -2074,7 +2074,7 @@  (define_insn "*sub_<optab><mode>_multp2"
 (define_insn "*sub_<optab>si_multp2_uxtw"
   [(set (match_operand:DI 0 "register_operand" "=rk")
 	(zero_extend:DI
-         (minus:SI (match_operand:SI 4 "register_operand" "r")
+         (minus:SI (match_operand:SI 4 "register_operand" "rk")
 		   (ANY_EXTRACT:SI
 		    (mult:SI (match_operand:SI 1 "register_operand" "r")
 			     (match_operand 2 "aarch64_pwr_imm3" "Up3"))
@@ -2113,7 +2113,7 @@  (define_insn "*subsi3_carryin_uxtw"
 
 (define_insn "*sub_uxt<mode>_multp2"
   [(set (match_operand:GPI 0 "register_operand" "=rk")
-	(minus:GPI (match_operand:GPI 4 "register_operand" "r")
+	(minus:GPI (match_operand:GPI 4 "register_operand" "rk")
 		   (and:GPI
 		    (mult:GPI (match_operand:GPI 1 "register_operand" "r")
 			      (match_operand 2 "aarch64_pwr_imm3" "Up3"))
@@ -2130,7 +2130,7 @@  (define_insn "*sub_uxt<mode>_multp2"
 (define_insn "*sub_uxtsi_multp2_uxtw"
   [(set (match_operand:DI 0 "register_operand" "=rk")
 	(zero_extend:DI
-         (minus:SI (match_operand:SI 4 "register_operand" "r")
+         (minus:SI (match_operand:SI 4 "register_operand" "rk")
 		   (and:SI
 		    (mult:SI (match_operand:SI 1 "register_operand" "r")
 			     (match_operand 2 "aarch64_pwr_imm3" "Up3"))
Index: gcc/testsuite/gcc.target/aarch64/subsp.c
===================================================================
--- /dev/null	2015-01-09 18:13:49.290087007 +0000
+++ gcc/testsuite/gcc.target/aarch64/subsp.c	2015-01-13 09:48:54.273312467 +0000
@@ -0,0 +1,19 @@ 
+/* { dg-options "-O" } */
+
+int foo (void *);
+
+int
+f1 (int *x, long y)
+{
+  return foo (__builtin_alloca (y));
+}
+
+int
+f2 (int *x, int y)
+{
+  char a[y + 1][16];
+  return foo (a);
+}
+
+/* { dg-final { scan-assembler "sub\tsp, sp, x\[0-9\]*\n" } } */
+/* { dg-final { scan-assembler "sub\tsp, sp, x\[0-9\]*, sxtw 4\n" } } */