| Message ID | alpine.DEB.1.10.1412022227360.19155@tp.orcam.me.uk |
|---|---|
| State | New |
| Headers | show |
On 02/12/2014 22:31, Maciej W. Rozycki wrote: > Set DisasContext's ulri member to 0 or 1 as with other bool members. > > Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> > --- > qemu-mips-disas-ulri.diff > Index: qemu-git-trunk/target-mips/translate.c > =================================================================== > --- qemu-git-trunk.orig/target-mips/translate.c 2014-12-02 21:28:17.528936640 +0000 > +++ qemu-git-trunk/target-mips/translate.c 2014-12-02 21:28:41.028928249 +0000 > @@ -19114,7 +19114,7 @@ gen_intermediate_code_internal(MIPSCPU * > ctx.bp = (env->CP0_Config3 >> CP0C3_BP) & 1; > /* Restore delay slot state from the tb context. */ > ctx.hflags = (uint32_t)tb->flags; /* FIXME: maybe use 64 bits here? */ > - ctx.ulri = env->CP0_Config3 & (1 << CP0C3_ULRI); > + ctx.ulri = (env->CP0_Config3 >> CP0C3_ULRI) & 1; > restore_cpu_state(env, &ctx); > #ifdef CONFIG_USER_ONLY > ctx.mem_idx = MIPS_HFLAG_UM; > Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Index: qemu-git-trunk/target-mips/translate.c =================================================================== --- qemu-git-trunk.orig/target-mips/translate.c 2014-12-02 21:28:17.528936640 +0000 +++ qemu-git-trunk/target-mips/translate.c 2014-12-02 21:28:41.028928249 +0000 @@ -19114,7 +19114,7 @@ gen_intermediate_code_internal(MIPSCPU * ctx.bp = (env->CP0_Config3 >> CP0C3_BP) & 1; /* Restore delay slot state from the tb context. */ ctx.hflags = (uint32_t)tb->flags; /* FIXME: maybe use 64 bits here? */ - ctx.ulri = env->CP0_Config3 & (1 << CP0C3_ULRI); + ctx.ulri = (env->CP0_Config3 >> CP0C3_ULRI) & 1; restore_cpu_state(env, &ctx); #ifdef CONFIG_USER_ONLY ctx.mem_idx = MIPS_HFLAG_UM;
Set DisasContext's ulri member to 0 or 1 as with other bool members. Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> --- qemu-mips-disas-ulri.diff