[v2] mips: Correct MIPS16/microMIPS branch size calculation

Correct MIPS16/microMIPS branch size calculation in PC adjustment 
needed:

- to set the value of CP0.ErrorEPC at the entry to the reset exception,

- for the purpose of branch reexecution in the context of device I/O.

Follow the approach taken in `exception_resume_pc' for ordinary, Debug 
and NMI exceptions.

MIPS16 and microMIPS branches can be 2 or 4 bytes in size and that has 
to be reflected in calculation.  Original MIPS ISA branches, which is 
where this code originates from, are always 4 bytes long, just as all 
original MIPS ISA instructions.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
---
 Another change that has waited for too long, with the original 
discussion archived here:

http://lists.nongnu.org/archive/html/qemu-devel/2012-06/msg01230.html

Resending with what hopefully is a better description and updated to 
reflect the move of `cpu_io_recompile' from exec.c to translate-all.c.

 Please apply,

  Maciej

qemu-mips-b16.diff

On 07/11/2014 20:05, Maciej W. Rozycki wrote:
> Correct MIPS16/microMIPS branch size calculation in PC adjustment 
> needed:
> 
> - to set the value of CP0.ErrorEPC at the entry to the reset exception,
> 
> - for the purpose of branch reexecution in the context of device I/O.
> 
> Follow the approach taken in `exception_resume_pc' for ordinary, Debug 
> and NMI exceptions.
> 
> MIPS16 and microMIPS branches can be 2 or 4 bytes in size and that has 
> to be reflected in calculation.  Original MIPS ISA branches, which is 
> where this code originates from, are always 4 bytes long, just as all 
> original MIPS ISA instructions.
> 
> Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
> Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
> ---
>  Another change that has waited for too long, with the original 
> discussion archived here:
> 
> http://lists.nongnu.org/archive/html/qemu-devel/2012-06/msg01230.html
> 
> Resending with what hopefully is a better description and updated to 
> reflect the move of `cpu_io_recompile' from exec.c to translate-all.c.
> 
>  Please apply,
> 
>   Maciej
> 
> qemu-mips-b16.diff
> Index: qemu-git-trunk/target-mips/translate.c
> ===================================================================
> --- qemu-git-trunk.orig/target-mips/translate.c	2014-11-07 18:34:30.927788566 +0000
> +++ qemu-git-trunk/target-mips/translate.c	2014-11-07 18:34:35.428958223 +0000
> @@ -19452,7 +19452,8 @@ void cpu_state_reset(CPUMIPSState *env)
>      if (env->hflags & MIPS_HFLAG_BMASK) {
>          /* If the exception was raised from a delay slot,
>             come back to the jump.  */
> -        env->CP0_ErrorEPC = env->active_tc.PC - 4;
> +        env->CP0_ErrorEPC = (env->active_tc.PC
> +                             - (env->hflags & MIPS_HFLAG_B16 ? 2 : 4));
>      } else {
>          env->CP0_ErrorEPC = env->active_tc.PC;
>      }
> Index: qemu-git-trunk/translate-all.c
> ===================================================================
> --- qemu-git-trunk.orig/translate-all.c	2014-11-07 17:33:13.037575065 +0000
> +++ qemu-git-trunk/translate-all.c	2014-11-07 18:34:35.428958223 +0000
> @@ -1534,7 +1534,7 @@ void cpu_io_recompile(CPUState *cpu, uin
>         branch.  */
>  #if defined(TARGET_MIPS)
>      if ((env->hflags & MIPS_HFLAG_BMASK) != 0 && n > 1) {
> -        env->active_tc.PC -= 4;
> +        env->active_tc.PC -= (env->hflags & MIPS_HFLAG_B16 ? 2 : 4);
>          cpu->icount_decr.u16.low++;
>          env->hflags &= ~MIPS_HFLAG_BMASK;
>      }
> 

Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>