| Message ID | 1415379369-16877-1-git-send-email-leon.alrae@imgtec.com |
|---|---|
| State | New |
| Headers | show |
On 7 November 2014 16:56, Leon Alrae <leon.alrae@imgtec.com> wrote: > Hi, > > A bunch of bug fixes for 2.2, please pull. > > Thanks, > Leon > > Cc: Peter Maydell <peter.maydell@linaro.org> > Cc: Aurelien Jarno <aurelien@aurel32.net> > > The following changes since commit 6e76d125f244e10676b917208f2a074729820246: > > Update version for v2.2.0-rc0 release (2014-11-05 15:21:04 +0000) > > are available in the git repository at: > > git://github.com/lalrae/qemu.git tags/mips-20141107 > > for you to fetch changes up to cb269f273fdbdb26ddb1cba4a0fe2249418a8e77: > > target-mips: fix multiple TCG registers covering same data (2014-11-07 14:15:28 +0000) > > ---------------------------------------------------------------- > MIPS patches 2014-11-07 > > Changes: > * bug fixes Applied, thanks. -- PMM
On 10 November 2014 14:57, Peter Maydell <peter.maydell@linaro.org> wrote:
> Applied, thanks.
PS: you might like to look at suppressing these relatively
new clang warnings:
target-mips/translate.c:1968:15: warning: no case matching constant
switch condition '16'
FOP_CONDNS(s, FMT_S, 32, gen_store_fpr32(fp0, fd))
^~~~~
target-mips/translate.c:1885:13: note: expanded from macro 'FOP_CONDNS'
switch (ifmt) { \
^
That can wait for 2.3 though, we have plenty of other clang
warnings still and the code looks correct.
thanks
-- PMM
Hi, A bunch of bug fixes for 2.2, please pull. Thanks, Leon Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Aurelien Jarno <aurelien@aurel32.net> The following changes since commit 6e76d125f244e10676b917208f2a074729820246: Update version for v2.2.0-rc0 release (2014-11-05 15:21:04 +0000) are available in the git repository at: git://github.com/lalrae/qemu.git tags/mips-20141107 for you to fetch changes up to cb269f273fdbdb26ddb1cba4a0fe2249418a8e77: target-mips: fix multiple TCG registers covering same data (2014-11-07 14:15:28 +0000) ---------------------------------------------------------------- MIPS patches 2014-11-07 Changes: * bug fixes ---------------------------------------------------------------- Leon Alrae (1): target-mips: fix for missing delay slot in BC1EQZ and BC1NEZ Maciej W. Rozycki (5): mips: Remove CONFIG_VT82C686 from non-Fulong configs mips: Respect CP0.Status.CU1 for microMIPS FP branches mips: Add macros for CP0.Config3 and CP0.Config4 bits mips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bits mips: Ensure PC update with MTC0 single-stepping Yongbok Kim (1): target-mips: fix multiple TCG registers covering same data default-configs/mips-softmmu.mak | 1 - default-configs/mips64-softmmu.mak | 1 - default-configs/mipsel-softmmu.mak | 1 - target-mips/cpu.h | 13 +++++++++++++ target-mips/translate.c | 20 ++++++++++++-------- target-mips/translate_init.c | 8 +++++--- 6 files changed, 30 insertions(+), 14 deletions(-)