@@ -89,6 +89,10 @@ Commands:
Configuration Options:
+ CONFIG_SYS_NAND_U_BOOT_OFFS
+ NAND Offset from where SPL will read u-boot image. This is the starting
+ address of u-boot MTD partition in NAND.
+
CONFIG_CMD_NAND
Enables NAND support and commmands.
@@ -226,6 +230,14 @@ Platform specific options
detection. However ECC calculation on such plaforms would still be
done by GPMC controller.
+ CONFIG_SPL_NAND_AM33XX_BCH
+ Enables SPL-NAND driver (am335x_spl_bch.c) which supports ELM based
+ hardware ECC correction. This is useful for platforms which have ELM
+ hardware engine and use NAND boot mode.
+ Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
+ so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
+ SPL-NAND driver with software ECC correction support.
+
CONFIG_NAND_OMAP_ECCSCHEME
On OMAP platforms, this CONFIG specifies NAND ECC scheme.
It can take following values:
@@ -233,6 +233,8 @@
#ifdef CONFIG_NAND
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_NAND_OMAP_ELM
+#define CONFIG_SPL_NAND_AM33XX_BCH
+/* NAND: device related configs */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
CONFIG_SYS_NAND_PAGE_SIZE)
@@ -254,6 +256,11 @@
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+#ifdef CONFIG_SPL_OS_BOOT
+ #define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os parameters */
+ #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
+ #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
+#endif
#endif
#endif
@@ -150,6 +150,16 @@
#define CONFIG_ENV_OFFSET 0x300000 /* environment starts here */
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
#define CONFIG_SYS_NAND_ONFI_DETECTION
+/* NAND: driver related configs */
+#define CONFIG_NAND_OMAP_GPMC
+#define CONFIG_NAND_OMAP_ELM
+#define CONFIG_SPL_NAND_AM33XX_BCH /* SPL-NAND driver with ELM support */
+/* NAND: SPL falcon mode configs */
+#ifdef CONFIG_SPL_OS_BOOT
+ #define CONFIG_CMD_SPL_NAND_OFS 0x400000 /* un-assigned: (using dtb) */
+ #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000
+ #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
+#endif
/* GPIO pin + bank to pin ID mapping */
#define GPIO_PIN(_bank, _pin) ((_bank << 5) + _pin)
@@ -126,6 +126,12 @@
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
/* devices */
+/* NAND: SPL falcon mode configs */
+#ifdef CONFIG_SPL_OS_BOOT
+#define CONFIG_CMD_SPL_NAND_OFS 0x240000
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
+#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
+#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
"loadaddr=0x80200000\0" \
@@ -187,6 +187,15 @@
/* NAND boot config */
#ifdef CONFIG_NAND
+#define CONFIG_NAND_OMAP_GPMC
+/* NAND: SPL falcon mode configs */
+#ifdef CONFIG_SPL_OS_BOOT
+ #define CONFIG_CMD_SPL_NAND_OFS 0x240000
+ #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
+ #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
+#endif
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+/* NAND: device related configs */
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT 64
@@ -206,6 +206,14 @@
#define CONFIG_SYS_CACHELINE_SIZE 64
/* NAND boot config */
+#define CONFIG_NAND_OMAP_GPMC
+/* NAND: SPL falcon mode configs */
+#ifdef CONFIG_SPL_OS_BOOT
+ #define CONFIG_CMD_SPL_NAND_OFS 0x240000
+ #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
+ #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
+#endif
+/* NAND: device related configs */
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT 64
@@ -69,6 +69,13 @@
"1920k(u-boot),128k(u-boot-env),"\
"4m(kernel),-(fs)"
+#define CONFIG_NAND_OMAP_GPMC
+/* NAND: SPL falcon mode configs */
+#ifdef CONFIG_SPL_OS_BOOT
+ #define CONFIG_CMD_SPL_NAND_OFS 0x240000
+ #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
+ #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
+#endif
#if defined(CONFIG_CMD_NAND)
#define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */
#endif
@@ -127,6 +127,7 @@
#define CONFIG_CMD_NAND
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_NAND_OMAP_ELM
+#define CONFIG_SPL_NAND_AM33XX_BCH
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
CONFIG_SYS_NAND_PAGE_SIZE)
@@ -159,6 +160,12 @@
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
+/* NAND: SPL falcon mode configs */
+#ifdef CONFIG_SPL_OS_BOOT
+ #define CONFIG_CMD_SPL_NAND_OFS 0x240000 /* un-assigned */
+ #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
+ #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
+#endif
/*
* USB configuration. We enable MUSB support, both for host and for
@@ -84,10 +84,6 @@
#define CONFIG_BOARD_EARLY_INIT_F
#endif
-#ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */
-#endif
-
/* Now bring in the rest of the common code. */
#include <configs/ti_armv7_common.h>
@@ -110,7 +110,6 @@
* access CS0 at is 0x8000000.
*/
#ifdef CONFIG_NAND
-#define CONFIG_NAND_OMAP_GPMC
#ifndef CONFIG_SYS_NAND_BASE
#define CONFIG_SYS_NAND_BASE 0x8000000
#endif
@@ -243,13 +242,6 @@
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
-/* NAND */
-#ifdef CONFIG_NAND
-#define CONFIG_CMD_SPL_NAND_OFS 0x240000 /* end of u-boot */
-#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
-#endif
-
/* spl export command */
#define CONFIG_CMD_SPL
#endif
@@ -275,7 +267,6 @@
#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_MTD_SUPPORT
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
#endif
#endif /* !CONFIG_NOR_BOOT */
This patch moves some board specific NAND configs: - FROM: generic config files like 'ti_armv7_common.h' and 'ti_am335x_common.h' - TO: individual board config files using these configs. So that each board can independently set the value as per its design. Following configs are affected in this patch: CONFIG_NAND_OMAP_GPMC: <refer doc/README.nand> CONFIG_NAND_OMAP_ELM: <refer doc/README.nand> CONFIG_SPL_NAND_AM33XX_BCH: <refer doc/README.nand> CONFIG_SYS_NAND_U_BOOT_OFFS: <refer doc/README.nand> CONFIG_CMD_SPL_NAND_OFS: <refer doc/README.falcon> CONFIG_SYS_NAND_SPL_KERNEL_OFFS: <refer doc/README.falcon> CONFIG_CMD_SPL_WRITE_SIZE: <refer doc/README.falcon> This patch also updates documentation for few of above NAND configs. Signed-off-by: Pekon Gupta <pekon@ti.com> --- doc/README.nand | 12 ++++++++++++ include/configs/am335x_evm.h | 7 +++++++ include/configs/cm_t335.h | 10 ++++++++++ include/configs/omap3_beagle.h | 6 ++++++ include/configs/omap3_igep00x0.h | 9 +++++++++ include/configs/omap3_overo.h | 8 ++++++++ include/configs/omap3_zoom1.h | 7 +++++++ include/configs/pengwyn.h | 7 +++++++ include/configs/ti_am335x_common.h | 4 ---- include/configs/ti_armv7_common.h | 9 --------- 10 files changed, 66 insertions(+), 13 deletions(-)