| Message ID | 53B3BC7E.3040709@mentor.com |
|---|---|
| State | New |
| Headers | show |
On 2 July 2014 09:02, Tom de Vries <Tom_deVries@mentor.com> wrote: > On 02-07-14 08:23, Marc Glisse wrote: >> >> In the first example you gave, looking at the pattern (no match_dup, >> setting the >> full register), it seems that it may have wanted "=&" instead of "+&". > > > [ move discussion from gcc ml to gcc-patches ml ] > > Marcus, > > The +& constraint on operand 0 of vec_unpack_trunc_<mode> seems wrong, since > the template does not use the operand as input. > > This patch fixes that. > > OK for trunk if aarch64 build & regtest succeeds ? Your patch looks fine, operand 0 isn't used for input. OK assuming no regression. Did you find this by inspection or is this the cause of some bug? /Marcus
On 03-07-14 10:20, Marcus Shawcroft wrote: > On 2 July 2014 09:02, Tom de Vries <Tom_deVries@mentor.com> wrote: >> On 02-07-14 08:23, Marc Glisse wrote: >>> >>> In the first example you gave, looking at the pattern (no match_dup, >>> setting the >>> full register), it seems that it may have wanted "=&" instead of "+&". >> >> >> [ move discussion from gcc ml to gcc-patches ml ] >> >> Marcus, >> >> The +& constraint on operand 0 of vec_unpack_trunc_<mode> seems wrong, since >> the template does not use the operand as input. >> >> This patch fixes that. >> >> OK for trunk if aarch64 build & regtest succeeds ? > > Your patch looks fine, operand 0 isn't used for input. OK assuming no > regression. Did you find this by inspection or is this the cause of > some bug? > Marcus, I found this by inspection: https://gcc.gnu.org/ml/gcc/2014-07/msg00007.html . Thanks, - Tom
On 3 July 2014 10:34, Tom de Vries <Tom_deVries@mentor.com> wrote: > On 03-07-14 10:20, Marcus Shawcroft wrote: >> >> On 2 July 2014 09:02, Tom de Vries <Tom_deVries@mentor.com> wrote: >>> >>> On 02-07-14 08:23, Marc Glisse wrote: >>>> >>>> >>>> In the first example you gave, looking at the pattern (no match_dup, >>>> setting the >>>> full register), it seems that it may have wanted "=&" instead of "+&". >>> >>> >>> >>> [ move discussion from gcc ml to gcc-patches ml ] >>> >>> Marcus, >>> >>> The +& constraint on operand 0 of vec_unpack_trunc_<mode> seems wrong, >>> since >>> the template does not use the operand as input. >>> >>> This patch fixes that. >>> >>> OK for trunk if aarch64 build & regtest succeeds ? >> >> >> Your patch looks fine, operand 0 isn't used for input. OK assuming no >> regression. Did you find this by inspection or is this the cause of >> some bug? >> > > Marcus, > > I found this by inspection: https://gcc.gnu.org/ml/gcc/2014-07/msg00007.html > . > > Thanks, > - Tom > Hi, This patch causes gcc.target/aarch64/vmlsq_laneq.c to FAIL on aarch64_be-none-elf. Christophe.
On 7 July 2014 11:29, Christophe Lyon <christophe.lyon@linaro.org> wrote: > On 3 July 2014 10:34, Tom de Vries <Tom_deVries@mentor.com> wrote: >> On 03-07-14 10:20, Marcus Shawcroft wrote: >>> >>> On 2 July 2014 09:02, Tom de Vries <Tom_deVries@mentor.com> wrote: >>>> >>>> On 02-07-14 08:23, Marc Glisse wrote: >>>>> >>>>> >>>>> In the first example you gave, looking at the pattern (no match_dup, >>>>> setting the >>>>> full register), it seems that it may have wanted "=&" instead of "+&". >>>> >>>> >>>> >>>> [ move discussion from gcc ml to gcc-patches ml ] >>>> >>>> Marcus, >>>> >>>> The +& constraint on operand 0 of vec_unpack_trunc_<mode> seems wrong, >>>> since >>>> the template does not use the operand as input. >>>> >>>> This patch fixes that. >>>> >>>> OK for trunk if aarch64 build & regtest succeeds ? >>> >>> >>> Your patch looks fine, operand 0 isn't used for input. OK assuming no >>> regression. Did you find this by inspection or is this the cause of >>> some bug? >>> >> >> Marcus, >> >> I found this by inspection: https://gcc.gnu.org/ml/gcc/2014-07/msg00007.html >> . >> >> Thanks, >> - Tom >> > > Hi, > > This patch causes gcc.target/aarch64/vmlsq_laneq.c to FAIL on > aarch64_be-none-elf. > > Christophe. ... which was fixed by James' commit 212298 Sorry for the noise Christophe.
2014-07-02 Tom de Vries <tom@codesourcery.com> * config/aarch64/aarch64-simd.md (define_insn "vec_unpack_trunc_<mode>"): Fix constraint. diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 1c32f0c..0377de4 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -1018,7 +1018,7 @@ ;; For quads. (define_insn "vec_pack_trunc_<mode>" - [(set (match_operand:<VNARROWQ2> 0 "register_operand" "+&w") + [(set (match_operand:<VNARROWQ2> 0 "register_operand" "=&w") (vec_concat:<VNARROWQ2> (truncate:<VNARROWQ> (match_operand:VQN 1 "register_operand" "w")) (truncate:<VNARROWQ> (match_operand:VQN 2 "register_operand" "w"))))] -- 1.9.1