Message ID | 1402499992-64851-20-git-send-email-leon.alrae@imgtec.com |
---|---|
State | New |
Headers | show |
On Wed, Jun 11, 2014 at 04:19:49PM +0100, Leon Alrae wrote: > From: Yongbok Kim <yongbok.kim@imgtec.com> > > Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> > Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> > --- > disas/mips.c | 2 ++ > target-mips/translate.c | 18 ++++++++++++++++-- > 2 files changed, 18 insertions(+), 2 deletions(-) > > diff --git a/disas/mips.c b/disas/mips.c > index dd2473e..e3e253f 100644 > --- a/disas/mips.c > +++ b/disas/mips.c > @@ -1313,6 +1313,8 @@ const struct mips_opcode mips_builtin_opcodes[] = > {"bgtzalc", "s,t,p", 0x1c000000, 0xffe00000, CBD|RD_s|RD_t, 0, I32R6}, > {"bltzalc", "s,t,p", 0x1c000000, 0xfc000000, CBD|RD_s|RD_t, 0, I32R6}, > {"bltuc", "s,t,p", 0x1c000000, 0xfc000000, CBD|RD_s|RD_t, 0, I32R6}, > +{"nal", "p", 0x04100000, 0xffff0000, WR_31, 0, I32R6}, > +{"bal", "p", 0x04110000, 0xffff0000, UBD|WR_31, 0, I32R6}, > {"bc1eqz", "T,p", 0x45200000, 0xffe00000, CBD|RD_T|FP_S|FP_D, 0, I32R6}, > {"bc1nez", "T,p", 0x45a00000, 0xffe00000, CBD|RD_T|FP_S|FP_D, 0, I32R6}, > {"bc2eqz", "E,p", 0x49200000, 0xffe00000, CBD|RD_C2, 0, I32R6}, > diff --git a/target-mips/translate.c b/target-mips/translate.c > index e635999..de35b77 100644 > --- a/target-mips/translate.c > +++ b/target-mips/translate.c > @@ -15809,6 +15809,9 @@ static void decode_opc_special_legacy(CPUMIPSState *env, DisasContext *ctx) > gen_muldiv(ctx, op1, 0, rs, rt); > break; > #endif > + case OPC_JR: > + gen_compute_branch(ctx, op1, 4, rs, rd, sa); > + break; > case OPC_SPIM: > #ifdef MIPS_STRICT_STANDARD > MIPS_INVAL("SPIM"); > @@ -15891,7 +15894,7 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx) > case OPC_XOR: > gen_logic(ctx, op1, rd, rs, rt); > break; > - case OPC_JR ... OPC_JALR: > + case OPC_JALR: > gen_compute_branch(ctx, op1, 4, rs, rd, sa); > break; > case OPC_TGE ... OPC_TEQ: /* Traps */ > @@ -16860,9 +16863,20 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx) > check_insn_opc_removed(ctx, ISA_MIPS32R6); > case OPC_BLTZ: > case OPC_BGEZ: > + gen_compute_branch(ctx, op1, 4, rs, -1, imm << 2); > + break; > case OPC_BLTZAL: > case OPC_BGEZAL: > - gen_compute_branch(ctx, op1, 4, rs, -1, imm << 2); > + if (ctx->insn_flags & ISA_MIPS32R6) { > + if (rs == 0) { > + /* OPC_NAL, OPC_BAL */ > + gen_compute_branch(ctx, op1, 4, 0, -1, imm << 2); > + } else { > + generate_exception(ctx, EXCP_RI); > + } > + } else { > + gen_compute_branch(ctx, op1, 4, rs, -1, imm << 2); > + } > break; > case OPC_TGEI ... OPC_TEQI: /* REGIMM traps */ > case OPC_TNEI: Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
diff --git a/disas/mips.c b/disas/mips.c index dd2473e..e3e253f 100644 --- a/disas/mips.c +++ b/disas/mips.c @@ -1313,6 +1313,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {"bgtzalc", "s,t,p", 0x1c000000, 0xffe00000, CBD|RD_s|RD_t, 0, I32R6}, {"bltzalc", "s,t,p", 0x1c000000, 0xfc000000, CBD|RD_s|RD_t, 0, I32R6}, {"bltuc", "s,t,p", 0x1c000000, 0xfc000000, CBD|RD_s|RD_t, 0, I32R6}, +{"nal", "p", 0x04100000, 0xffff0000, WR_31, 0, I32R6}, +{"bal", "p", 0x04110000, 0xffff0000, UBD|WR_31, 0, I32R6}, {"bc1eqz", "T,p", 0x45200000, 0xffe00000, CBD|RD_T|FP_S|FP_D, 0, I32R6}, {"bc1nez", "T,p", 0x45a00000, 0xffe00000, CBD|RD_T|FP_S|FP_D, 0, I32R6}, {"bc2eqz", "E,p", 0x49200000, 0xffe00000, CBD|RD_C2, 0, I32R6}, diff --git a/target-mips/translate.c b/target-mips/translate.c index e635999..de35b77 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -15809,6 +15809,9 @@ static void decode_opc_special_legacy(CPUMIPSState *env, DisasContext *ctx) gen_muldiv(ctx, op1, 0, rs, rt); break; #endif + case OPC_JR: + gen_compute_branch(ctx, op1, 4, rs, rd, sa); + break; case OPC_SPIM: #ifdef MIPS_STRICT_STANDARD MIPS_INVAL("SPIM"); @@ -15891,7 +15894,7 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx) case OPC_XOR: gen_logic(ctx, op1, rd, rs, rt); break; - case OPC_JR ... OPC_JALR: + case OPC_JALR: gen_compute_branch(ctx, op1, 4, rs, rd, sa); break; case OPC_TGE ... OPC_TEQ: /* Traps */ @@ -16860,9 +16863,20 @@ static void decode_opc (CPUMIPSState *env, DisasContext *ctx) check_insn_opc_removed(ctx, ISA_MIPS32R6); case OPC_BLTZ: case OPC_BGEZ: + gen_compute_branch(ctx, op1, 4, rs, -1, imm << 2); + break; case OPC_BLTZAL: case OPC_BGEZAL: - gen_compute_branch(ctx, op1, 4, rs, -1, imm << 2); + if (ctx->insn_flags & ISA_MIPS32R6) { + if (rs == 0) { + /* OPC_NAL, OPC_BAL */ + gen_compute_branch(ctx, op1, 4, 0, -1, imm << 2); + } else { + generate_exception(ctx, EXCP_RI); + } + } else { + gen_compute_branch(ctx, op1, 4, rs, -1, imm << 2); + } break; case OPC_TGEI ... OPC_TEQI: /* REGIMM traps */ case OPC_TNEI: