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[U-Boot] ventana: fixed comments in eeprom header

Message ID 1396501848-32593-1-git-send-email-tharvey@gateworks.com
State Accepted
Delegated to: Stefano Babic
Headers show

Commit Message

Tim Harvey April 3, 2014, 5:10 a.m. UTC 
Fix several invalid comments regarding the EEPROM structure used by Gateworks
Ventana boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 board/gateworks/gw_ventana/ventana_eeprom.h | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

Comments

Stefano Babic April 28, 2014, 8:53 a.m. UTC | #1 
Hallo Tim,

On 03/04/2014 07:10, Tim Harvey wrote:
> Fix several invalid comments regarding the EEPROM structure used by Gateworks
> Ventana boards.
> 
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
> ---

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic
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Patch

diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h
index d310bfd..434b604 100644
--- a/board/gateworks/gw_ventana/ventana_eeprom.h
+++ b/board/gateworks/gw_ventana/ventana_eeprom.h
@@ -16,16 +16,16 @@  struct ventana_board_info {
 	u8 mfgdate[4];       /* 0x20: MFG date (read only) */
 	u8 res2[7];          /* 0x24 */
 	/* sdram config */
-	u8 sdram_size;       /* 0x2B: enum (512,1024,2048) MB */
-	u8 sdram_speed;      /* 0x2C: enum (100,133,166,200,267,333,400) MHz */
-	u8 sdram_width;      /* 0x2D: enum (32,64) bit */
+	u8 sdram_size;       /* 0x2B: (16 << n) MB */
+	u8 sdram_speed;      /* 0x2C: (33.333 * n) MHz */
+	u8 sdram_width;      /* 0x2D: (8 << n) bit */
 	/* cpu config */
-	u8 cpu_speed;        /* 0x2E: enum (800,1000,1200) MHz */
-	u8 cpu_type;         /* 0x2F: enum (imx6q,imx6d,imx6dl,imx6s) */
+	u8 cpu_speed;        /* 0x2E: (33.333 * n) MHz */
+	u8 cpu_type;         /* 0x2F: 7=imx6q, 8=imx6dl */
 	u8 model[16];        /* 0x30: model string */
 	/* FLASH config */
-	u8 nand_flash_size;  /* 0x40: enum (4,8,16,32,64,128) MB */
-	u8 spi_flash_size;   /* 0x41: enum (4,8,16,32,64,128) MB */
+	u8 nand_flash_size;  /* 0x40: (8 << (n-1)) MB */
+	u8 spi_flash_size;   /* 0x41: (4 << (n-1)) MB */
 
 	/* Config1: SoC Peripherals */
 	u8 config[8];        /* 0x42: loading options */