Message ID | m3d483m53q.fsf@intrepid.localdomain |
---|---|
State | RFC, archived |
Delegated to: | David Miller |
Headers | show |
From: Krzysztof Halasa <khc@pm.waw.pl> Date: Tue, 14 Jul 2009 21:34:01 +0200 > Well, e100 driver uses streaming mapping for it's RX/TX buffers as well > as for the descriptors. Now it gets tricky - RX ring descriptors can be > written by the device at any time (when completing RX) and at the same > time the CPU has to be able to check the descriptor's status. It seems > it can't be formally done with the streaming DMA API, since it doesn't > provide invalidate and flush operations, it's rather about transfering > control. > > I guess the coherent/consistent allocations should be used for this > purpose (= uncached RAM pages on IXP4xx if I understand it correctly). > > Now that I know the inner working of DMA API the attached patch "fixes" > the e100 problems, but it still doesn't seem to be a valid use of the > API. E100's use of streaming mappings for RX descriptors is a bug, it should be using consistent mappings for sure. And it's especially buggy if it isn't doing DMA API sync calls before looking at descriptor fields, as your patch seems to cure. -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
--- a/drivers/net/e100.c +++ b/drivers/net/e100.c @@ -1762,6 +1762,9 @@ static int e100_rx_indicate(struct nic *nic, struct rx *rx, if (ioread8(&nic->csr->scb.status) & rus_no_res) nic->ru_running = RU_SUSPENDED; + pci_dma_sync_single_for_device(nic->pdev, rx->dma_addr, + sizeof(struct rfd), + PCI_DMA_BIDIRECTIONAL); return -ENODATA; }