| Message ID | 20130906035516.GS29710@iris.ozlabs.ibm.com |
|---|---|
| State | New, archived |
| Headers | show |
On 06.09.2013, at 05:55, Paul Mackerras <paulus@samba.org> wrote: > This allows us to select architecture 2.05 (POWER6) or 2.06 (POWER7) > compatibility modes on a POWER8 processor. > > Signed-off-by: Paul Mackerras <paulus@samba.org> > --- > arch/powerpc/include/asm/reg.h | 2 ++ > arch/powerpc/kvm/book3s_hv.c | 16 +++++++++++++++- > 2 files changed, 17 insertions(+), 1 deletion(-) > > diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h > index 4ca8b85..483e0a2 100644 > --- a/arch/powerpc/include/asm/reg.h > +++ b/arch/powerpc/include/asm/reg.h > @@ -315,6 +315,8 @@ > #define SPRN_PCR 0x152 /* Processor compatibility register */ > #define PCR_VEC_DIS (1ul << (63-0)) /* Vec. disable (pre POWER8) */ > #define PCR_VSX_DIS (1ul << (63-1)) /* VSX disable (pre POWER8) */ > +#define PCR_TM_DIS (1ul << (63-2)) /* Trans. memory disable (POWER8) */ Is this going to get used? Alex -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, Nov 04, 2013 at 01:53:36PM +0100, Alexander Graf wrote: > > On 06.09.2013, at 05:55, Paul Mackerras <paulus@samba.org> wrote: > > > This allows us to select architecture 2.05 (POWER6) or 2.06 (POWER7) > > compatibility modes on a POWER8 processor. > > > > Signed-off-by: Paul Mackerras <paulus@samba.org> > > --- > > arch/powerpc/include/asm/reg.h | 2 ++ > > arch/powerpc/kvm/book3s_hv.c | 16 +++++++++++++++- > > 2 files changed, 17 insertions(+), 1 deletion(-) > > > > diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h > > index 4ca8b85..483e0a2 100644 > > --- a/arch/powerpc/include/asm/reg.h > > +++ b/arch/powerpc/include/asm/reg.h > > @@ -315,6 +315,8 @@ > > #define SPRN_PCR 0x152 /* Processor compatibility register */ > > #define PCR_VEC_DIS (1ul << (63-0)) /* Vec. disable (pre POWER8) */ > > #define PCR_VSX_DIS (1ul << (63-1)) /* VSX disable (pre POWER8) */ > > +#define PCR_TM_DIS (1ul << (63-2)) /* Trans. memory disable (POWER8) */ > > Is this going to get used? Perhaps not, but I thought it worthwhile to document that the bit exists. Paul. -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Am 05.11.2013 um 04:53 schrieb Paul Mackerras <paulus@samba.org>: > On Mon, Nov 04, 2013 at 01:53:36PM +0100, Alexander Graf wrote: >> >> On 06.09.2013, at 05:55, Paul Mackerras <paulus@samba.org> wrote: >> >>> This allows us to select architecture 2.05 (POWER6) or 2.06 (POWER7) >>> compatibility modes on a POWER8 processor. >>> >>> Signed-off-by: Paul Mackerras <paulus@samba.org> >>> --- >>> arch/powerpc/include/asm/reg.h | 2 ++ >>> arch/powerpc/kvm/book3s_hv.c | 16 +++++++++++++++- >>> 2 files changed, 17 insertions(+), 1 deletion(-) >>> >>> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h >>> index 4ca8b85..483e0a2 100644 >>> --- a/arch/powerpc/include/asm/reg.h >>> +++ b/arch/powerpc/include/asm/reg.h >>> @@ -315,6 +315,8 @@ >>> #define SPRN_PCR 0x152 /* Processor compatibility register */ >>> #define PCR_VEC_DIS (1ul << (63-0)) /* Vec. disable (pre POWER8) */ >>> #define PCR_VSX_DIS (1ul << (63-1)) /* VSX disable (pre POWER8) */ >>> +#define PCR_TM_DIS (1ul << (63-2)) /* Trans. memory disable (POWER8) */ >> >> Is this going to get used? > > Perhaps not, but I thought it worthwhile to document that the bit > exists. But why not? Does that mean we allow TM to be used in p7 compat mode? Alex > > Paul. -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Tue, Nov 05, 2013 at 07:06:17AM +0100, Alexander Graf wrote: > > > Am 05.11.2013 um 04:53 schrieb Paul Mackerras <paulus@samba.org>: > > > On Mon, Nov 04, 2013 at 01:53:36PM +0100, Alexander Graf wrote: > >> > >> On 06.09.2013, at 05:55, Paul Mackerras <paulus@samba.org> wrote: > >> > >>> This allows us to select architecture 2.05 (POWER6) or 2.06 (POWER7) > >>> compatibility modes on a POWER8 processor. > >>> > >>> Signed-off-by: Paul Mackerras <paulus@samba.org> > >>> --- > >>> arch/powerpc/include/asm/reg.h | 2 ++ > >>> arch/powerpc/kvm/book3s_hv.c | 16 +++++++++++++++- > >>> 2 files changed, 17 insertions(+), 1 deletion(-) > >>> > >>> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h > >>> index 4ca8b85..483e0a2 100644 > >>> --- a/arch/powerpc/include/asm/reg.h > >>> +++ b/arch/powerpc/include/asm/reg.h > >>> @@ -315,6 +315,8 @@ > >>> #define SPRN_PCR 0x152 /* Processor compatibility register */ > >>> #define PCR_VEC_DIS (1ul << (63-0)) /* Vec. disable (pre POWER8) */ > >>> #define PCR_VSX_DIS (1ul << (63-1)) /* VSX disable (pre POWER8) */ > >>> +#define PCR_TM_DIS (1ul << (63-2)) /* Trans. memory disable (POWER8) */ > >> > >> Is this going to get used? > > > > Perhaps not, but I thought it worthwhile to document that the bit > > exists. > > But why not? Does that mean we allow TM to be used in p7 compat mode? No; TM is disabled if either or both of the PCR_TM_DIS and PCR_ARCH_206 bits are set. Paul. -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 4ca8b85..483e0a2 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -315,6 +315,8 @@ #define SPRN_PCR 0x152 /* Processor compatibility register */ #define PCR_VEC_DIS (1ul << (63-0)) /* Vec. disable (pre POWER8) */ #define PCR_VSX_DIS (1ul << (63-1)) /* VSX disable (pre POWER8) */ +#define PCR_TM_DIS (1ul << (63-2)) /* Trans. memory disable (POWER8) */ +#define PCR_ARCH_206 0x4 /* Architecture 2.06 */ #define PCR_ARCH_205 0x2 /* Architecture 2.05 */ #define SPRN_HEIR 0x153 /* Hypervisor Emulated Instruction Register */ #define SPRN_TLBINDEXR 0x154 /* P7 TLB control register */ diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c index da8619e..217041f 100644 --- a/arch/powerpc/kvm/book3s_hv.c +++ b/arch/powerpc/kvm/book3s_hv.c @@ -177,14 +177,28 @@ int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat) switch (arch_compat) { case PVR_ARCH_205: - pcr = PCR_ARCH_205; + /* + * If an arch bit is set in PCR, all the defined + * higher-order arch bits also have to be set. + */ + pcr = PCR_ARCH_206 | PCR_ARCH_205; break; case PVR_ARCH_206: case PVR_ARCH_206p: + pcr = PCR_ARCH_206; + break; + case PVR_ARCH_207: break; default: return -EINVAL; } + + if (!cpu_has_feature(CPU_FTR_ARCH_207S)) { + /* POWER7 can't emulate POWER8 */ + if (!(pcr & PCR_ARCH_206)) + return -EINVAL; + pcr &= ~PCR_ARCH_206; + } } spin_lock(&vc->lock);
This allows us to select architecture 2.05 (POWER6) or 2.06 (POWER7) compatibility modes on a POWER8 processor. Signed-off-by: Paul Mackerras <paulus@samba.org> --- arch/powerpc/include/asm/reg.h | 2 ++ arch/powerpc/kvm/book3s_hv.c | 16 +++++++++++++++- 2 files changed, 17 insertions(+), 1 deletion(-)