Message ID | 1369645193-3595-1-git-send-email-horms+renesas@verge.net.au |
---|---|
State | New |
Headers | show |
On 05/27/2013 10:59 AM, Simon Horman wrote: > From: Bastian Hecht <hechtb@gmail.com> > > We make use of the r8a7740 Suspend To Ram code to plug together a > CPUIdle driver. > > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> > Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > --- Shouldn't it go through Rafael's tree ? Or does the patch contains some dependencies on a code only visible in the ARM tree ? > arch/arm/mach-shmobile/Makefile | 2 +- > arch/arm/mach-shmobile/cpuidle-r8a7740.c | 62 +++++++++++++++++++++++++ > arch/arm/mach-shmobile/include/mach/r8a7740.h | 1 + > arch/arm/mach-shmobile/pm-r8a7740.c | 1 + > 4 files changed, 65 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/mach-shmobile/cpuidle-r8a7740.c > > diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile > index 0568894..2852dcf 100644 > --- a/arch/arm/mach-shmobile/Makefile > +++ b/arch/arm/mach-shmobile/Makefile > @@ -30,7 +30,7 @@ obj-$(CONFIG_SUSPEND) += suspend.o > obj-$(CONFIG_CPU_IDLE) += cpuidle.o > obj-$(CONFIG_ARCH_SHMOBILE) += pm-rmobile.o > obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o > -obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o sleep-r8a7740.o > +obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o sleep-r8a7740.o cpuidle-r8a7740.o > obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o > obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o > > diff --git a/arch/arm/mach-shmobile/cpuidle-r8a7740.c b/arch/arm/mach-shmobile/cpuidle-r8a7740.c > new file mode 100644 > index 0000000..48c7a6c > --- /dev/null > +++ b/arch/arm/mach-shmobile/cpuidle-r8a7740.c > @@ -0,0 +1,62 @@ > +/* > + * CPUIdle code for SoC r8a7740 > + * > + * Copyright (C) 2013 Bastian Hecht > + * > + * This file is subject to the terms and conditions of the GNU General Public > + * License. See the file "COPYING" in the main directory of this archive > + * for more details. > + */ > +#include <linux/cpuidle.h> > +#include <linux/module.h> > +#include <asm/cpuidle.h> > +#include <mach/common.h> > +#include <mach/r8a7740.h> > + > +#if defined(CONFIG_SUSPEND) && defined(CONFIG_CPU_IDLE) > +static int r8a7740_enter_a3sm_pll_on(struct cpuidle_device *dev, > + struct cpuidle_driver *drv, int index) > +{ > + r8a7740_enter_a3sm_common(1); > + return 1; > +} > + > +static int r8a7740_enter_a3sm_pll_off(struct cpuidle_device *dev, > + struct cpuidle_driver *drv, int index) > +{ > + r8a7740_enter_a3sm_common(0); > + return 2; > +} > + > +static struct cpuidle_driver r8a7740_cpuidle_driver = { > + .name = "r8a7740_cpuidle", > + .owner = THIS_MODULE, > + .en_core_tk_irqen = 1, > + .state_count = 3, > + .safe_state_index = 0, /* C1 */ > + .states[0] = ARM_CPUIDLE_WFI_STATE, > + .states[1] = { > + .name = "C2", > + .desc = "A3SM PLL ON", > + .exit_latency = 40, > + .target_residency = 30 + 40, > + .flags = CPUIDLE_FLAG_TIME_VALID, > + .enter = r8a7740_enter_a3sm_pll_on, > + }, > + .states[2] = { > + .name = "C3", > + .desc = "A3SM PLL OFF", > + .exit_latency = 120, > + .target_residency = 30 + 120, > + .flags = CPUIDLE_FLAG_TIME_VALID, > + .enter = r8a7740_enter_a3sm_pll_off, > + }, > +}; > + > +void r8a7740_cpuidle_init(void) > +{ > + shmobile_cpuidle_set_driver(&r8a7740_cpuidle_driver); > +} > +#else > +void r8a7740_cpuidle_init(void) {} > +#endif > diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h > index 5cfe5d9..3b538e3 100644 > --- a/arch/arm/mach-shmobile/include/mach/r8a7740.h > +++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h > @@ -545,6 +545,7 @@ extern void r8a7740_pinmux_init(void); > extern void r8a7740_pm_init(void); > extern void r8a7740_resume(void); > extern void r8a7740_shutdown(void); > +extern void r8a7740_cpuidle_init(void); > extern void r8a7740_enter_a3sm_common(int); > > #ifdef CONFIG_PM > diff --git a/arch/arm/mach-shmobile/pm-r8a7740.c b/arch/arm/mach-shmobile/pm-r8a7740.c > index fe3c867..2f196bd 100644 > --- a/arch/arm/mach-shmobile/pm-r8a7740.c > +++ b/arch/arm/mach-shmobile/pm-r8a7740.c > @@ -237,4 +237,5 @@ static void r8a7740_suspend_init(void) {} > void __init r8a7740_pm_init(void) > { > r8a7740_suspend_init(); > + r8a7740_cpuidle_init(); > } >
Hi, On Mon, May 27, 2013 at 05:59:45PM +0900, Simon Horman wrote: > From: Bastian Hecht <hechtb@gmail.com> > > This adds temporarily the alternative device name to the clock list > that is used when booting via Device Tree setup. > > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> > --- > arch/arm/mach-shmobile/clock-r8a7740.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c > index 5bd8da0..8fc396a 100644 > --- a/arch/arm/mach-shmobile/clock-r8a7740.c > +++ b/arch/arm/mach-shmobile/clock-r8a7740.c > @@ -582,6 +582,7 @@ static struct clk_lookup lookups[] = { > CLKDEV_DEV_ID("e6cc0000.sci", &mstp_clks[MSTP230]), > > CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), > + CLKDEV_DEV_ID("e6138010.timer", &mstp_clks[MSTP329]), > CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), > CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), > CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP320]), > -- > 1.7.10.4 > Usually this is instead handled by adding entries to OF_DEV_AUXDATA() to rename the device in the board file. Would you mind doing that instead? Thanks, -Olof
Hi, On Mon, May 27, 2013 at 05:59:47PM +0900, Simon Horman wrote: > From: Bastian Hecht <hechtb@gmail.com> > > Add clock association for i2c0 and i2c1 for the new DT names. > > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> > --- > arch/arm/mach-shmobile/clock-r8a7740.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c > index a2a612f..b12c476 100644 > --- a/arch/arm/mach-shmobile/clock-r8a7740.c > +++ b/arch/arm/mach-shmobile/clock-r8a7740.c > @@ -551,6 +551,7 @@ static struct clk_lookup lookups[] = { > CLKDEV_DEV_ID("sh_tmu.4", &mstp_clks[MSTP111]), > CLKDEV_DEV_ID("sh_tmu.5", &mstp_clks[MSTP111]), > CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), > + CLKDEV_DEV_ID("fff20000.i2c", &mstp_clks[MSTP116]), > CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), > CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), > CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), > @@ -585,6 +586,7 @@ static struct clk_lookup lookups[] = { > CLKDEV_DEV_ID("e6138010.timer", &mstp_clks[MSTP329]), > CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), > CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), > + CLKDEV_DEV_ID("e6c20000.i2c", &mstp_clks[MSTP323]), > CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP320]), > CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), > CLKDEV_DEV_ID("e6850000.sdhi", &mstp_clks[MSTP314]), > -- Same here w.r.t. OF_DEV_AUXDATA(). -Olof
Hi, On Mon, May 27, 2013 at 05:59:48PM +0900, Simon Horman wrote: > From: Bastian Hecht <hechtb@gmail.com> > > We add a variant to initalize the interrupt controller in case we describe > the GIC using the Device Tree and not platform data. > > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> > --- > arch/arm/mach-shmobile/include/mach/r8a7740.h | 1 + > arch/arm/mach-shmobile/intc-r8a7740.c | 24 ++++++++++++++++++------ > 2 files changed, 19 insertions(+), 6 deletions(-) > > diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h > index abdc4d4..19c0423 100644 > --- a/arch/arm/mach-shmobile/include/mach/r8a7740.h > +++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h > @@ -534,6 +534,7 @@ enum { > > extern void r8a7740_meram_workaround(void); > extern void r8a7740_init_irq(void); > +extern void r8a7740_init_irq_of(void); > extern void r8a7740_map_io(void); > extern void r8a7740_add_early_devices(void); > extern void r8a7740_add_standard_devices(void); This is not a comment on this patch per se, but this header file should probably be directly under the mach directory instead of under include/mach. In particular, if/when the shmobile platforms get converted to multiplatform, the header file has to move. And I see that most of these functions are only used locally in that directory anyway. It'd be nice to see some of that addressed by 3.12 or so, if you have a chance. -Olof
Hi, On Mon, May 27, 2013 at 05:59:50PM +0900, Simon Horman wrote: > From: Bastian Hecht <hechtb@gmail.com> > > We add 2 Suspend to RAM modes: > - A3SM PLL0 on/off: Power domain A3SM that contains the ARM core > and the 2nd level cache with either PLL0 on > or off > > As the suspend to memory mechanism we use A3SM PLL off. A3SM PLL on > is included here too, so CPUIdle can use both power down modes (not > included in this patch). > > The setup of the SYSC regarding the external IRQs is taken from > pm-sh7372.c from Magnus Damm. > > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> Missing S-o-b from you, Simon? > + .text > +ENTRY(v7_cpu_resume) > + bl v7_invalidate_l1 > + b cpu_resume > +ENDPROC(v7_cpu_resume) This is a global namespace so it'll conflict with i.MX whenever you multiplatform enable shmobile. Might want to pick a more unique name. -Olof
On Mon, May 27, 2013 at 01:03:31PM +0200, Daniel Lezcano wrote: > On 05/27/2013 10:59 AM, Simon Horman wrote: > > From: Bastian Hecht <hechtb@gmail.com> > > > > We make use of the r8a7740 Suspend To Ram code to plug together a > > CPUIdle driver. > > > > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> > > Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > > --- > > Shouldn't it go through Rafael's tree ? Or does the patch contains some > dependencies on a code only visible in the ARM tree ? Missing S-o-b from Simon. But this patch clearly builds on the preceding one in the series, so merging them independently might not make much sense. Getting an ack from Rafael would be nice though. I was going to say that it should probably go under drivers/cpuidle as well, but that just seems silly -- there is practically no code to share with any other platform in this small driver, AND there's not really any subsystem-internal data exposed. So it might just make more sense to keep it under arch/arm instead. Likewise, looking at the kirkwood and calxeda drivers under drivers/cpuidle, I'm wondering why we thought it was a good idea to merge them there, besides getting caught up in the "nothing can live under arch/arm any more" frenzy. -Olof
Hi Simon, On Mon, May 27, 2013 at 05:59:41PM +0900, Simon Horman wrote: > Hi Arnd, Hi Olof, > > The following changes since commit c7788792a5e7b0d5d7f96d0766b4cb6112d47d75: > > Linux 3.10-rc2 (2013-05-20 14:37:38 -0700) > > are available in the git repository at: > > git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc-r8a7740-for-v3.11 > > for you to fetch changes up to 0a9e1c1eef2b050a16685952ce20575348b94d5c: > > ARM: shmobile: clock-r8a7740: add TPU PWM support (2013-05-27 17:45:27 +0900) > > ---------------------------------------------------------------- > Renesas ARM based r8a7740 SoC updates for v3.11 > > * Clean-ups from Kuninori Morimoto, Magnus Damm and Laurent Pinchart. > * Extended clock coverage by Bastian Hecht. > * Support for initialising GIC from OF by Bastian Hecht. > * Support for reference DT initialisation by Bastian Hecht. > This is used in conjunction with other changes initialise > the Armadillo 800 eva board in DT as much as possible. > * Suspend to RAM and CPUIdle support by Bastian Hecht > * Build fix for fallout by Arnd Bergmann from suspend to RAM change. So, looking at this branch, I think you need to reorganize your patches a bit. You seem to have fallen back to the case of only sorting patches by what Renesas SoC they are for, while they are clearly of different kinds such that we would prefer to see them sorted differently for arm-soc. For example, the fix from Arnd should go in a shared shmobile fixes branch, ideally. Some of the DT initialization should maybe go in a separate (shmobile-shared) DT branch. Clock, suspend/resume and other patches can go in a shared SoC branch across all of shmobile though. Care to respin? I had a handful of comments on the patches as well, and I'll continue to look at some of the other ones. Since you'll have to respin, we might as well see the reshuffling into shared shmobile branches, so I'll drop the three merges I had already done of SoC-specific branches. I'll follow up on the ones I claimed to have merged. None had been pushed out anyway. Regards, -Olof
On Mon, May 27, 2013 at 08:50:19PM -0700, Olof Johansson wrote: > Hi, > > On Mon, May 27, 2013 at 05:59:50PM +0900, Simon Horman wrote: > > From: Bastian Hecht <hechtb@gmail.com> > > > > We add 2 Suspend to RAM modes: > > - A3SM PLL0 on/off: Power domain A3SM that contains the ARM core > > and the 2nd level cache with either PLL0 on > > or off > > > > As the suspend to memory mechanism we use A3SM PLL off. A3SM PLL on > > is included here too, so CPUIdle can use both power down modes (not > > included in this patch). > > > > The setup of the SYSC regarding the external IRQs is taken from > > pm-sh7372.c from Magnus Damm. > > > > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> > > Missing S-o-b from you, Simon? Oops sorry about that. > > + .text > > +ENTRY(v7_cpu_resume) > > + bl v7_invalidate_l1 > > + b cpu_resume > > +ENDPROC(v7_cpu_resume) > > This is a global namespace so it'll conflict with i.MX whenever > you multiplatform enable shmobile. Might want to pick a more > unique name. Bastian, could you suggest an alternate name?
On Mon, May 27, 2013 at 08:29:48PM -0700, Olof Johansson wrote: > Hi, > > On Mon, May 27, 2013 at 05:59:45PM +0900, Simon Horman wrote: > > From: Bastian Hecht <hechtb@gmail.com> > > > > This adds temporarily the alternative device name to the clock list > > that is used when booting via Device Tree setup. > > > > > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> > > --- > > arch/arm/mach-shmobile/clock-r8a7740.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c > > index 5bd8da0..8fc396a 100644 > > --- a/arch/arm/mach-shmobile/clock-r8a7740.c > > +++ b/arch/arm/mach-shmobile/clock-r8a7740.c > > @@ -582,6 +582,7 @@ static struct clk_lookup lookups[] = { > > CLKDEV_DEV_ID("e6cc0000.sci", &mstp_clks[MSTP230]), > > > > CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), > > + CLKDEV_DEV_ID("e6138010.timer", &mstp_clks[MSTP329]), > > CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), > > CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), > > CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP320]), > > -- > > 1.7.10.4 > > > > Usually this is instead handled by adding entries to OF_DEV_AUXDATA() to > rename the device in the board file. Would you mind doing that instead? Magnus has indicated in the past that he prefers this method over using OF_DEV_AUXDATA() and the above is consistent with other shmobile code.
On Mon, May 27, 2013 at 08:58:48PM -0700, Olof Johansson wrote: > Hi Simon, > > On Mon, May 27, 2013 at 05:59:41PM +0900, Simon Horman wrote: > > Hi Arnd, Hi Olof, > > > > The following changes since commit c7788792a5e7b0d5d7f96d0766b4cb6112d47d75: > > > > Linux 3.10-rc2 (2013-05-20 14:37:38 -0700) > > > > are available in the git repository at: > > > > git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-soc-r8a7740-for-v3.11 > > > > for you to fetch changes up to 0a9e1c1eef2b050a16685952ce20575348b94d5c: > > > > ARM: shmobile: clock-r8a7740: add TPU PWM support (2013-05-27 17:45:27 +0900) > > > > ---------------------------------------------------------------- > > Renesas ARM based r8a7740 SoC updates for v3.11 > > > > * Clean-ups from Kuninori Morimoto, Magnus Damm and Laurent Pinchart. > > * Extended clock coverage by Bastian Hecht. > > * Support for initialising GIC from OF by Bastian Hecht. > > * Support for reference DT initialisation by Bastian Hecht. > > This is used in conjunction with other changes initialise > > the Armadillo 800 eva board in DT as much as possible. > > * Suspend to RAM and CPUIdle support by Bastian Hecht > > * Build fix for fallout by Arnd Bergmann from suspend to RAM change. > > So, looking at this branch, I think you need to reorganize your patches a bit. > You seem to have fallen back to the case of only sorting patches by what > Renesas SoC they are for, while they are clearly of different kinds such that > we would prefer to see them sorted differently for arm-soc. > > For example, the fix from Arnd should go in a shared shmobile fixes branch, > ideally. Some of the DT initialization should maybe go in a separate > (shmobile-shared) DT branch. Clock, suspend/resume and other patches can go in > a shared SoC branch across all of shmobile though. > > Care to respin? I had a handful of comments on the patches as well, and I'll > continue to look at some of the other ones. > > Since you'll have to respin, we might as well see the reshuffling into shared > shmobile branches, so I'll drop the three merges I had already done of > SoC-specific branches. I'll follow up on the ones I claimed to have merged. > None had been pushed out anyway. Sure, I will re-spin and try to re-arange my branches as you describe above.
On 05/28/2013 05:54 AM, Olof Johansson wrote: > On Mon, May 27, 2013 at 01:03:31PM +0200, Daniel Lezcano wrote: >> On 05/27/2013 10:59 AM, Simon Horman wrote: >>> From: Bastian Hecht <hechtb@gmail.com> >>> >>> We make use of the r8a7740 Suspend To Ram code to plug together a >>> CPUIdle driver. >>> >>> Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> >>> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> >>> --- >> >> Shouldn't it go through Rafael's tree ? Or does the patch contains some >> dependencies on a code only visible in the ARM tree ? > > Missing S-o-b from Simon. But this patch clearly builds on the preceding > one in the series, so merging them independently might not make much > sense. Getting an ack from Rafael would be nice though. I was not suggesting to put the driver in the drivers/cpuidle directory but to merge the driver through Rafael's tree as we decided some weeks ago [1]. Although having the drivers all over the place does not help to consolidate the code, so moving them little by little to drivers/cpuidle makes sense but this is part of another work. > I was going to say that it should probably go under drivers/cpuidle as > well, but that just seems silly -- there is practically no code to share > with any other platform in this small driver, AND there's not really > any subsystem-internal data exposed. So it might just make more sense > to keep it under arch/arm instead. > > Likewise, looking at the kirkwood and calxeda drivers under drivers/cpuidle, > I'm wondering why we thought it was a good idea to merge them there, besides > getting caught up in the "nothing can live under arch/arm any more" frenzy. Having the drivers in the drivers/cpuidle directory like drivers/cpufreq will help to keep a consistency with the code and a single entry point for upstream and review. Thanks. -- Daniel [1] https://patchwork.kernel.org/patch/2492841/
On Tue, May 28, 2013 at 02:29:44PM +0900, Simon Horman wrote: > On Mon, May 27, 2013 at 08:29:48PM -0700, Olof Johansson wrote: > > Hi, > > > > On Mon, May 27, 2013 at 05:59:45PM +0900, Simon Horman wrote: > > > From: Bastian Hecht <hechtb@gmail.com> > > > > > > This adds temporarily the alternative device name to the clock list > > > that is used when booting via Device Tree setup. > > > > > > > > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> > > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> > > > --- > > > arch/arm/mach-shmobile/clock-r8a7740.c | 1 + > > > 1 file changed, 1 insertion(+) > > > > > > diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c > > > index 5bd8da0..8fc396a 100644 > > > --- a/arch/arm/mach-shmobile/clock-r8a7740.c > > > +++ b/arch/arm/mach-shmobile/clock-r8a7740.c > > > @@ -582,6 +582,7 @@ static struct clk_lookup lookups[] = { > > > CLKDEV_DEV_ID("e6cc0000.sci", &mstp_clks[MSTP230]), > > > > > > CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), > > > + CLKDEV_DEV_ID("e6138010.timer", &mstp_clks[MSTP329]), > > > CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), > > > CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), > > > CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP320]), > > > -- > > > 1.7.10.4 > > > > > > > Usually this is instead handled by adding entries to OF_DEV_AUXDATA() to > > rename the device in the board file. Would you mind doing that instead? > > Magnus has indicated in the past that he prefers this method over > using OF_DEV_AUXDATA() and the above is consistent with other > shmobile code. Ho hum. That's 180 degrees opposite to how we've been doing it on all other ARM platforms. :) Once you guys have clock bindings for device tree, the aliases should be possible to remove. That's where having them as auxdata is useful, since it's just one place and it's also obvious just what clocks and what drivers need aliases on device tree. Where are you guys at on your plans for getting DT_based clock going? That will sort of indicate just how temporary these clock alaises will be. I'm guessing we'll be living with them for a while though? -Olof
2013/5/28 Simon Horman <horms@verge.net.au>: > On Mon, May 27, 2013 at 08:50:19PM -0700, Olof Johansson wrote: >> Hi, >> >> On Mon, May 27, 2013 at 05:59:50PM +0900, Simon Horman wrote: >> > From: Bastian Hecht <hechtb@gmail.com> >> > >> > We add 2 Suspend to RAM modes: >> > - A3SM PLL0 on/off: Power domain A3SM that contains the ARM core >> > and the 2nd level cache with either PLL0 on >> > or off >> > >> > As the suspend to memory mechanism we use A3SM PLL off. A3SM PLL on >> > is included here too, so CPUIdle can use both power down modes (not >> > included in this patch). >> > >> > The setup of the SYSC regarding the external IRQs is taken from >> > pm-sh7372.c from Magnus Damm. >> > >> > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> >> >> Missing S-o-b from you, Simon? > > Oops sorry about that. > >> > + .text >> > +ENTRY(v7_cpu_resume) >> > + bl v7_invalidate_l1 >> > + b cpu_resume >> > +ENDPROC(v7_cpu_resume) >> >> This is a global namespace so it'll conflict with i.MX whenever >> you multiplatform enable shmobile. Might want to pick a more >> unique name. > > Bastian, could you suggest an alternate name? It should really be a temporary thing, as this should be handled in the generic ARM code. So how about: r8a7740_cpu_resume() Cheers, Bastian
Hi Olof, On Tue, May 28, 2013 at 3:22 PM, Olof Johansson <olof@lixom.net> wrote: > On Tue, May 28, 2013 at 02:29:44PM +0900, Simon Horman wrote: >> On Mon, May 27, 2013 at 08:29:48PM -0700, Olof Johansson wrote: >> > Hi, >> > >> > On Mon, May 27, 2013 at 05:59:45PM +0900, Simon Horman wrote: >> > > From: Bastian Hecht <hechtb@gmail.com> >> > > >> > > This adds temporarily the alternative device name to the clock list >> > > that is used when booting via Device Tree setup. >> > >> > > >> > > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> >> > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> >> > > --- >> > > arch/arm/mach-shmobile/clock-r8a7740.c | 1 + >> > > 1 file changed, 1 insertion(+) >> > > >> > > diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c >> > > index 5bd8da0..8fc396a 100644 >> > > --- a/arch/arm/mach-shmobile/clock-r8a7740.c >> > > +++ b/arch/arm/mach-shmobile/clock-r8a7740.c >> > > @@ -582,6 +582,7 @@ static struct clk_lookup lookups[] = { >> > > CLKDEV_DEV_ID("e6cc0000.sci", &mstp_clks[MSTP230]), >> > > >> > > CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), >> > > + CLKDEV_DEV_ID("e6138010.timer", &mstp_clks[MSTP329]), >> > > CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), >> > > CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), >> > > CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP320]), >> > > -- >> > > 1.7.10.4 >> > > >> > >> > Usually this is instead handled by adding entries to OF_DEV_AUXDATA() to >> > rename the device in the board file. Would you mind doing that instead? >> >> Magnus has indicated in the past that he prefers this method over >> using OF_DEV_AUXDATA() and the above is consistent with other >> shmobile code. > > Ho hum. That's 180 degrees opposite to how we've been doing it on all > other ARM platforms. :) Correct! =) But that is not the only thing! The mach-shmobile implementation style for DT is also different. I guess you've seen other mach-shmobile-specific oddities like the DT -reference boards in parallel with the C version, right? With mach-shmobile we have deliberately chosen to avoid AUXDATA. The reason for that is that we keep the DT version of a device clean from the beginning so it is kept totally free of platform data while in parallel we also have a regular platform device with platform data for the old legacy C version of board support. Other ARM subarchitectures seem to use DT together with platform data which is a step that we prefer to skip by using a C version and a DT version of board support in parallel. The idea is that we should be able to existing level of support in the C version while incrementally doing development on the DT -reference code. Then drop the C version when the DT version has become good enough. Current blockers are GPIO/PFC DT and common clock framework. Regarding AUXDATA, I don't really mind using it that much, except that I prefer to not use DT together with platform data. So that's what we've been doing. As for device name conversion with AUXDATA, yes, we could use that, but it turns out that if you're not using platform data then it becomes more verbose line wise compared to just popping in an additional line in the clock lookup like the patch above does. It is already abstracted per-SoC but with AUXDATA i suspect we will have to mix board specific bits with new SoC specific tables. You can probably find other instances of similar mixed DT names with regular platform device names in various clock lookup tables in mach-shmobile. Of course we will convert them over if that makes your life easier. Personally, due to limited time I'd rather work on other non-cosmetic stuff like getting rid off CONFIG_MEMORY_START and others and also fixing up 64-bit memory that seems broken in the generic ARM kernel. > Once you guys have clock bindings for device tree, the aliases should be > possible to remove. That's where having them as auxdata is useful, since it's > just one place and it's also obvious just what clocks and what drivers need > aliases on device tree. I agree that common clocks and DT bindings will make it possible for us to remove these special cases, but from my point of view it is even easier to kill off DT special case names like we already have in clock-r8axxx.c when moving to common clocks (and getting rid of that file) instead of introducing AUXDATA just to remove it soon again. > Where are you guys at on your plans for getting DT_based clock going? That will > sort of indicate just how temporary these clock alaises will be. I'm guessing > we'll be living with them for a while though? I have to deal with LPAE soon according to my todo list. After that I will make sure common clock conversion starts moving. There are many SoCs to convert, so it will have to happen gradually. I doubt we will get any code ready for merge in v3.11, getting some bits into v3.12 is probably possible. Apart from moving to common clocks and after that adding support for a single multi-subarch kernel binary, is there anything you want us to implement? Anything for v3.11? I'd like to get the memory bits sorted out if possible. Thanks for your help. Cheers, / magnus
On Friday 31 May 2013, Magnus Damm wrote: > With mach-shmobile we have deliberately chosen to avoid AUXDATA. The > reason for that is that we keep the DT version of a device clean from > the beginning so it is kept totally free of platform data while in > parallel we also have a regular platform device with platform data for > the old legacy C version of board support. Other ARM subarchitectures > seem to use DT together with platform data which is a step that we > prefer to skip by using a C version and a DT version of board support > in parallel. The idea is that we should be able to existing level of > support in the C version while incrementally doing development on the > DT -reference code. Then drop the C version when the DT version has > become good enough. Current blockers are GPIO/PFC DT and common clock > framework. I think this makes sense and you we shouldn't force you as the platform maintainer to do it the other way. Incrementally removing the auxdata and platform_data structures as most platforms do is nice in the sense that it allows you to have a fully working system booting with DT from the start and to reduce the amount of code as early as possible, and for instance this has worked rather well on kirkwood/orion/dove/mvebu. The price for that method is that you end up having to coordinate patches carefully between subsystems so you first add DT support to a driver, and then atomically change the dts file and the board file to the method. With your way, you can avoid a lot of the trouble we've seen on other platforms with complex dependency graphs or broken bisection. > > Where are you guys at on your plans for getting DT_based clock going? That will > > sort of indicate just how temporary these clock alaises will be. I'm guessing > > we'll be living with them for a while though? > > I have to deal with LPAE soon according to my todo list. After that I > will make sure common clock conversion starts moving. There are many > SoCs to convert, so it will have to happen gradually. I doubt we will > get any code ready for merge in v3.11, getting some bits into v3.12 is > probably possible. > > Apart from moving to common clocks and after that adding support for a > single multi-subarch kernel binary, is there anything you want us to > implement? Anything for v3.11? I'd like to get the memory bits sorted > out if possible. My preference would be if you can get CONFIG_MULTIPLATFORM to work on as many of your SoCs as possible, but that depends on having at least some support for COMMON_CLK. Arnd
On Fri, May 31, 2013 at 11:39:05PM +0200, Arnd Bergmann wrote: > On Friday 31 May 2013, Magnus Damm wrote: > > With mach-shmobile we have deliberately chosen to avoid AUXDATA. The > > reason for that is that we keep the DT version of a device clean from > > the beginning so it is kept totally free of platform data while in > > parallel we also have a regular platform device with platform data for > > the old legacy C version of board support. Other ARM subarchitectures > > seem to use DT together with platform data which is a step that we > > prefer to skip by using a C version and a DT version of board support > > in parallel. The idea is that we should be able to existing level of > > support in the C version while incrementally doing development on the > > DT -reference code. Then drop the C version when the DT version has > > become good enough. Current blockers are GPIO/PFC DT and common clock > > framework. > > I think this makes sense and you we shouldn't force you as the platform > maintainer to do it the other way. Incrementally removing the auxdata > and platform_data structures as most platforms do is nice in the sense > that it allows you to have a fully working system booting with DT > from the start and to reduce the amount of code as early as possible, > and for instance this has worked rather well on kirkwood/orion/dove/mvebu. > > The price for that method is that you end up having to coordinate patches > carefully between subsystems so you first add DT support to a driver, > and then atomically change the dts file and the board file to the > method. With your way, you can avoid a lot of the trouble we've seen > on other platforms with complex dependency graphs or broken > bisection. Well, or at least you have to add the auxdata table entries as you enable drivers, it doesn't have to be strictly coordinated. Anyway, that isn't really worth arguing here since it's not relevant to the shmobile case. If doing clocks this way makes more sense for you for now, you should continue with it. Sounds like people are aware of the trade-offs, etc. > > > Where are you guys at on your plans for getting DT_based clock going? That will > > > sort of indicate just how temporary these clock alaises will be. I'm guessing > > > we'll be living with them for a while though? > > > > I have to deal with LPAE soon according to my todo list. After that I > > will make sure common clock conversion starts moving. There are many > > SoCs to convert, so it will have to happen gradually. I doubt we will > > get any code ready for merge in v3.11, getting some bits into v3.12 is > > probably possible. > > > > Apart from moving to common clocks and after that adding support for a > > single multi-subarch kernel binary, is there anything you want us to > > implement? Anything for v3.11? I'd like to get the memory bits sorted > > out if possible. > > My preference would be if you can get CONFIG_MULTIPLATFORM to work on > as many of your SoCs as possible, but that depends on having at least > some support for COMMON_CLK. Yep, agreed. Thanks for the update on your plans as well, Magnus. -Olof
On Mon, May 27, 2013 at 08:50:19PM -0700, Olof Johansson wrote: > Hi, > > On Mon, May 27, 2013 at 05:59:50PM +0900, Simon Horman wrote: > > From: Bastian Hecht <hechtb@gmail.com> > > > > We add 2 Suspend to RAM modes: > > - A3SM PLL0 on/off: Power domain A3SM that contains the ARM core > > and the 2nd level cache with either PLL0 on > > or off > > > > As the suspend to memory mechanism we use A3SM PLL off. A3SM PLL on > > is included here too, so CPUIdle can use both power down modes (not > > included in this patch). > > > > The setup of the SYSC regarding the external IRQs is taken from > > pm-sh7372.c from Magnus Damm. > > > > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> > > Missing S-o-b from you, Simon? > > > + .text > > +ENTRY(v7_cpu_resume) > > + bl v7_invalidate_l1 > > + b cpu_resume > > +ENDPROC(v7_cpu_resume) > > This is a global namespace so it'll conflict with i.MX whenever > you multiplatform enable shmobile. Might want to pick a more > unique name. I have decided to drop this and related cpuidle and suspend-to-ram patches for r8a7740 after discussion with Magnus.
On Mon, May 27, 2013 at 08:54:46PM -0700, Olof Johansson wrote: > On Mon, May 27, 2013 at 01:03:31PM +0200, Daniel Lezcano wrote: > > On 05/27/2013 10:59 AM, Simon Horman wrote: > > > From: Bastian Hecht <hechtb@gmail.com> > > > > > > We make use of the r8a7740 Suspend To Ram code to plug together a > > > CPUIdle driver. > > > > > > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> > > > Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> > > > --- > > > > Shouldn't it go through Rafael's tree ? Or does the patch contains some > > dependencies on a code only visible in the ARM tree ? > > Missing S-o-b from Simon. But this patch clearly builds on the preceding > one in the series, so merging them independently might not make much > sense. Getting an ack from Rafael would be nice though. > > I was going to say that it should probably go under drivers/cpuidle as > well, but that just seems silly -- there is practically no code to share > with any other platform in this small driver, AND there's not really > any subsystem-internal data exposed. So it might just make more sense > to keep it under arch/arm instead. > > Likewise, looking at the kirkwood and calxeda drivers under drivers/cpuidle, > I'm wondering why we thought it was a good idea to merge them there, besides > getting caught up in the "nothing can live under arch/arm any more" frenzy. After discussion with Magnus I have decided to drop these changes. We can revisit them for a future release.
Hi Simon, quite some effort has gone into this patch. People from ARM Ltd. have discussed issues about the shutdown in other threads and I spent quite some time on it. What are the problems? Are we concerned about the stability of our system? The CPUIdle feature shut down my r8a7740 on the Armadillo board more than 1 million times successfully. Further CPUIdle is deselected as default config anyway. And single suspend/resume cycles should be even less problematic. Thanks, Bastian 2013/6/4 Simon Horman <horms@verge.net.au>: > On Mon, May 27, 2013 at 08:50:19PM -0700, Olof Johansson wrote: >> Hi, >> >> On Mon, May 27, 2013 at 05:59:50PM +0900, Simon Horman wrote: >> > From: Bastian Hecht <hechtb@gmail.com> >> > >> > We add 2 Suspend to RAM modes: >> > - A3SM PLL0 on/off: Power domain A3SM that contains the ARM core >> > and the 2nd level cache with either PLL0 on >> > or off >> > >> > As the suspend to memory mechanism we use A3SM PLL off. A3SM PLL on >> > is included here too, so CPUIdle can use both power down modes (not >> > included in this patch). >> > >> > The setup of the SYSC regarding the external IRQs is taken from >> > pm-sh7372.c from Magnus Damm. >> > >> > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> >> >> Missing S-o-b from you, Simon? >> >> > + .text >> > +ENTRY(v7_cpu_resume) >> > + bl v7_invalidate_l1 >> > + b cpu_resume >> > +ENDPROC(v7_cpu_resume) >> >> This is a global namespace so it'll conflict with i.MX whenever >> you multiplatform enable shmobile. Might want to pick a more >> unique name. > > I have decided to drop this and related cpuidle and suspend-to-ram > patches for r8a7740 after discussion with Magnus.
Hi Bastian, I wasn't implying that I have rejected these patches outright, I apologise if that is the way that I cam across. Rather, that they seem to need a little more work. * ARM: shmobile: r8a7740: Add CPUIdle There was some discussion in a different sub-thread that this should be Acked by Rafael and possibly go through his tree. Could you talk with Rafael about his feelings with regards to both of these. * ARM: shmobile: r8a7740: Add Suspend-To-RAM A3SM I'm unclear if this is also in Rafael's domain or not, but as it depends on the first patch it seems as well to talk post it to Rafael with the other patch for his consideration. This patch also seems to have some minor problems. 1. When you repost could you please squash in the fix provided by Arnd as "ARM: shmobile: r8a7740: Add Suspend-To-RAM A3SM". 2. As noticed by Olof, v7_cpu_resume needs a different name. I believe you have already proposed a trivial fix for this. On Tue, Jun 04, 2013 at 05:34:30PM +0200, Bastian Hecht wrote: > Hi Simon, > > quite some effort has gone into this patch. People from ARM Ltd. have > discussed issues about the shutdown in other threads and I spent quite > some time on it. What are the problems? Are we concerned about the > stability of our system? The CPUIdle feature shut down my r8a7740 on > the Armadillo board more than 1 million times successfully. Further > CPUIdle is deselected as default config anyway. And single > suspend/resume cycles should be even less problematic. > > Thanks, > > Bastian > > > 2013/6/4 Simon Horman <horms@verge.net.au>: > > On Mon, May 27, 2013 at 08:50:19PM -0700, Olof Johansson wrote: > >> Hi, > >> > >> On Mon, May 27, 2013 at 05:59:50PM +0900, Simon Horman wrote: > >> > From: Bastian Hecht <hechtb@gmail.com> > >> > > >> > We add 2 Suspend to RAM modes: > >> > - A3SM PLL0 on/off: Power domain A3SM that contains the ARM core > >> > and the 2nd level cache with either PLL0 on > >> > or off > >> > > >> > As the suspend to memory mechanism we use A3SM PLL off. A3SM PLL on > >> > is included here too, so CPUIdle can use both power down modes (not > >> > included in this patch). > >> > > >> > The setup of the SYSC regarding the external IRQs is taken from > >> > pm-sh7372.c from Magnus Damm. > >> > > >> > Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> > >> > >> Missing S-o-b from you, Simon? > >> > >> > + .text > >> > +ENTRY(v7_cpu_resume) > >> > + bl v7_invalidate_l1 > >> > + b cpu_resume > >> > +ENDPROC(v7_cpu_resume) > >> > >> This is a global namespace so it'll conflict with i.MX whenever > >> you multiplatform enable shmobile. Might want to pick a more > >> unique name. > > > > I have decided to drop this and related cpuidle and suspend-to-ram > > patches for r8a7740 after discussion with Magnus. > -- > To unsubscribe from this list: send the line "unsubscribe linux-sh" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html >