| Message ID | 1366748267-27634-1-git-send-email-benoit.thebaudeau@advansee.com |
|---|---|
| State | Awaiting Upstream |
| Delegated to: | Stefano Babic |
| Headers | show |
On Tuesday, April 23, 2013 10:17:38 PM, Benoît Thébaudeau wrote: > IIM: > - Homogenize prg_p naming (the reference manuals are not always > self-consistent > for that). > - Add missing SCSx and bank registers. > - Fix the number of banks on i.MX53. > > OCOTP: > - Rename iim to ocotp in order to avoid confusion. > - Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to > the > reference manual. > - Merge the existing spinoff gp1 fuse definition on i.MX6. > - Fix the number of banks on i.MX6. > > Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> FYI, I have build- and runtime-tested this series on i.MX25/35/51/6, and build-tested it on mpc512x. Note that the original OCOTP driver from Freescale has several bugs in the function setting the timing register: - It sets tRELAX to 15.2 ns although it should be > 16.2 ns (for 66-MHz IPG clock). - It uses DEF_RELAX instead of relax to set strobe_prog/read, i.e. it mixes ns with IPG clock cycles. The result is tPGM = 10.6 µs instead of 10 µs (but 9 µs < tPGM < 11 µs is still satisfied), and tRD = 636 ns > 36 ns. So just by chance, this does not break the hardware behavior. - It unexpectedly clears the WAIT bit-field, which has a non-zero reset value. Best regards, Benoît
On 23/04/2013 22:17, Benoît Thébaudeau wrote: > IIM: > - Homogenize prg_p naming (the reference manuals are not always self-consistent > for that). > - Add missing SCSx and bank registers. > - Fix the number of banks on i.MX53. > > OCOTP: > - Rename iim to ocotp in order to avoid confusion. > - Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to the > reference manual. > - Merge the existing spinoff gp1 fuse definition on i.MX6. > - Fix the number of banks on i.MX6. > > Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> > --- Very nice work, Benoît ! Acked-by: Stefano Babic <sbabic@denx.de> Best regards, Stefano Babic > Changes in v4: > - Convert spaces to tabs. > > Changes in v3: > - Rebase against latest u-boot-imx/master. > - Fix the number of banks on i.MX6. > - Rename iim to ocotp on i.MX6 in order to avoid confusion, and merge in the > existing gp1 fuse definition. > - Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to the > reference manual. > > Changes in v2: > - Rebase against latest master. > > arch/arm/cpu/armv7/mx6/soc.c | 4 ++-- > arch/arm/include/asm/arch-mx25/imx-regs.h | 8 ++++++-- > arch/arm/include/asm/arch-mx27/imx-regs.h | 2 +- > arch/arm/include/asm/arch-mx31/imx-regs.h | 9 +++++++-- > arch/arm/include/asm/arch-mx35/imx-regs.h | 7 ++++++- > arch/arm/include/asm/arch-mx5/imx-regs.h | 6 +++++- > arch/arm/include/asm/arch-mx6/imx-regs.h | 19 +++++++------------ > board/freescale/mx6qsabreauto/mx6qsabreauto.c | 5 ++++- > 8 files changed, 38 insertions(+), 22 deletions(-) > > diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c > index 69b8487..fc436fb 100644 > --- a/arch/arm/cpu/armv7/mx6/soc.c > +++ b/arch/arm/cpu/armv7/mx6/soc.c > @@ -172,8 +172,8 @@ void enable_caches(void) > #if defined(CONFIG_FEC_MXC) > void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) > { > - struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; > - struct fuse_bank *bank = &iim->bank[4]; > + struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; > + struct fuse_bank *bank = &ocotp->bank[4]; > struct fuse_bank4_regs *fuse = > (struct fuse_bank4_regs *)bank->fuse_regs; > > diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h b/arch/arm/include/asm/arch-mx25/imx-regs.h > index 5f4b543..99c32d4 100644 > --- a/arch/arm/include/asm/arch-mx25/imx-regs.h > +++ b/arch/arm/include/asm/arch-mx25/imx-regs.h > @@ -113,8 +113,12 @@ struct iim_regs { > u32 iim_sdat; > u32 iim_prev; > u32 iim_srev; > - u32 iim_prog_p; > - u32 res1[0x1f5]; > + u32 iim_prg_p; > + u32 iim_scs0; > + u32 iim_scs1; > + u32 iim_scs2; > + u32 iim_scs3; > + u32 res1[0x1f1]; > struct fuse_bank { > u32 fuse_regs[0x20]; > u32 fuse_rsvd[0xe0]; > diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h b/arch/arm/include/asm/arch-mx27/imx-regs.h > index 2f6c823..aee058f 100644 > --- a/arch/arm/include/asm/arch-mx27/imx-regs.h > +++ b/arch/arm/include/asm/arch-mx27/imx-regs.h > @@ -176,7 +176,7 @@ struct iim_regs { > u32 iim_sdat; > u32 iim_prev; > u32 iim_srev; > - u32 iim_prog_p; > + u32 iim_prg_p; > u32 iim_scs0; > u32 iim_scs1; > u32 iim_scs2; > diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h > index 3f58318..f67f49c 100644 > --- a/arch/arm/include/asm/arch-mx31/imx-regs.h > +++ b/arch/arm/include/asm/arch-mx31/imx-regs.h > @@ -68,7 +68,7 @@ struct cspi_regs { > u32 test; > }; > > -/* IIM Control Registers */ > +/* IIM control registers */ > struct iim_regs { > u32 iim_stat; > u32 iim_statm; > @@ -80,11 +80,16 @@ struct iim_regs { > u32 iim_sdat; > u32 iim_prev; > u32 iim_srev; > - u32 iim_prog_p; > + u32 iim_prg_p; > u32 iim_scs0; > u32 iim_scs1; > u32 iim_scs2; > u32 iim_scs3; > + u32 res[0x1f1]; > + struct fuse_bank { > + u32 fuse_regs[0x20]; > + u32 fuse_rsvd[0xe0]; > + } bank[3]; > }; > > struct iomuxc_regs { > diff --git a/arch/arm/include/asm/arch-mx35/imx-regs.h b/arch/arm/include/asm/arch-mx35/imx-regs.h > index 7f337be..64546d2 100644 > --- a/arch/arm/include/asm/arch-mx35/imx-regs.h > +++ b/arch/arm/include/asm/arch-mx35/imx-regs.h > @@ -262,11 +262,16 @@ struct iim_regs { > u32 iim_sdat; > u32 iim_prev; > u32 iim_srev; > - u32 iim_prog_p; > + u32 iim_prg_p; > u32 iim_scs0; > u32 iim_scs1; > u32 iim_scs2; > u32 iim_scs3; > + u32 res1[0x1f1]; > + struct fuse_bank { > + u32 fuse_regs[0x20]; > + u32 fuse_rsvd[0xe0]; > + } bank[3]; > }; > > /* General Purpose Timer (GPT) registers */ > diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h > index a71cc13..b237d5f 100644 > --- a/arch/arm/include/asm/arch-mx5/imx-regs.h > +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h > @@ -499,7 +499,7 @@ struct iim_regs { > u32 sdat; > u32 prev; > u32 srev; > - u32 preg_p; > + u32 prg_p; > u32 scs0; > u32 scs1; > u32 scs2; > @@ -508,7 +508,11 @@ struct iim_regs { > struct fuse_bank { > u32 fuse_regs[0x20]; > u32 fuse_rsvd[0xe0]; > +#if defined(CONFIG_MX51) > } bank[4]; > +#elif defined(CONFIG_MX53) > + } bank[5]; > +#endif > }; > > struct fuse_bank0_regs { > diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h > index 0e4d8fa..680e752 100644 > --- a/arch/arm/include/asm/arch-mx6/imx-regs.h > +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h > @@ -229,7 +229,6 @@ > > #define CHIP_REV_1_0 0x10 > #define IRAM_SIZE 0x00040000 > -#define IMX_IIM_BASE OCOTP_BASE_ADDR > #define FEC_QUIRK_ENET_MAC > > #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) > @@ -258,12 +257,6 @@ struct src { > u32 gpr10; > }; > > -/* OCOTP Registers */ > -struct ocotp_regs { > - u32 reserved[0x198]; > - u32 gp1; /* 0x660 */ > -}; > - > /* GPR3 bitfields */ > #define IOMUXC_GPR3_GPU_DBG_OFFSET 29 > #define IOMUXC_GPR3_GPU_DBG_MASK (3<<IOMUXC_GPR3_GPU_DBG_OFFSET) > @@ -438,7 +431,7 @@ struct cspi_regs { > ECSPI5_BASE_ADDR > #endif > > -struct iim_regs { > +struct ocotp_regs { > u32 ctrl; > u32 ctrl_set; > u32 ctrl_clr; > @@ -449,9 +442,9 @@ struct iim_regs { > u32 rsvd1[3]; > u32 read_ctrl; > u32 rsvd2[3]; > - u32 fuse_data; > + u32 read_fuse_data; > u32 rsvd3[3]; > - u32 sticky; > + u32 sw_sticky; > u32 rsvd4[3]; > u32 scs; > u32 scs_set; > @@ -466,7 +459,7 @@ struct iim_regs { > > struct fuse_bank { > u32 fuse_regs[0x20]; > - } bank[15]; > + } bank[16]; > }; > > struct fuse_bank4_regs { > @@ -477,7 +470,9 @@ struct fuse_bank4_regs { > u32 mac_addr_low; > u32 rsvd2[3]; > u32 mac_addr_high; > - u32 rsvd3[0x13]; > + u32 rsvd3[0xb]; > + u32 gp1; > + u32 rsvd4[7]; > }; > > struct aipstz_regs { > diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c > index aec3286..a3afa58 100644 > --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c > +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c > @@ -179,7 +179,10 @@ static int mx6sabre_rev(void) > * i.MX6Q ARD RevB: 0x02 > */ > struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; > - int reg = readl(&ocotp->gp1); > + struct fuse_bank *bank = &ocotp->bank[4]; > + struct fuse_bank4_regs *fuse = > + (struct fuse_bank4_regs *)bank->fuse_regs; > + int reg = readl(&fuse->gp1); > int ret; > > switch (reg >> 8 & 0x0F) { >
On 23/04/2013 22:17, Benoît Thébaudeau wrote: > IIM: > - Homogenize prg_p naming (the reference manuals are not always self-consistent > for that). > - Add missing SCSx and bank registers. > - Fix the number of banks on i.MX53. > > OCOTP: > - Rename iim to ocotp in order to avoid confusion. > - Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to the > reference manual. > - Merge the existing spinoff gp1 fuse definition on i.MX6. > - Fix the number of banks on i.MX6. > > Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> > --- Hi Benoît. I would like to apply your patches and I see some warning from clearpatch. Some of them are very annoying and I think to ignore them, but before doing that I ask to ML about it. It seems to me that checkpatch make stonger tests as in the past, and I do not know if all of them are meaningful. Or better, I do not think they are. Here the warnings: CHECK: Alignment should match open parenthesis #589: FILE: common/cmd_fuse.c:77: + if (argc < 2 || strtou32(argv[0], 0, &bank) || + strtou32(argv[1], 0, &word)) CHECK: Alignment should match open parenthesis #637: FILE: common/cmd_fuse.c:125: + printf("Programming bank %u word 0x%.8x to 0x%.8x...\n", + bank, word, val); I would say that this enforcement is crap. The code in the patch is easy to read. I want to ignore this warning. WARNING: quoted string split across lines #653: FILE: common/cmd_fuse.c:141: + printf("Overriding bank %u word 0x%.8x with " + "0x%.8x...\n", bank, word, val); Again, this is the solution when a line is too long. checkpatch complains if a line is too long, and in case of static string complains that is splitted. This is too much, I would like to ignore also this one. CHECK: Alignment should match open parenthesis #1102: FILE: drivers/misc/fsl_iim.c:118: + if (bank >= ARRAY_SIZE((*regs)->bank) || + word >= ARRAY_SIZE((*regs)->bank[0].word) || Ditto WARNING: line over 80 characters #1190: FILE: drivers/misc/fsl_iim.c:206: + puts("fsl_iim fuse_sense(): Explicit sense cycle did not complete\n"); Ok, this is the one that must be fixed, even if then we have the warning with "quoted string" WARNING: line over 80 characters #2017: FILE: drivers/misc/mxc_ocotp.c:8: + * http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/drivers/misc/imx_otp.c?h=imx_v2009.08_1.1.0&id=9aa74e6, Ditto CHECK: Alignment should match open parenthesis #2088: FILE: drivers/misc/mxc_ocotp.c:79: + if (bank >= ARRAY_SIZE((*regs)->bank) || + word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) >> 2 || I will not care about this. Best regards, Stefano Babic
Hi Stefano, On Friday, April 26, 2013 9:31:15 AM, Stefano Babic wrote: > On 23/04/2013 22:17, Benoît Thébaudeau wrote: > > IIM: > > - Homogenize prg_p naming (the reference manuals are not always > > self-consistent > > for that). > > - Add missing SCSx and bank registers. > > - Fix the number of banks on i.MX53. > > > > OCOTP: > > - Rename iim to ocotp in order to avoid confusion. > > - Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according > > to the > > reference manual. > > - Merge the existing spinoff gp1 fuse definition on i.MX6. > > - Fix the number of banks on i.MX6. > > > > Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> > > --- > > Hi Benoît. > > I would like to apply your patches and I see some warning from > clearpatch. Some of them are very annoying and I think to ignore them, > but before doing that I ask to ML about it. It seems to me that > checkpatch make stonger tests as in the past, and I do not know if all > of them are meaningful. Or better, I do not think they are. Indeed, I have noticed that too since last release. I ignored those on purpose because they all seem wrong. > Here the warnings: > > CHECK: Alignment should match open parenthesis > #589: FILE: common/cmd_fuse.c:77: > + if (argc < 2 || strtou32(argv[0], 0, &bank) || > + strtou32(argv[1], 0, &word)) > > CHECK: Alignment should match open parenthesis > #637: FILE: common/cmd_fuse.c:125: > + printf("Programming bank %u word 0x%.8x to 0x%.8x...\n", > + bank, word, val); > > > I would say that this enforcement is crap. The code in the patch is easy > to read. I want to ignore this warning. Yes, and that's usual Linux coding style, which is the official coding style for U-Boot as well. I'd say that the rule here should be to indent such lines at least at the position of the opening parenthesis of the previous line, and that the indentation should be at least 1 or 2 more tabs than on the previous line, which is the case in my code above. > WARNING: quoted string split across lines > #653: FILE: common/cmd_fuse.c:141: > + printf("Overriding bank %u word 0x%.8x with " > + "0x%.8x...\n", bank, word, val); > > > Again, this is the solution when a line is too long. checkpatch > complains if a line is too long, and in case of static string complains > that is splitted. This is too much, I would like to ignore also this one. Yes. The purpose of not splitting long literal strings is only grep-ability of error messages. Here, it is neither an error message nor a constant sub-string of it that is split away. > CHECK: Alignment should match open parenthesis > #1102: FILE: drivers/misc/fsl_iim.c:118: > + if (bank >= ARRAY_SIZE((*regs)->bank) || > + word >= ARRAY_SIZE((*regs)->bank[0].word) || > > Ditto > > WARNING: line over 80 characters > #1190: FILE: drivers/misc/fsl_iim.c:206: > + puts("fsl_iim fuse_sense(): Explicit sense cycle did not complete\n"); > > > Ok, this is the one that must be fixed, even if then we have the warning > with "quoted string" Initially, this line was less than 80 characters because I had split the string. But checkpatch complained about the literal string being split, so I kept it on a single line, which makes sense here for grep-ability: It is an error message, and all parts of this string are constant (i.e. not printf-ed). And Scott Wood had already made me do such changes in the past. What should I do? Would it be possible to have an official detailed coding style everybody agrees on somewhere? Apparently, the rules are not the same for all custodians. > WARNING: line over 80 characters > #2017: FILE: drivers/misc/mxc_ocotp.c:8: > + * > http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/drivers/misc/imx_otp.c?h=imx_v2009.08_1.1.0&id=9aa74e6, > > Ditto I did not know what to do with this one. As it is a URL, I considered it as unsplittable. So should the 80-character limit really apply here too? > CHECK: Alignment should match open parenthesis > #2088: FILE: drivers/misc/mxc_ocotp.c:79: > + if (bank >= ARRAY_SIZE((*regs)->bank) || > + word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) >> 2 || > > I will not care about this. OK. Best regards, Benoît
On 26/04/2013 10:03, Benoît Thébaudeau wrote: > Hi Stefano, > Hi Benoît, >> I would like to apply your patches and I see some warning from >> clearpatch. Some of them are very annoying and I think to ignore them, >> but before doing that I ask to ML about it. It seems to me that >> checkpatch make stonger tests as in the past, and I do not know if all >> of them are meaningful. Or better, I do not think they are. > > Indeed, I have noticed that too since last release. I ignored those on purpose > because they all seem wrong. Agree, some of them are non-sense >> I would say that this enforcement is crap. The code in the patch is easy >> to read. I want to ignore this warning. > > Yes, and that's usual Linux coding style, which is the official coding style for > U-Boot as well. Right. > >> CHECK: Alignment should match open parenthesis >> #1102: FILE: drivers/misc/fsl_iim.c:118: >> + if (bank >= ARRAY_SIZE((*regs)->bank) || >> + word >= ARRAY_SIZE((*regs)->bank[0].word) || >> >> Ditto >> >> WARNING: line over 80 characters >> #1190: FILE: drivers/misc/fsl_iim.c:206: >> + puts("fsl_iim fuse_sense(): Explicit sense cycle did not complete\n"); >> >> >> Ok, this is the one that must be fixed, even if then we have the warning >> with "quoted string" > > Initially, this line was less than 80 characters because I had split the string. > But checkpatch complained about the literal string being split, so I kept it on > a single line, which makes sense here for grep-ability: It is an error message, > and all parts of this string are constant (i.e. not printf-ed). And Scott Wood > had already made me do such changes in the past. What should I do? Do not change - for me it is ok, and we have explained here why we think it is right. > > Would it be possible to have an official detailed coding style everybody agrees > on somewhere? Apparently, the rules are not the same for all custodians. Really U-Boot follows the same code-styling as Linux, or it should be. checkpatch should help us to have the same rules, but apparently it does not (or not always). > >> WARNING: line over 80 characters >> #2017: FILE: drivers/misc/mxc_ocotp.c:8: >> + * >> http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/drivers/misc/imx_otp.c?h=imx_v2009.08_1.1.0&id=9aa74e6, >> >> Ditto > > I did not know what to do with this one. As it is a URL, I considered it as > unsplittable. So should the 80-character limit really apply here too? Yes, sorry, this is a URL - IMHO it is ok. Best regards, Stefano Babic
On 23/04/2013 22:17, Benoît Thébaudeau wrote: > IIM: > - Homogenize prg_p naming (the reference manuals are not always self-consistent > for that). > - Add missing SCSx and bank registers. > - Fix the number of banks on i.MX53. > > OCOTP: > - Rename iim to ocotp in order to avoid confusion. > - Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to the > reference manual. > - Merge the existing spinoff gp1 fuse definition on i.MX6. > - Fix the number of banks on i.MX6. > > Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> > --- Applied to u-boot-imx, thanks. Best regards, Stefano Babic
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 69b8487..fc436fb 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -172,8 +172,8 @@ void enable_caches(void) #if defined(CONFIG_FEC_MXC) void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) { - struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; - struct fuse_bank *bank = &iim->bank[4]; + struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; + struct fuse_bank *bank = &ocotp->bank[4]; struct fuse_bank4_regs *fuse = (struct fuse_bank4_regs *)bank->fuse_regs; diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h b/arch/arm/include/asm/arch-mx25/imx-regs.h index 5f4b543..99c32d4 100644 --- a/arch/arm/include/asm/arch-mx25/imx-regs.h +++ b/arch/arm/include/asm/arch-mx25/imx-regs.h @@ -113,8 +113,12 @@ struct iim_regs { u32 iim_sdat; u32 iim_prev; u32 iim_srev; - u32 iim_prog_p; - u32 res1[0x1f5]; + u32 iim_prg_p; + u32 iim_scs0; + u32 iim_scs1; + u32 iim_scs2; + u32 iim_scs3; + u32 res1[0x1f1]; struct fuse_bank { u32 fuse_regs[0x20]; u32 fuse_rsvd[0xe0]; diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h b/arch/arm/include/asm/arch-mx27/imx-regs.h index 2f6c823..aee058f 100644 --- a/arch/arm/include/asm/arch-mx27/imx-regs.h +++ b/arch/arm/include/asm/arch-mx27/imx-regs.h @@ -176,7 +176,7 @@ struct iim_regs { u32 iim_sdat; u32 iim_prev; u32 iim_srev; - u32 iim_prog_p; + u32 iim_prg_p; u32 iim_scs0; u32 iim_scs1; u32 iim_scs2; diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h index 3f58318..f67f49c 100644 --- a/arch/arm/include/asm/arch-mx31/imx-regs.h +++ b/arch/arm/include/asm/arch-mx31/imx-regs.h @@ -68,7 +68,7 @@ struct cspi_regs { u32 test; }; -/* IIM Control Registers */ +/* IIM control registers */ struct iim_regs { u32 iim_stat; u32 iim_statm; @@ -80,11 +80,16 @@ struct iim_regs { u32 iim_sdat; u32 iim_prev; u32 iim_srev; - u32 iim_prog_p; + u32 iim_prg_p; u32 iim_scs0; u32 iim_scs1; u32 iim_scs2; u32 iim_scs3; + u32 res[0x1f1]; + struct fuse_bank { + u32 fuse_regs[0x20]; + u32 fuse_rsvd[0xe0]; + } bank[3]; }; struct iomuxc_regs { diff --git a/arch/arm/include/asm/arch-mx35/imx-regs.h b/arch/arm/include/asm/arch-mx35/imx-regs.h index 7f337be..64546d2 100644 --- a/arch/arm/include/asm/arch-mx35/imx-regs.h +++ b/arch/arm/include/asm/arch-mx35/imx-regs.h @@ -262,11 +262,16 @@ struct iim_regs { u32 iim_sdat; u32 iim_prev; u32 iim_srev; - u32 iim_prog_p; + u32 iim_prg_p; u32 iim_scs0; u32 iim_scs1; u32 iim_scs2; u32 iim_scs3; + u32 res1[0x1f1]; + struct fuse_bank { + u32 fuse_regs[0x20]; + u32 fuse_rsvd[0xe0]; + } bank[3]; }; /* General Purpose Timer (GPT) registers */ diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h index a71cc13..b237d5f 100644 --- a/arch/arm/include/asm/arch-mx5/imx-regs.h +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -499,7 +499,7 @@ struct iim_regs { u32 sdat; u32 prev; u32 srev; - u32 preg_p; + u32 prg_p; u32 scs0; u32 scs1; u32 scs2; @@ -508,7 +508,11 @@ struct iim_regs { struct fuse_bank { u32 fuse_regs[0x20]; u32 fuse_rsvd[0xe0]; +#if defined(CONFIG_MX51) } bank[4]; +#elif defined(CONFIG_MX53) + } bank[5]; +#endif }; struct fuse_bank0_regs { diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 0e4d8fa..680e752 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -229,7 +229,6 @@ #define CHIP_REV_1_0 0x10 #define IRAM_SIZE 0x00040000 -#define IMX_IIM_BASE OCOTP_BASE_ADDR #define FEC_QUIRK_ENET_MAC #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) @@ -258,12 +257,6 @@ struct src { u32 gpr10; }; -/* OCOTP Registers */ -struct ocotp_regs { - u32 reserved[0x198]; - u32 gp1; /* 0x660 */ -}; - /* GPR3 bitfields */ #define IOMUXC_GPR3_GPU_DBG_OFFSET 29 #define IOMUXC_GPR3_GPU_DBG_MASK (3<<IOMUXC_GPR3_GPU_DBG_OFFSET) @@ -438,7 +431,7 @@ struct cspi_regs { ECSPI5_BASE_ADDR #endif -struct iim_regs { +struct ocotp_regs { u32 ctrl; u32 ctrl_set; u32 ctrl_clr; @@ -449,9 +442,9 @@ struct iim_regs { u32 rsvd1[3]; u32 read_ctrl; u32 rsvd2[3]; - u32 fuse_data; + u32 read_fuse_data; u32 rsvd3[3]; - u32 sticky; + u32 sw_sticky; u32 rsvd4[3]; u32 scs; u32 scs_set; @@ -466,7 +459,7 @@ struct iim_regs { struct fuse_bank { u32 fuse_regs[0x20]; - } bank[15]; + } bank[16]; }; struct fuse_bank4_regs { @@ -477,7 +470,9 @@ struct fuse_bank4_regs { u32 mac_addr_low; u32 rsvd2[3]; u32 mac_addr_high; - u32 rsvd3[0x13]; + u32 rsvd3[0xb]; + u32 gp1; + u32 rsvd4[7]; }; struct aipstz_regs { diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index aec3286..a3afa58 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -179,7 +179,10 @@ static int mx6sabre_rev(void) * i.MX6Q ARD RevB: 0x02 */ struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; - int reg = readl(&ocotp->gp1); + struct fuse_bank *bank = &ocotp->bank[4]; + struct fuse_bank4_regs *fuse = + (struct fuse_bank4_regs *)bank->fuse_regs; + int reg = readl(&fuse->gp1); int ret; switch (reg >> 8 & 0x0F) {
IIM: - Homogenize prg_p naming (the reference manuals are not always self-consistent for that). - Add missing SCSx and bank registers. - Fix the number of banks on i.MX53. OCOTP: - Rename iim to ocotp in order to avoid confusion. - Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to the reference manual. - Merge the existing spinoff gp1 fuse definition on i.MX6. - Fix the number of banks on i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> --- Changes in v4: - Convert spaces to tabs. Changes in v3: - Rebase against latest u-boot-imx/master. - Fix the number of banks on i.MX6. - Rename iim to ocotp on i.MX6 in order to avoid confusion, and merge in the existing gp1 fuse definition. - Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to the reference manual. Changes in v2: - Rebase against latest master. arch/arm/cpu/armv7/mx6/soc.c | 4 ++-- arch/arm/include/asm/arch-mx25/imx-regs.h | 8 ++++++-- arch/arm/include/asm/arch-mx27/imx-regs.h | 2 +- arch/arm/include/asm/arch-mx31/imx-regs.h | 9 +++++++-- arch/arm/include/asm/arch-mx35/imx-regs.h | 7 ++++++- arch/arm/include/asm/arch-mx5/imx-regs.h | 6 +++++- arch/arm/include/asm/arch-mx6/imx-regs.h | 19 +++++++------------ board/freescale/mx6qsabreauto/mx6qsabreauto.c | 5 ++++- 8 files changed, 38 insertions(+), 22 deletions(-)