Message ID | 1353586067-9989-1-git-send-email-lee.jones@linaro.org |
---|---|
State | New |
Headers | show |
I assume you're working with an old kernel... this has already been fixed. On Thu, Nov 22, 2012 at 12:07:47PM +0000, Lee Jones wrote: > Introduced by: > 07bd005ed2457876f653fda12981708d737543df > ARM: 7547/1: cache-l2x0: add support for Aurora L2 cache ctrl > > arch/arm/mm/cache-l2x0.c:37:12: warning: ‘l2_wt_override’ defined but not used > arch/arm/mm/cache-l2x0.c:292:22: warning: ‘calc_range_end’ defined but not used > arch/arm/mm/cache-l2x0.c:315:13: warning: ‘aurora_pa_range’ defined but not used > arch/arm/mm/cache-l2x0.c:328:13: warning: ‘aurora_inv_range’ defined but not used > arch/arm/mm/cache-l2x0.c:347:13: warning: ‘aurora_clean_range’ defined but not used > arch/arm/mm/cache-l2x0.c:365:13: warning: ‘aurora_flush_range’ defined but not used > > Cc: Russell King <linux@arm.linux.org.uk> > Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> > Signed-off-by: Lee Jones <lee.jones@linaro.org> > --- > arch/arm/mm/cache-l2x0.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c > index bfb5986..25a9226 100644 > --- a/arch/arm/mm/cache-l2x0.c > +++ b/arch/arm/mm/cache-l2x0.c > @@ -34,7 +34,6 @@ static DEFINE_RAW_SPINLOCK(l2x0_lock); > static u32 l2x0_way_mask; /* Bitmask of active ways */ > static u32 l2x0_size; > static unsigned long sync_reg_offset = L2X0_CACHE_SYNC; > -static int l2_wt_override; > > /* Aurora don't have the cache ID register available, so we have to > * pass it though the device tree */ > @@ -284,6 +283,10 @@ static void l2x0_flush_range(unsigned long start, unsigned long end) > raw_spin_unlock_irqrestore(&l2x0_lock, flags); > } > > +#ifdef CONFIG_OF > + > +static int l2_wt_override; > + > /* > * Note that the end addresses passed to Linux primitives are > * noninclusive, while the hardware cache range operations use > @@ -375,6 +378,7 @@ static void aurora_flush_range(unsigned long start, unsigned long end) > } > } > } > +#endif > > static void l2x0_disable(void) > { > -- > 1.7.9.5 >
On Thu, 22 Nov 2012, Russell King - ARM Linux wrote: > I assume you're working with an old kernel... this has already been > fixed. If by 'old' you mean a few -rc's, then yes. I've rebased and the issue has gone away, thanks.
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index bfb5986..25a9226 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -34,7 +34,6 @@ static DEFINE_RAW_SPINLOCK(l2x0_lock); static u32 l2x0_way_mask; /* Bitmask of active ways */ static u32 l2x0_size; static unsigned long sync_reg_offset = L2X0_CACHE_SYNC; -static int l2_wt_override; /* Aurora don't have the cache ID register available, so we have to * pass it though the device tree */ @@ -284,6 +283,10 @@ static void l2x0_flush_range(unsigned long start, unsigned long end) raw_spin_unlock_irqrestore(&l2x0_lock, flags); } +#ifdef CONFIG_OF + +static int l2_wt_override; + /* * Note that the end addresses passed to Linux primitives are * noninclusive, while the hardware cache range operations use @@ -375,6 +378,7 @@ static void aurora_flush_range(unsigned long start, unsigned long end) } } } +#endif static void l2x0_disable(void) {
Introduced by: 07bd005ed2457876f653fda12981708d737543df ARM: 7547/1: cache-l2x0: add support for Aurora L2 cache ctrl arch/arm/mm/cache-l2x0.c:37:12: warning: ‘l2_wt_override’ defined but not used arch/arm/mm/cache-l2x0.c:292:22: warning: ‘calc_range_end’ defined but not used arch/arm/mm/cache-l2x0.c:315:13: warning: ‘aurora_pa_range’ defined but not used arch/arm/mm/cache-l2x0.c:328:13: warning: ‘aurora_inv_range’ defined but not used arch/arm/mm/cache-l2x0.c:347:13: warning: ‘aurora_clean_range’ defined but not used arch/arm/mm/cache-l2x0.c:365:13: warning: ‘aurora_flush_range’ defined but not used Cc: Russell King <linux@arm.linux.org.uk> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> --- arch/arm/mm/cache-l2x0.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)