diff mbox

[U-Boot,RFC,09/17] spl/85xx: new SPL support

Message ID 1348272087-29608-10-git-send-email-scottwood@freescale.com
State RFC
Headers show

Commit Message

Scott Wood Sept. 22, 2012, 12:01 a.m. UTC
Update CONFIG_RAMBOOT and CONFIG_NAND_SPL references to accept CONFIG_SPL
and CONFIG_SPL_BUILD, respectively.  CONFIG_NAND_SPL can be removed once
the last mpc85xx nand_spl target is gone.

CONFIG_RAMBOOT will need to remain for other use cases, but it doesn't
seem right to overload it for meaning SPL as well as nand_spl does.  Even
if it's somewhat appropriate for the main u-boot, the SPL itself isn't
(necessarily) ramboot, and we don't have separate configs for SPL and
main u-boot.  It was also inconsistent, as other platforms such as
mpc83xx didn't use CONFIG_RAMBOOT in this way.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@gmail.com>
---
 arch/powerpc/cpu/mpc85xx/cpu.c           |    3 +-
 arch/powerpc/cpu/mpc85xx/cpu_init_nand.c |    2 +-
 arch/powerpc/cpu/mpc85xx/tlb.c           |    4 +-
 arch/powerpc/cpu/mpc85xx/u-boot-spl.lds  |   81 ++++++++++++++++++++++++++++++
 arch/powerpc/cpu/mpc8xxx/law.c           |   11 ++--
 doc/README.mpc85xx                       |    2 +-
 6 files changed, 93 insertions(+), 10 deletions(-)
 create mode 100644 arch/powerpc/cpu/mpc85xx/u-boot-spl.lds

Comments

Tom Rini Sept. 24, 2012, 11:51 p.m. UTC | #1
On Fri, Sep 21, 2012 at 07:01:19PM -0500, Scott Wood wrote:

> Update CONFIG_RAMBOOT and CONFIG_NAND_SPL references to accept CONFIG_SPL
> and CONFIG_SPL_BUILD, respectively.  CONFIG_NAND_SPL can be removed once
> the last mpc85xx nand_spl target is gone.
> 
> CONFIG_RAMBOOT will need to remain for other use cases, but it doesn't
> seem right to overload it for meaning SPL as well as nand_spl does.  Even
> if it's somewhat appropriate for the main u-boot, the SPL itself isn't
> (necessarily) ramboot, and we don't have separate configs for SPL and
> main u-boot.  It was also inconsistent, as other platforms such as
> mpc83xx didn't use CONFIG_RAMBOOT in this way.
> 
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> Cc: Andy Fleming <afleming@gmail.com>
[snip]
> diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
> new file mode 100644
> index 0000000..372195d
> --- /dev/null
> +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
> @@ -0,0 +1,81 @@
[snip]
> +OUTPUT_ARCH(powerpc)
> +SECTIONS

Can we add MEMORY declarations like (some) of the ARM linker scripts do
so when we grow beyond the max size it's a link error?
Scott Wood Sept. 24, 2012, 11:54 p.m. UTC | #2
On 09/24/2012 06:51:40 PM, Tom Rini wrote:
> On Fri, Sep 21, 2012 at 07:01:19PM -0500, Scott Wood wrote:
> 
> > Update CONFIG_RAMBOOT and CONFIG_NAND_SPL references to accept  
> CONFIG_SPL
> > and CONFIG_SPL_BUILD, respectively.  CONFIG_NAND_SPL can be removed  
> once
> > the last mpc85xx nand_spl target is gone.
> >
> > CONFIG_RAMBOOT will need to remain for other use cases, but it  
> doesn't
> > seem right to overload it for meaning SPL as well as nand_spl  
> does.  Even
> > if it's somewhat appropriate for the main u-boot, the SPL itself  
> isn't
> > (necessarily) ramboot, and we don't have separate configs for SPL  
> and
> > main u-boot.  It was also inconsistent, as other platforms such as
> > mpc83xx didn't use CONFIG_RAMBOOT in this way.
> >
> > Signed-off-by: Scott Wood <scottwood@freescale.com>
> > Cc: Andy Fleming <afleming@gmail.com>
> [snip]
> > diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds  
> b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
> > new file mode 100644
> > index 0000000..372195d
> > --- /dev/null
> > +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
> > @@ -0,0 +1,81 @@
> [snip]
> > +OUTPUT_ARCH(powerpc)
> > +SECTIONS
> 
> Can we add MEMORY declarations like (some) of the ARM linker scripts  
> do
> so when we grow beyond the max size it's a link error?

It's already a linker error, because you get an overlap with the reset  
vector.

-Scott
Tom Rini Sept. 25, 2012, 12:04 a.m. UTC | #3
On Mon, Sep 24, 2012 at 06:54:24PM -0500, Scott Wood wrote:
> On 09/24/2012 06:51:40 PM, Tom Rini wrote:
> >On Fri, Sep 21, 2012 at 07:01:19PM -0500, Scott Wood wrote:
> >
> >> Update CONFIG_RAMBOOT and CONFIG_NAND_SPL references to accept
> >CONFIG_SPL
> >> and CONFIG_SPL_BUILD, respectively.  CONFIG_NAND_SPL can be
> >removed once
> >> the last mpc85xx nand_spl target is gone.
> >>
> >> CONFIG_RAMBOOT will need to remain for other use cases, but it
> >doesn't
> >> seem right to overload it for meaning SPL as well as nand_spl
> >does.  Even
> >> if it's somewhat appropriate for the main u-boot, the SPL itself
> >isn't
> >> (necessarily) ramboot, and we don't have separate configs for
> >SPL and
> >> main u-boot.  It was also inconsistent, as other platforms such as
> >> mpc83xx didn't use CONFIG_RAMBOOT in this way.
> >>
> >> Signed-off-by: Scott Wood <scottwood@freescale.com>
> >> Cc: Andy Fleming <afleming@gmail.com>
> >[snip]
> >> diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
> >b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
> >> new file mode 100644
> >> index 0000000..372195d
> >> --- /dev/null
> >> +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
> >> @@ -0,0 +1,81 @@
> >[snip]
> >> +OUTPUT_ARCH(powerpc)
> >> +SECTIONS
> >
> >Can we add MEMORY declarations like (some) of the ARM linker
> >scripts do
> >so when we grow beyond the max size it's a link error?
> 
> It's already a linker error, because you get an overlap with the
> reset vector.

OK.  Then you can drop the CONFIG_SPL_MAX_SIZE you have later on since
that's where we check against it.  Or did I miss a user of it in the
series?
Scott Wood Sept. 25, 2012, 12:08 a.m. UTC | #4
On 09/24/2012 07:04:44 PM, Tom Rini wrote:
> On Mon, Sep 24, 2012 at 06:54:24PM -0500, Scott Wood wrote:
> > On 09/24/2012 06:51:40 PM, Tom Rini wrote:
> > >On Fri, Sep 21, 2012 at 07:01:19PM -0500, Scott Wood wrote:
> > >
> > >> Update CONFIG_RAMBOOT and CONFIG_NAND_SPL references to accept
> > >CONFIG_SPL
> > >> and CONFIG_SPL_BUILD, respectively.  CONFIG_NAND_SPL can be
> > >removed once
> > >> the last mpc85xx nand_spl target is gone.
> > >>
> > >> CONFIG_RAMBOOT will need to remain for other use cases, but it
> > >doesn't
> > >> seem right to overload it for meaning SPL as well as nand_spl
> > >does.  Even
> > >> if it's somewhat appropriate for the main u-boot, the SPL itself
> > >isn't
> > >> (necessarily) ramboot, and we don't have separate configs for
> > >SPL and
> > >> main u-boot.  It was also inconsistent, as other platforms such  
> as
> > >> mpc83xx didn't use CONFIG_RAMBOOT in this way.
> > >>
> > >> Signed-off-by: Scott Wood <scottwood@freescale.com>
> > >> Cc: Andy Fleming <afleming@gmail.com>
> > >[snip]
> > >> diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
> > >b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
> > >> new file mode 100644
> > >> index 0000000..372195d
> > >> --- /dev/null
> > >> +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
> > >> @@ -0,0 +1,81 @@
> > >[snip]
> > >> +OUTPUT_ARCH(powerpc)
> > >> +SECTIONS
> > >
> > >Can we add MEMORY declarations like (some) of the ARM linker
> > >scripts do
> > >so when we grow beyond the max size it's a link error?
> >
> > It's already a linker error, because you get an overlap with the
> > reset vector.
> 
> OK.  Then you can drop the CONFIG_SPL_MAX_SIZE you have later on since
> that's where we check against it.  Or did I miss a user of it in the
> series?

It's used by the definition of CONFIG_SYS_NAND_U_BOOT_SIZE/DST within  
that same patch.  Plus it's nice to document somewhere prominent, and  
to conform to standard SPL symbols.

-Scott
Tom Rini Sept. 25, 2012, 12:13 a.m. UTC | #5
On Mon, Sep 24, 2012 at 07:08:35PM -0500, Scott Wood wrote:
> On 09/24/2012 07:04:44 PM, Tom Rini wrote:
> >On Mon, Sep 24, 2012 at 06:54:24PM -0500, Scott Wood wrote:
> >> On 09/24/2012 06:51:40 PM, Tom Rini wrote:
> >> >On Fri, Sep 21, 2012 at 07:01:19PM -0500, Scott Wood wrote:
> >> >
> >> >> Update CONFIG_RAMBOOT and CONFIG_NAND_SPL references to accept
> >> >CONFIG_SPL
> >> >> and CONFIG_SPL_BUILD, respectively.  CONFIG_NAND_SPL can be
> >> >removed once
> >> >> the last mpc85xx nand_spl target is gone.
> >> >>
> >> >> CONFIG_RAMBOOT will need to remain for other use cases, but it
> >> >doesn't
> >> >> seem right to overload it for meaning SPL as well as nand_spl
> >> >does.  Even
> >> >> if it's somewhat appropriate for the main u-boot, the SPL itself
> >> >isn't
> >> >> (necessarily) ramboot, and we don't have separate configs for
> >> >SPL and
> >> >> main u-boot.  It was also inconsistent, as other platforms
> >such as
> >> >> mpc83xx didn't use CONFIG_RAMBOOT in this way.
> >> >>
> >> >> Signed-off-by: Scott Wood <scottwood@freescale.com>
> >> >> Cc: Andy Fleming <afleming@gmail.com>
> >> >[snip]
> >> >> diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
> >> >b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
> >> >> new file mode 100644
> >> >> index 0000000..372195d
> >> >> --- /dev/null
> >> >> +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
> >> >> @@ -0,0 +1,81 @@
> >> >[snip]
> >> >> +OUTPUT_ARCH(powerpc)
> >> >> +SECTIONS
> >> >
> >> >Can we add MEMORY declarations like (some) of the ARM linker
> >> >scripts do
> >> >so when we grow beyond the max size it's a link error?
> >>
> >> It's already a linker error, because you get an overlap with the
> >> reset vector.
> >
> >OK.  Then you can drop the CONFIG_SPL_MAX_SIZE you have later on since
> >that's where we check against it.  Or did I miss a user of it in the
> >series?
> 
> It's used by the definition of CONFIG_SYS_NAND_U_BOOT_SIZE/DST
> within that same patch.  Plus it's nice to document somewhere
> prominent, and to conform to standard SPL symbols.

OK, just read that part too quick then, thanks for the explanation.
diff mbox

Patch

diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 5ddb294..38ff1f2 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -310,7 +310,8 @@  void mpc85xx_reginfo(void)
 
 /* Common ddr init for non-corenet fsl 85xx platforms */
 #ifndef CONFIG_FSL_CORENET
-#if defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SYS_INIT_L2_ADDR)
+#if (defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL)) && \
+	!defined(CONFIG_SYS_INIT_L2_ADDR)
 phys_size_t initdram(int board_type)
 {
 #if defined(CONFIG_SPD_EEPROM) || defined(CONFIG_DDR_SPD)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c b/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c
index 0589497..c6b9cd0 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c
@@ -30,7 +30,7 @@  DECLARE_GLOBAL_DATA_PTR;
 
 void cpu_init_f(void)
 {
-#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR)
+#ifdef CONFIG_SYS_INIT_L2_ADDR
 	ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
 
 	out_be32(&l2cache->l2srbar0, CONFIG_SYS_INIT_L2_ADDR);
diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c
index 929f6a6..2dcd8cc 100644
--- a/arch/powerpc/cpu/mpc85xx/tlb.c
+++ b/arch/powerpc/cpu/mpc85xx/tlb.c
@@ -55,7 +55,7 @@  void init_tlbs(void)
 	return ;
 }
 
-#ifndef CONFIG_NAND_SPL
+#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
 void read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, unsigned long *epn,
 		       phys_addr_t *rpn)
 {
@@ -332,4 +332,4 @@  void clear_ddr_tlbs(unsigned int memsize_in_meg)
 }
 
 
-#endif /* !CONFIG_NAND_SPL */
+#endif /* not SPL */
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
new file mode 100644
index 0000000..372195d
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
@@ -0,0 +1,81 @@ 
+/*
+ * (C) Copyright 2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de
+ *
+ * Copyright 2009 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include "config.h"	/* CONFIG_BOARDDIR */
+
+OUTPUT_ARCH(powerpc)
+SECTIONS
+{
+	. = CONFIG_SPL_TEXT_BASE;
+	.text : {
+		*(.text*)
+	}
+	_etext = .;
+
+	.reloc : {
+		_GOT2_TABLE_ = .;
+		KEEP(*(.got2))
+		KEEP(*(.got))
+		PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
+		_FIXUP_TABLE_ = .;
+		KEEP(*(.fixup))
+	}
+	__got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
+	__fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+	. = ALIGN(8);
+	.data : {
+		*(.rodata*)
+		*(.data*)
+		*(.sdata*)
+	}
+	_edata  =  .;
+
+	. = ALIGN(8);
+	__init_begin = .;
+	__init_end = .;
+/* FIXME for non-NAND SPL */
+#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
+	.bootpg ADDR(.text) + 0x1000 :
+	{
+		start.o	(.bootpg)
+	}
+#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
+#elif defined(CONFIG_FSL_ELBC)
+#define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */
+#else
+#error unknown NAND controller
+#endif
+	.resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
+		KEEP(*(.resetvec))
+	} = 0xffff
+
+	__bss_start = .;
+	.bss : {
+		*(.sbss*)
+		*(.bss*)
+	}
+	__bss_end__ = .;
+}
diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c
index 223cd5d..ce1d71e 100644
--- a/arch/powerpc/cpu/mpc8xxx/law.c
+++ b/arch/powerpc/cpu/mpc8xxx/law.c
@@ -92,7 +92,7 @@  void disable_law(u8 idx)
 	return;
 }
 
-#ifndef CONFIG_NAND_SPL
+#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
 static int get_law_entry(u8 i, struct law_entry *e)
 {
 	u32 lawar;
@@ -122,7 +122,7 @@  int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
 	return idx;
 }
 
-#ifndef CONFIG_NAND_SPL
+#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD)
 int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
 {
 	u32 idx;
@@ -233,7 +233,7 @@  int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
 
 	return 0;
 }
-#endif
+#endif /* not SPL */
 
 void init_laws(void)
 {
@@ -258,9 +258,10 @@  void init_laws(void)
 			gd->used_laws |= (1 << i);
 	}
 
-#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
+#if (defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)) || \
+	(defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD))
 	/*
-	 * in NAND boot we've already parsed the law_table and setup those LAWs
+	 * in SPL boot we've already parsed the law_table and setup those LAWs
 	 * so don't do it again.
 	 */
 	return;
diff --git a/doc/README.mpc85xx b/doc/README.mpc85xx
index 5a4b591..f9b023f 100644
--- a/doc/README.mpc85xx
+++ b/doc/README.mpc85xx
@@ -26,7 +26,7 @@  Major Config Switches during various boot Modes
 ----------------------------------------------
 
 NOR boot
-		!defined(CONFIG_SYS_RAMBOOT)
+		!defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SPL)
 NOR boot Secure
 		!defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SECURE_BOOT)
 RAMBOOT(SD, SPI & NAND boot)