diff mbox

[U-Boot,04/24] mxc_i2c: clear i2sr before waiting for bit

Message ID 1340338339-11626-4-git-send-email-troy.kisky@boundarydevices.com
State Superseded
Delegated to: Heiko Schocher
Headers show

Commit Message

Troy Kisky June 22, 2012, 4:11 a.m. UTC
Let's clear the sr register before waiting for
bit to be set, instead of clearing it after
hardware sets it. No real operational difference here,
but allows combining of i2c_imx_trx_complete and
i2c_imx_bus_busy in later patches.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
 drivers/i2c/mxc_i2c.c |    5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

Comments

Marek Vasut June 22, 2012, 4:59 p.m. UTC | #1
Dear Troy Kisky,

> Let's clear the sr register before waiting for
> bit to be set, instead of clearing it after
> hardware sets it. No real operational difference here,
> but allows combining of i2c_imx_trx_complete and
> i2c_imx_bus_busy in later patches.
> 
> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
> ---
>  drivers/i2c/mxc_i2c.c |    5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
> index 0fd508a..bae9335 100644
> --- a/drivers/i2c/mxc_i2c.c
> +++ b/drivers/i2c/mxc_i2c.c
> @@ -200,10 +200,8 @@ int i2c_imx_trx_complete(void)
>  	int timeout = I2C_MAX_TIMEOUT;
> 
>  	while (timeout--) {
> -		if (readb(&i2c_regs->i2sr) & I2SR_IIF) {
> -			writeb(0, &i2c_regs->i2sr);
> +		if (readb(&i2c_regs->i2sr) & I2SR_IIF)
>  			return 0;
> -		}
> 
>  		udelay(1);
>  	}
> @@ -215,6 +213,7 @@ static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8
> byte) {
>  	unsigned ret;
> 
> +	writeb(0, &i2c_regs->i2sr);
>  	writeb(byte, &i2c_regs->i2dr);
>  	ret = i2c_imx_trx_complete();
>  	if (ret < 0)

If you could try this on mx51 and mx31, I'd be glad. I recall having some issues 
there.

If it works, add
Acked-by: Marek Vasut <marex@denx.de>

Best regards,
Marek Vasut
Troy Kisky June 24, 2012, 12:18 a.m. UTC | #2
On 6/22/2012 9:59 AM, Marek Vasut wrote:
> Dear Troy Kisky,
>
>> Let's clear the sr register before waiting for
>> bit to be set, instead of clearing it after
>> hardware sets it. No real operational difference here,
>> but allows combining of i2c_imx_trx_complete and
>> i2c_imx_bus_busy in later patches.
>>
>> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
>> ---
>>   drivers/i2c/mxc_i2c.c |    5 ++---
>>   1 file changed, 2 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
>> index 0fd508a..bae9335 100644
>> --- a/drivers/i2c/mxc_i2c.c
>> +++ b/drivers/i2c/mxc_i2c.c
>> @@ -200,10 +200,8 @@ int i2c_imx_trx_complete(void)
>>   	int timeout = I2C_MAX_TIMEOUT;
>>
>>   	while (timeout--) {
>> -		if (readb(&i2c_regs->i2sr) & I2SR_IIF) {
>> -			writeb(0, &i2c_regs->i2sr);
>> +		if (readb(&i2c_regs->i2sr) & I2SR_IIF)
>>   			return 0;
>> -		}
>>
>>   		udelay(1);
>>   	}
>> @@ -215,6 +213,7 @@ static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8
>> byte) {
>>   	unsigned ret;
>>
>> +	writeb(0, &i2c_regs->i2sr);
>>   	writeb(byte, &i2c_regs->i2dr);
>>   	ret = i2c_imx_trx_complete();
>>   	if (ret < 0)
> If you could try this on mx51 and mx31, I'd be glad. I recall having some issues
> there.
>
> If it works, add
> Acked-by: Marek Vasut <marex@denx.de>
>
> Best regards,
> Marek Vasut
>
I can't try on a mx31, but will try on a mx51.

Thanks
Troy
diff mbox

Patch

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 0fd508a..bae9335 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -200,10 +200,8 @@  int i2c_imx_trx_complete(void)
 	int timeout = I2C_MAX_TIMEOUT;
 
 	while (timeout--) {
-		if (readb(&i2c_regs->i2sr) & I2SR_IIF) {
-			writeb(0, &i2c_regs->i2sr);
+		if (readb(&i2c_regs->i2sr) & I2SR_IIF)
 			return 0;
-		}
 
 		udelay(1);
 	}
@@ -215,6 +213,7 @@  static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8 byte)
 {
 	unsigned ret;
 
+	writeb(0, &i2c_regs->i2sr);
 	writeb(byte, &i2c_regs->i2dr);
 	ret = i2c_imx_trx_complete();
 	if (ret < 0)