| Message ID | 000001cd4dc8$2734ebb0$759ec310$@ye@arm.com |
|---|---|
| State | New |
| Headers | show |
On 19/06/12 04:03, Joey Ye wrote: > Backporting trunk r179979 > > OK for 4.6? > > Backported from mainline > 2011-10-14 David Alan Gilbert <david.gilbert@linaro.org> > > PR target/48126 > * config/arm/arm.c (arm_output_sync_loop): Move label before > barrier. > > Index: gcc/config/arm/arm.h > =================================================================== > --- gcc/config/arm/arm.h (revision 188331) > +++ gcc/config/arm/arm.h (working copy) > @@ -294,7 +294,8 @@ > #define TARGET_HAVE_DMB (arm_arch7) > > /* Nonzero if this chip implements a memory barrier via CP15. */ > -#define TARGET_HAVE_DMB_MCR (arm_arch6k && ! TARGET_HAVE_DMB) > +#define TARGET_HAVE_DMB_MCR (arm_arch6 && ! TARGET_HAVE_DMB \ > + && ! TARGET_THUMB1) > > /* Nonzero if this chip implements a memory barrier instruction. */ > #define TARGET_HAVE_MEMORY_BARRIER (TARGET_HAVE_DMB || TARGET_HAVE_DMB_MCR) > > Not ok (yet), the ChangeLog entry doesn't match the patch. R.
Index: gcc/config/arm/arm.h =================================================================== --- gcc/config/arm/arm.h (revision 188331) +++ gcc/config/arm/arm.h (working copy) @@ -294,7 +294,8 @@ #define TARGET_HAVE_DMB (arm_arch7) /* Nonzero if this chip implements a memory barrier via CP15. */ -#define TARGET_HAVE_DMB_MCR (arm_arch6k && ! TARGET_HAVE_DMB) +#define TARGET_HAVE_DMB_MCR (arm_arch6 && ! TARGET_HAVE_DMB \ + && ! TARGET_THUMB1) /* Nonzero if this chip implements a memory barrier instruction. */ #define TARGET_HAVE_MEMORY_BARRIER (TARGET_HAVE_DMB || TARGET_HAVE_DMB_MCR)
Backporting trunk r179979 OK for 4.6? Backported from mainline 2011-10-14 David Alan Gilbert <david.gilbert@linaro.org> PR target/48126 * config/arm/arm.c (arm_output_sync_loop): Move label before barrier.