Message ID | 20120509131638.GA2057@lovely.krouter |
---|---|
State | New |
Headers | show |
On Wed, 2012-05-09 at 15:16 +0200, Christoph Fritz wrote: > This patch adds WEIM register addresses to mx35 platform header file. > > Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com> > Signed-off-by: Christian Hemp <c.hemp@phytec.de> > --- > arch/arm/plat-mxc/include/mach/mx35.h | 5 +++++ > 1 files changed, 5 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h > index 80965a9..8b8f424 100644 > --- a/arch/arm/plat-mxc/include/mach/mx35.h > +++ b/arch/arm/plat-mxc/include/mach/mx35.h > @@ -111,6 +111,11 @@ > #define MX35_EMI_CTL_BASE_ADDR (MX35_X_MEMC_BASE_ADDR + 0x4000) > #define MX35_PCMCIA_CTL_BASE_ADDR MX35_EMI_CTL_BASE_ADDR > > +#define MX35_WEIM_CSCRx_BASE_ADDR(cs) (MX35_WEIM_BASE_ADDR + (cs) * 0x10) > +#define MX35_WEIM_CSCRxU(cs) (MX35_WEIM_CSCRx_BASE_ADDR(cs)) > +#define MX35_WEIM_CSCRxL(cs) (MX35_WEIM_CSCRx_BASE_ADDR(cs) + 0x4) > +#define MX35_WEIM_CSCRxA(cs) (MX35_WEIM_CSCRx_BASE_ADDR(cs) + 0x8) > + > #define MX35_NFC_BASE_ADDR 0xbb000000 > #define MX35_PCMCIA_MEM_BASE_ADDR 0xbc000000 > ping
Hi Christoph, On Wed, May 09, 2012 at 03:16:38PM +0200, Christoph Fritz wrote: > > This patch adds WEIM register addresses to mx35 platform header file. > > Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com> > Signed-off-by: Christian Hemp <c.hemp@phytec.de> > --- > arch/arm/plat-mxc/include/mach/mx35.h | 5 +++++ > 1 files changed, 5 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h > index 80965a9..8b8f424 100644 > --- a/arch/arm/plat-mxc/include/mach/mx35.h > +++ b/arch/arm/plat-mxc/include/mach/mx35.h > @@ -111,6 +111,11 @@ > #define MX35_EMI_CTL_BASE_ADDR (MX35_X_MEMC_BASE_ADDR + 0x4000) > #define MX35_PCMCIA_CTL_BASE_ADDR MX35_EMI_CTL_BASE_ADDR > > +#define MX35_WEIM_CSCRx_BASE_ADDR(cs) (MX35_WEIM_BASE_ADDR + (cs) * 0x10) > +#define MX35_WEIM_CSCRxU(cs) (MX35_WEIM_CSCRx_BASE_ADDR(cs)) > +#define MX35_WEIM_CSCRxL(cs) (MX35_WEIM_CSCRx_BASE_ADDR(cs) + 0x4) > +#define MX35_WEIM_CSCRxA(cs) (MX35_WEIM_CSCRx_BASE_ADDR(cs) + 0x8) > + Honestly I'm not in the mood of adding another instance of the same register defines. Currently we have: #define MX31_WEIM_CSCRx_BASE_ADDR(cs) (MX31_WEIM_BASE_ADDR + (cs) * 0x10) #define MX31_WEIM_CSCRxU(cs) (MX31_WEIM_CSCRx_BASE_ADDR(cs)) #define MX31_WEIM_CSCRxL(cs) (MX31_WEIM_CSCRx_BASE_ADDR(cs) + 0x4) #define MX31_WEIM_CSCRxA(cs) (MX31_WEIM_CSCRx_BASE_ADDR(cs) + 0x8) #define MX27_WEIM_CSCRx_BASE_ADDR(cs) (MX27_WEIM_BASE_ADDR + (cs) * 0x10) #define MX27_WEIM_CSCRxU(cs) (MX27_WEIM_CSCRx_BASE_ADDR(cs)) #define MX27_WEIM_CSCRxL(cs) (MX27_WEIM_CSCRx_BASE_ADDR(cs) + 0x4) #define MX27_WEIM_CSCRxA(cs) (MX27_WEIM_CSCRx_BASE_ADDR(cs) + 0x8) The same could be used on i.MX25 aswell. I think we should clean this up before adding more SoCs. Sascha
On Thu, 2012-06-07 at 20:07 +0200, Sascha Hauer wrote: > The same could be used on i.MX25 aswell. I think we should clean this > up before adding more SoCs. :) full ack. What would you suggest? A macro? Thanks, -- Christoph
On Thu, Jun 07, 2012 at 08:17:29PM +0200, Christoph Fritz wrote: > On Thu, 2012-06-07 at 20:07 +0200, Sascha Hauer wrote: > > > The same could be used on i.MX25 aswell. I think we should clean this > > up before adding more SoCs. > > :) full ack. What would you suggest? A macro? Something like the following should do. We still could do better, but at least we have all pieces together. imx-weim.h: #define IMX_WEIM_CSU_BITS ... static inline void imx_weim_cs(void __iomem *base, int cs, u32 csu, u32 csl, u32 csa) { do_it } static inline void mx27_weim_cs(int cs, u32 csu, u32 csl, u32 csa) { imx_weim_cs(MX27_IO_ADDRESS(MX27_WEIM_BASE), cs, csu, csl, csa)); }
diff --git a/arch/arm/plat-mxc/include/mach/mx35.h b/arch/arm/plat-mxc/include/mach/mx35.h index 80965a9..8b8f424 100644 --- a/arch/arm/plat-mxc/include/mach/mx35.h +++ b/arch/arm/plat-mxc/include/mach/mx35.h @@ -111,6 +111,11 @@ #define MX35_EMI_CTL_BASE_ADDR (MX35_X_MEMC_BASE_ADDR + 0x4000) #define MX35_PCMCIA_CTL_BASE_ADDR MX35_EMI_CTL_BASE_ADDR +#define MX35_WEIM_CSCRx_BASE_ADDR(cs) (MX35_WEIM_BASE_ADDR + (cs) * 0x10) +#define MX35_WEIM_CSCRxU(cs) (MX35_WEIM_CSCRx_BASE_ADDR(cs)) +#define MX35_WEIM_CSCRxL(cs) (MX35_WEIM_CSCRx_BASE_ADDR(cs) + 0x4) +#define MX35_WEIM_CSCRxA(cs) (MX35_WEIM_CSCRx_BASE_ADDR(cs) + 0x8) + #define MX35_NFC_BASE_ADDR 0xbb000000 #define MX35_PCMCIA_MEM_BASE_ADDR 0xbc000000