Message ID | alpine.DEB.1.10.1205081014470.18334@tp.orcam.me.uk |
---|---|
State | Accepted |
Headers | show |
"Maciej W. Rozycki" <macro@codesourcery.com> writes: > gcc-mips16-gp-pseudo-loc.patch > Index: gcc-fsf-trunk-quilt/gcc/config/mips/mips.c > =================================================================== > --- gcc-fsf-trunk-quilt.orig/gcc/config/mips/mips.c 2012-05-02 23:42:46.185566469 +0100 > +++ gcc-fsf-trunk-quilt/gcc/config/mips/mips.c 2012-05-03 18:55:28.775580939 +0100 > @@ -2622,7 +2622,8 @@ mips16_gp_pseudo_reg (void) > scan = NEXT_INSN (scan); > > insn = gen_load_const_gp (cfun->machine->mips16_gp_pseudo_rtx); > - emit_insn_after (insn, scan); > + insn = emit_insn_after (insn, scan); > + INSN_LOCATOR (insn) = 0; > > pop_topmost_sequence (); > } An alternative would be to use prologue_locator, like ARM does. I'm not sure whether that's an improvement though, so the patch is OK as-is, thanks. Richard
On Tue, 8 May 2012, Richard Sandiford wrote: > > gcc-mips16-gp-pseudo-loc.patch > > Index: gcc-fsf-trunk-quilt/gcc/config/mips/mips.c > > =================================================================== > > --- gcc-fsf-trunk-quilt.orig/gcc/config/mips/mips.c 2012-05-02 23:42:46.185566469 +0100 > > +++ gcc-fsf-trunk-quilt/gcc/config/mips/mips.c 2012-05-03 18:55:28.775580939 +0100 > > @@ -2622,7 +2622,8 @@ mips16_gp_pseudo_reg (void) > > scan = NEXT_INSN (scan); > > > > insn = gen_load_const_gp (cfun->machine->mips16_gp_pseudo_rtx); > > - emit_insn_after (insn, scan); > > + insn = emit_insn_after (insn, scan); > > + INSN_LOCATOR (insn) = 0; > > > > pop_topmost_sequence (); > > } > > An alternative would be to use prologue_locator, like ARM does. Is this instruction guaranteed to be emitted once per function only? > I'm not sure whether that's an improvement though, so the patch > is OK as-is, thanks. Applied now, thanks. Maciej
"Maciej W. Rozycki" <macro@codesourcery.com> writes: > On Tue, 8 May 2012, Richard Sandiford wrote: >> > gcc-mips16-gp-pseudo-loc.patch >> > Index: gcc-fsf-trunk-quilt/gcc/config/mips/mips.c >> > =================================================================== >> > --- gcc-fsf-trunk-quilt.orig/gcc/config/mips/mips.c 2012-05-02 23:42:46.185566469 +0100 >> > +++ gcc-fsf-trunk-quilt/gcc/config/mips/mips.c 2012-05-03 18:55:28.775580939 +0100 >> > @@ -2622,7 +2622,8 @@ mips16_gp_pseudo_reg (void) >> > scan = NEXT_INSN (scan); >> > >> > insn = gen_load_const_gp (cfun->machine->mips16_gp_pseudo_rtx); >> > - emit_insn_after (insn, scan); >> > + insn = emit_insn_after (insn, scan); >> > + INSN_LOCATOR (insn) = 0; >> > >> > pop_topmost_sequence (); >> > } >> >> An alternative would be to use prologue_locator, like ARM does. > > Is this instruction guaranteed to be emitted once per function only? Yes.
Index: gcc-fsf-trunk-quilt/gcc/config/mips/mips.c =================================================================== --- gcc-fsf-trunk-quilt.orig/gcc/config/mips/mips.c 2012-05-02 23:42:46.185566469 +0100 +++ gcc-fsf-trunk-quilt/gcc/config/mips/mips.c 2012-05-03 18:55:28.775580939 +0100 @@ -2622,7 +2622,8 @@ mips16_gp_pseudo_reg (void) scan = NEXT_INSN (scan); insn = gen_load_const_gp (cfun->machine->mips16_gp_pseudo_rtx); - emit_insn_after (insn, scan); + insn = emit_insn_after (insn, scan); + INSN_LOCATOR (insn) = 0; pop_topmost_sequence (); }