| Message ID | 1334304028-25575-1-git-send-email-dirk.behme@de.bosch.com |
|---|---|
| State | Changes Requested |
| Headers | show |
On 13.04.2012 10:00, Dirk Behme wrote: > Init the core regulator voltage to 1.2V. This is required for the correct > functioning of the GPU and when the ARM LDO is set to 1.225V. This is a > workaround to fix some memory clock jitter. > > Note: This should be but can't be done in the DCD. The bootloader > prevents access to the ANATOP registers. > > Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> > CC: Jason Chen <b02280@freescale.com> > CC: Jason Liu <r64343@freescale.com> > CC: Ranjani Vaidyanathan <ra5478@freescale.com> > CC: Stefano Babic <sbabic@denx.de> > CC: Fabio Estevam <festevam@gmail.com> > --- > arch/arm/cpu/armv7/mx6/soc.c | 16 ++++++++++++++++ > 1 files changed, 16 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c > index 543b2cc..957ea34 100644 > --- a/arch/arm/cpu/armv7/mx6/soc.c > +++ b/arch/arm/cpu/armv7/mx6/soc.c > @@ -77,10 +77,26 @@ void init_aips(void) > writel(0x00000000, &aips2->opacr4); > } > > +static void init_anatop_reg(void) > +{ > + struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; > + int reg = readl(&anatop->reg_core); > + > + /* > + * Increase the VDDSOC to 1.2V > + * Mask out the REG_CORE[22:18] bits (REG2_TRIG) > + * and set them to 1.2V (0.7V + 0x14 * 0.025V) > + */ > + reg = (reg & ~(0x1F << 18)) | (0x14 << 18); > + writel(reg, &anatop->reg_core); > +} > + > int arch_cpu_init(void) > { > init_aips(); > > + init_anatop_reg(); > + > return 0; > } > #endif Any comments on this? Many thanks Dirk
2012/4/13 Dirk Behme <dirk.behme@de.bosch.com>: > Init the core regulator voltage to 1.2V. This is required for the correct > functioning of the GPU and when the ARM LDO is set to 1.225V. This is a > workaround to fix some memory clock jitter. > > Note: This should be but can't be done in the DCD. The bootloader > prevents access to the ANATOP registers. > > Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> > CC: Jason Chen <b02280@freescale.com> > CC: Jason Liu <r64343@freescale.com> > CC: Ranjani Vaidyanathan <ra5478@freescale.com> > CC: Stefano Babic <sbabic@denx.de> > CC: Fabio Estevam <festevam@gmail.com> > --- > arch/arm/cpu/armv7/mx6/soc.c | 16 ++++++++++++++++ > 1 files changed, 16 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c > index 543b2cc..957ea34 100644 > --- a/arch/arm/cpu/armv7/mx6/soc.c > +++ b/arch/arm/cpu/armv7/mx6/soc.c > @@ -77,10 +77,26 @@ void init_aips(void) > writel(0x00000000, &aips2->opacr4); > } > > +static void init_anatop_reg(void) > +{ > + struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; > + int reg = readl(&anatop->reg_core); > + > + /* > + * Increase the VDDSOC to 1.2V > + * Mask out the REG_CORE[22:18] bits (REG2_TRIG) > + * and set them to 1.2V (0.7V + 0x14 * 0.025V) > + */ > + reg = (reg & ~(0x1F << 18)) | (0x14 << 18); > + writel(reg, &anatop->reg_core); > +} > + > int arch_cpu_init(void) > { > init_aips(); > > + init_anatop_reg(); > + > return 0; > } > #endif Acked-by:Jason Liu <r64343@freescale.com> > -- > 1.7.0.4 > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot
On 13/04/2012 10:00, Dirk Behme wrote: > Init the core regulator voltage to 1.2V. This is required for the correct > functioning of the GPU and when the ARM LDO is set to 1.225V. This is a > workaround to fix some memory clock jitter. > > Note: This should be but can't be done in the DCD. The bootloader > prevents access to the ANATOP registers. > > Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> > CC: Jason Chen <b02280@freescale.com> > CC: Jason Liu <r64343@freescale.com> > CC: Ranjani Vaidyanathan <ra5478@freescale.com> > CC: Stefano Babic <sbabic@denx.de> > CC: Fabio Estevam <festevam@gmail.com> > --- Hi Dirk, > +static void init_anatop_reg(void) > +{ > + struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; > + int reg = readl(&anatop->reg_core); > + > + /* > + * Increase the VDDSOC to 1.2V > + * Mask out the REG_CORE[22:18] bits (REG2_TRIG) > + * and set them to 1.2V (0.7V + 0x14 * 0.025V) > + */ > + reg = (reg & ~(0x1F << 18)) | (0x14 << 18); Everything clear, but what do you mind to add an accessor to set this voltage ? It is straightforward, and more boards could use it. Best regards, Stefano Babic
Hi Stefano, On 23.04.2012 11:55, Stefano Babic wrote: > On 13/04/2012 10:00, Dirk Behme wrote: >> Init the core regulator voltage to 1.2V. This is required for the correct >> functioning of the GPU and when the ARM LDO is set to 1.225V. This is a >> workaround to fix some memory clock jitter. >> >> Note: This should be but can't be done in the DCD. The bootloader >> prevents access to the ANATOP registers. >> >> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> >> CC: Jason Chen <b02280@freescale.com> >> CC: Jason Liu <r64343@freescale.com> >> CC: Ranjani Vaidyanathan <ra5478@freescale.com> >> CC: Stefano Babic <sbabic@denx.de> >> CC: Fabio Estevam <festevam@gmail.com> >> --- > > Hi Dirk, > >> +static void init_anatop_reg(void) >> +{ >> + struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; >> + int reg = readl(&anatop->reg_core); >> + >> + /* >> + * Increase the VDDSOC to 1.2V >> + * Mask out the REG_CORE[22:18] bits (REG2_TRIG) >> + * and set them to 1.2V (0.7V + 0x14 * 0.025V) >> + */ >> + reg = (reg & ~(0x1F << 18)) | (0x14 << 18); > > Everything clear, but what do you mind to add an accessor to set this > voltage ? It is straightforward, and more boards could use it. Sorry, but what do you mean with "add an accessor"? Could you give an example? Best regards Dirk
On 23/04/2012 11:55, Stefano Babic wrote: > >> +static void init_anatop_reg(void) >> +{ >> + struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; >> + int reg = readl(&anatop->reg_core); >> + >> + /* >> + * Increase the VDDSOC to 1.2V >> + * Mask out the REG_CORE[22:18] bits (REG2_TRIG) >> + * and set them to 1.2V (0.7V + 0x14 * 0.025V) >> + */ >> + reg = (reg & ~(0x1F << 18)) | (0x14 << 18); > > Everything clear, but what do you mind to add an accessor to set this > voltage ? It is straightforward, and more boards could use it. Well, sometimes I am quite obscure, maybe I need more coffeine before writing my answers ;-) What I mean is to change the function name to something like set_vddsoc(mV), and exporting it dropping the static clause. Stefano
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 543b2cc..957ea34 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -77,10 +77,26 @@ void init_aips(void) writel(0x00000000, &aips2->opacr4); } +static void init_anatop_reg(void) +{ + struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; + int reg = readl(&anatop->reg_core); + + /* + * Increase the VDDSOC to 1.2V + * Mask out the REG_CORE[22:18] bits (REG2_TRIG) + * and set them to 1.2V (0.7V + 0x14 * 0.025V) + */ + reg = (reg & ~(0x1F << 18)) | (0x14 << 18); + writel(reg, &anatop->reg_core); +} + int arch_cpu_init(void) { init_aips(); + init_anatop_reg(); + return 0; } #endif
Init the core regulator voltage to 1.2V. This is required for the correct functioning of the GPU and when the ARM LDO is set to 1.225V. This is a workaround to fix some memory clock jitter. Note: This should be but can't be done in the DCD. The bootloader prevents access to the ANATOP registers. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Jason Chen <b02280@freescale.com> CC: Jason Liu <r64343@freescale.com> CC: Ranjani Vaidyanathan <ra5478@freescale.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <festevam@gmail.com> --- arch/arm/cpu/armv7/mx6/soc.c | 16 ++++++++++++++++ 1 files changed, 16 insertions(+), 0 deletions(-)