diff mbox series

[2/3] perf: arm_cspmu: nvidia: update CNVLINK PMU events

Message ID 20240918215846.1424282-3-bwicaksono@nvidia.com
State Handled Elsewhere
Headers show
Series perf: arm_cspmu: nvidia: update event list and filter | expand

Commit Message

Besar Wicaksono Sept. 18, 2024, 9:58 p.m. UTC
Rename loc* and rem* events in CNVLINK PMU to cmem* and gmem* events.

Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com>
---
 drivers/perf/arm_cspmu/nvidia_cspmu.c | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

Comments

Will Deacon Oct. 14, 2024, 1:19 p.m. UTC | #1
On Wed, Sep 18, 2024 at 09:58:45PM +0000, Besar Wicaksono wrote:
> Rename loc* and rem* events in CNVLINK PMU to cmem* and gmem* events.
> 
> Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com>
> ---
>  drivers/perf/arm_cspmu/nvidia_cspmu.c | 21 ++++++++++++++++++++-
>  1 file changed, 20 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/perf/arm_cspmu/nvidia_cspmu.c b/drivers/perf/arm_cspmu/nvidia_cspmu.c
> index ea2d44adfa7c..d1cd9975e71a 100644
> --- a/drivers/perf/arm_cspmu/nvidia_cspmu.c
> +++ b/drivers/perf/arm_cspmu/nvidia_cspmu.c
> @@ -112,6 +112,25 @@ static struct attribute *mcf_pmu_event_attrs[] = {
>  	NULL,
>  };
>  
> +static struct attribute *mcf_cnvlink_pmu_event_attrs[] = {
> +	ARM_CSPMU_EVENT_ATTR(rd_bytes_cmem,			0x0),
> +	ARM_CSPMU_EVENT_ATTR(rd_bytes_gmem,			0x1),
> +	ARM_CSPMU_EVENT_ATTR(wr_bytes_cmem,			0x2),
> +	ARM_CSPMU_EVENT_ATTR(wr_bytes_gmem,			0x3),
> +	ARM_CSPMU_EVENT_ATTR(total_bytes_cmem,			0x4),
> +	ARM_CSPMU_EVENT_ATTR(total_bytes_gmem,			0x5),
> +	ARM_CSPMU_EVENT_ATTR(rd_req_cmem,			0x6),
> +	ARM_CSPMU_EVENT_ATTR(rd_req_gmem,			0x7),
> +	ARM_CSPMU_EVENT_ATTR(wr_req_cmem,			0x8),
> +	ARM_CSPMU_EVENT_ATTR(wr_req_gmem,			0x9),
> +	ARM_CSPMU_EVENT_ATTR(total_req_cmem,			0xa),
> +	ARM_CSPMU_EVENT_ATTR(total_req_gmem,			0xb),
> +	ARM_CSPMU_EVENT_ATTR(rd_cum_outs_cmem,			0xc),
> +	ARM_CSPMU_EVENT_ATTR(rd_cum_outs_gmem,			0xd),
> +	ARM_CSPMU_EVENT_ATTR(cycles, ARM_CSPMU_EVT_CYCLES_DEFAULT),
> +	NULL,
> +};
> +
>  static struct attribute *generic_pmu_event_attrs[] = {
>  	ARM_CSPMU_EVENT_ATTR(cycles, ARM_CSPMU_EVT_CYCLES_DEFAULT),
>  	NULL,
> @@ -234,7 +253,7 @@ static const struct nv_cspmu_match nv_cspmu_match[] = {
>  	  .filter_default_val = NV_CNVL_FILTER_ID_MASK,
>  	  .name_pattern = "nvidia_cnvlink_pmu_%u",
>  	  .name_fmt = NAME_FMT_SOCKET,
> -	  .event_attr = mcf_pmu_event_attrs,
> +	  .event_attr = mcf_cnvlink_pmu_event_attrs,
>  	  .format_attr = cnvlink_pmu_format_attrs
>  	},

Hmm. Isn't this a user-visible change? For example, will scripts driving
'perf' with the old event names continue to work after this patch?

Will
Besar Wicaksono Oct. 15, 2024, 5:21 p.m. UTC | #2
> -----Original Message-----
> From: Will Deacon <will@kernel.org>
> Sent: Monday, October 14, 2024 8:19 AM
> To: Besar Wicaksono <bwicaksono@nvidia.com>
> Cc: suzuki.poulose@arm.com; robin.murphy@arm.com;
> catalin.marinas@arm.com; mark.rutland@arm.com; linux-arm-
> kernel@lists.infradead.org; linux-kernel@vger.kernel.org; linux-
> tegra@vger.kernel.org; Thierry Reding <treding@nvidia.com>; Jon Hunter
> <jonathanh@nvidia.com>; Vikram Sethi <vsethi@nvidia.com>; Rich Wiley
> <rwiley@nvidia.com>; Bob Knight <rknight@nvidia.com>
> Subject: Re: [PATCH 2/3] perf: arm_cspmu: nvidia: update CNVLINK PMU
> events
> 
> External email: Use caution opening links or attachments
> 
> 
> On Wed, Sep 18, 2024 at 09:58:45PM +0000, Besar Wicaksono wrote:
> > Rename loc* and rem* events in CNVLINK PMU to cmem* and gmem*
> events.
> >
> > Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com>
> > ---
> >  drivers/perf/arm_cspmu/nvidia_cspmu.c | 21 ++++++++++++++++++++-
> >  1 file changed, 20 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/perf/arm_cspmu/nvidia_cspmu.c
> b/drivers/perf/arm_cspmu/nvidia_cspmu.c
> > index ea2d44adfa7c..d1cd9975e71a 100644
> > --- a/drivers/perf/arm_cspmu/nvidia_cspmu.c
> > +++ b/drivers/perf/arm_cspmu/nvidia_cspmu.c
> > @@ -112,6 +112,25 @@ static struct attribute *mcf_pmu_event_attrs[] = {
> >       NULL,
> >  };
> >
> > +static struct attribute *mcf_cnvlink_pmu_event_attrs[] = {
> > +     ARM_CSPMU_EVENT_ATTR(rd_bytes_cmem,                     0x0),
> > +     ARM_CSPMU_EVENT_ATTR(rd_bytes_gmem,                     0x1),
> > +     ARM_CSPMU_EVENT_ATTR(wr_bytes_cmem,                     0x2),
> > +     ARM_CSPMU_EVENT_ATTR(wr_bytes_gmem,                     0x3),
> > +     ARM_CSPMU_EVENT_ATTR(total_bytes_cmem,                  0x4),
> > +     ARM_CSPMU_EVENT_ATTR(total_bytes_gmem,                  0x5),
> > +     ARM_CSPMU_EVENT_ATTR(rd_req_cmem,                       0x6),
> > +     ARM_CSPMU_EVENT_ATTR(rd_req_gmem,                       0x7),
> > +     ARM_CSPMU_EVENT_ATTR(wr_req_cmem,                       0x8),
> > +     ARM_CSPMU_EVENT_ATTR(wr_req_gmem,                       0x9),
> > +     ARM_CSPMU_EVENT_ATTR(total_req_cmem,                    0xa),
> > +     ARM_CSPMU_EVENT_ATTR(total_req_gmem,                    0xb),
> > +     ARM_CSPMU_EVENT_ATTR(rd_cum_outs_cmem,                  0xc),
> > +     ARM_CSPMU_EVENT_ATTR(rd_cum_outs_gmem,                  0xd),
> > +     ARM_CSPMU_EVENT_ATTR(cycles,
> ARM_CSPMU_EVT_CYCLES_DEFAULT),
> > +     NULL,
> > +};
> > +
> >  static struct attribute *generic_pmu_event_attrs[] = {
> >       ARM_CSPMU_EVENT_ATTR(cycles,
> ARM_CSPMU_EVT_CYCLES_DEFAULT),
> >       NULL,
> > @@ -234,7 +253,7 @@ static const struct nv_cspmu_match
> nv_cspmu_match[] = {
> >         .filter_default_val = NV_CNVL_FILTER_ID_MASK,
> >         .name_pattern = "nvidia_cnvlink_pmu_%u",
> >         .name_fmt = NAME_FMT_SOCKET,
> > -       .event_attr = mcf_pmu_event_attrs,
> > +       .event_attr = mcf_cnvlink_pmu_event_attrs,
> >         .format_attr = cnvlink_pmu_format_attrs
> >       },
> 
> Hmm. Isn't this a user-visible change? For example, will scripts driving
> 'perf' with the old event names continue to work after this patch?
> 

Yes this is user visible. I am expecting user script to be updated accordingly.
Would this be reasonable?

Regards,
Besar
Will Deacon Oct. 23, 2024, 4:26 p.m. UTC | #3
On Tue, Oct 15, 2024 at 05:21:06PM +0000, Besar Wicaksono wrote:
> 
> 
> > -----Original Message-----
> > From: Will Deacon <will@kernel.org>
> > Sent: Monday, October 14, 2024 8:19 AM
> > To: Besar Wicaksono <bwicaksono@nvidia.com>
> > Cc: suzuki.poulose@arm.com; robin.murphy@arm.com;
> > catalin.marinas@arm.com; mark.rutland@arm.com; linux-arm-
> > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; linux-
> > tegra@vger.kernel.org; Thierry Reding <treding@nvidia.com>; Jon Hunter
> > <jonathanh@nvidia.com>; Vikram Sethi <vsethi@nvidia.com>; Rich Wiley
> > <rwiley@nvidia.com>; Bob Knight <rknight@nvidia.com>
> > Subject: Re: [PATCH 2/3] perf: arm_cspmu: nvidia: update CNVLINK PMU
> > events
> > 
> > External email: Use caution opening links or attachments
> > 
> > 
> > On Wed, Sep 18, 2024 at 09:58:45PM +0000, Besar Wicaksono wrote:
> > > Rename loc* and rem* events in CNVLINK PMU to cmem* and gmem*
> > events.
> > >
> > > Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com>
> > > ---
> > >  drivers/perf/arm_cspmu/nvidia_cspmu.c | 21 ++++++++++++++++++++-
> > >  1 file changed, 20 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/perf/arm_cspmu/nvidia_cspmu.c
> > b/drivers/perf/arm_cspmu/nvidia_cspmu.c
> > > index ea2d44adfa7c..d1cd9975e71a 100644
> > > --- a/drivers/perf/arm_cspmu/nvidia_cspmu.c
> > > +++ b/drivers/perf/arm_cspmu/nvidia_cspmu.c
> > > @@ -112,6 +112,25 @@ static struct attribute *mcf_pmu_event_attrs[] = {
> > >       NULL,
> > >  };
> > >
> > > +static struct attribute *mcf_cnvlink_pmu_event_attrs[] = {
> > > +     ARM_CSPMU_EVENT_ATTR(rd_bytes_cmem,                     0x0),
> > > +     ARM_CSPMU_EVENT_ATTR(rd_bytes_gmem,                     0x1),
> > > +     ARM_CSPMU_EVENT_ATTR(wr_bytes_cmem,                     0x2),
> > > +     ARM_CSPMU_EVENT_ATTR(wr_bytes_gmem,                     0x3),
> > > +     ARM_CSPMU_EVENT_ATTR(total_bytes_cmem,                  0x4),
> > > +     ARM_CSPMU_EVENT_ATTR(total_bytes_gmem,                  0x5),
> > > +     ARM_CSPMU_EVENT_ATTR(rd_req_cmem,                       0x6),
> > > +     ARM_CSPMU_EVENT_ATTR(rd_req_gmem,                       0x7),
> > > +     ARM_CSPMU_EVENT_ATTR(wr_req_cmem,                       0x8),
> > > +     ARM_CSPMU_EVENT_ATTR(wr_req_gmem,                       0x9),
> > > +     ARM_CSPMU_EVENT_ATTR(total_req_cmem,                    0xa),
> > > +     ARM_CSPMU_EVENT_ATTR(total_req_gmem,                    0xb),
> > > +     ARM_CSPMU_EVENT_ATTR(rd_cum_outs_cmem,                  0xc),
> > > +     ARM_CSPMU_EVENT_ATTR(rd_cum_outs_gmem,                  0xd),
> > > +     ARM_CSPMU_EVENT_ATTR(cycles,
> > ARM_CSPMU_EVT_CYCLES_DEFAULT),
> > > +     NULL,
> > > +};
> > > +
> > >  static struct attribute *generic_pmu_event_attrs[] = {
> > >       ARM_CSPMU_EVENT_ATTR(cycles,
> > ARM_CSPMU_EVT_CYCLES_DEFAULT),
> > >       NULL,
> > > @@ -234,7 +253,7 @@ static const struct nv_cspmu_match
> > nv_cspmu_match[] = {
> > >         .filter_default_val = NV_CNVL_FILTER_ID_MASK,
> > >         .name_pattern = "nvidia_cnvlink_pmu_%u",
> > >         .name_fmt = NAME_FMT_SOCKET,
> > > -       .event_attr = mcf_pmu_event_attrs,
> > > +       .event_attr = mcf_cnvlink_pmu_event_attrs,
> > >         .format_attr = cnvlink_pmu_format_attrs
> > >       },
> > 
> > Hmm. Isn't this a user-visible change? For example, will scripts driving
> > 'perf' with the old event names continue to work after this patch?
> > 
> 
> Yes this is user visible. I am expecting user script to be updated accordingly.
> Would this be reasonable?

I don't think so, no. We don't tend to require userspace changes as a
result of upgrading the kernel.

Will
Besar Wicaksono Oct. 24, 2024, 2:10 p.m. UTC | #4
> -----Original Message-----
> From: Will Deacon <will@kernel.org>
> Sent: Wednesday, October 23, 2024 11:27 AM
> To: Besar Wicaksono <bwicaksono@nvidia.com>
> Cc: suzuki.poulose@arm.com; robin.murphy@arm.com;
> catalin.marinas@arm.com; mark.rutland@arm.com; linux-arm-
> kernel@lists.infradead.org; linux-kernel@vger.kernel.org; linux-
> tegra@vger.kernel.org; Thierry Reding <treding@nvidia.com>; Jon Hunter
> <jonathanh@nvidia.com>; Vikram Sethi <vsethi@nvidia.com>; Rich Wiley
> <rwiley@nvidia.com>; Bob Knight <rknight@nvidia.com>
> Subject: Re: [PATCH 2/3] perf: arm_cspmu: nvidia: update CNVLINK PMU
> events
> 
> External email: Use caution opening links or attachments
> 
> 
> On Tue, Oct 15, 2024 at 05:21:06PM +0000, Besar Wicaksono wrote:
> >
> >
> > > -----Original Message-----
> > > From: Will Deacon <will@kernel.org>
> > > Sent: Monday, October 14, 2024 8:19 AM
> > > To: Besar Wicaksono <bwicaksono@nvidia.com>
> > > Cc: suzuki.poulose@arm.com; robin.murphy@arm.com;
> > > catalin.marinas@arm.com; mark.rutland@arm.com; linux-arm-
> > > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; linux-
> > > tegra@vger.kernel.org; Thierry Reding <treding@nvidia.com>; Jon Hunter
> > > <jonathanh@nvidia.com>; Vikram Sethi <vsethi@nvidia.com>; Rich Wiley
> > > <rwiley@nvidia.com>; Bob Knight <rknight@nvidia.com>
> > > Subject: Re: [PATCH 2/3] perf: arm_cspmu: nvidia: update CNVLINK PMU
> > > events
> > >
> > > External email: Use caution opening links or attachments
> > >
> > >
> > > On Wed, Sep 18, 2024 at 09:58:45PM +0000, Besar Wicaksono wrote:
> > > > Rename loc* and rem* events in CNVLINK PMU to cmem* and gmem*
> > > events.
> > > >
> > > > Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com>
> > > > ---
> > > >  drivers/perf/arm_cspmu/nvidia_cspmu.c | 21
> ++++++++++++++++++++-
> > > >  1 file changed, 20 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/perf/arm_cspmu/nvidia_cspmu.c
> > > b/drivers/perf/arm_cspmu/nvidia_cspmu.c
> > > > index ea2d44adfa7c..d1cd9975e71a 100644
> > > > --- a/drivers/perf/arm_cspmu/nvidia_cspmu.c
> > > > +++ b/drivers/perf/arm_cspmu/nvidia_cspmu.c
> > > > @@ -112,6 +112,25 @@ static struct attribute *mcf_pmu_event_attrs[]
> = {
> > > >       NULL,
> > > >  };
> > > >
> > > > +static struct attribute *mcf_cnvlink_pmu_event_attrs[] = {
> > > > +     ARM_CSPMU_EVENT_ATTR(rd_bytes_cmem,                     0x0),
> > > > +     ARM_CSPMU_EVENT_ATTR(rd_bytes_gmem,                     0x1),
> > > > +     ARM_CSPMU_EVENT_ATTR(wr_bytes_cmem,                     0x2),
> > > > +     ARM_CSPMU_EVENT_ATTR(wr_bytes_gmem,                     0x3),
> > > > +     ARM_CSPMU_EVENT_ATTR(total_bytes_cmem,                  0x4),
> > > > +     ARM_CSPMU_EVENT_ATTR(total_bytes_gmem,                  0x5),
> > > > +     ARM_CSPMU_EVENT_ATTR(rd_req_cmem,                       0x6),
> > > > +     ARM_CSPMU_EVENT_ATTR(rd_req_gmem,                       0x7),
> > > > +     ARM_CSPMU_EVENT_ATTR(wr_req_cmem,                       0x8),
> > > > +     ARM_CSPMU_EVENT_ATTR(wr_req_gmem,                       0x9),
> > > > +     ARM_CSPMU_EVENT_ATTR(total_req_cmem,                    0xa),
> > > > +     ARM_CSPMU_EVENT_ATTR(total_req_gmem,                    0xb),
> > > > +     ARM_CSPMU_EVENT_ATTR(rd_cum_outs_cmem,                  0xc),
> > > > +     ARM_CSPMU_EVENT_ATTR(rd_cum_outs_gmem,                  0xd),
> > > > +     ARM_CSPMU_EVENT_ATTR(cycles,
> > > ARM_CSPMU_EVT_CYCLES_DEFAULT),
> > > > +     NULL,
> > > > +};
> > > > +
> > > >  static struct attribute *generic_pmu_event_attrs[] = {
> > > >       ARM_CSPMU_EVENT_ATTR(cycles,
> > > ARM_CSPMU_EVT_CYCLES_DEFAULT),
> > > >       NULL,
> > > > @@ -234,7 +253,7 @@ static const struct nv_cspmu_match
> > > nv_cspmu_match[] = {
> > > >         .filter_default_val = NV_CNVL_FILTER_ID_MASK,
> > > >         .name_pattern = "nvidia_cnvlink_pmu_%u",
> > > >         .name_fmt = NAME_FMT_SOCKET,
> > > > -       .event_attr = mcf_pmu_event_attrs,
> > > > +       .event_attr = mcf_cnvlink_pmu_event_attrs,
> > > >         .format_attr = cnvlink_pmu_format_attrs
> > > >       },
> > >
> > > Hmm. Isn't this a user-visible change? For example, will scripts driving
> > > 'perf' with the old event names continue to work after this patch?
> > >
> >
> > Yes this is user visible. I am expecting user script to be updated accordingly.
> > Would this be reasonable?
> 
> I don't think so, no. We don't tend to require userspace changes as a
> result of upgrading the kernel.

Are you referring to userspace change just on the perf tool side?
Cause this PMU doesn't have JSON scripts for alias/metric in the perf tool yet.

Do you have suggestion of the proper approach?

Thanks,
Besar
Will Deacon Oct. 28, 2024, 3:17 p.m. UTC | #5
On Thu, Oct 24, 2024 at 02:10:55PM +0000, Besar Wicaksono wrote:
> > > > > diff --git a/drivers/perf/arm_cspmu/nvidia_cspmu.c
> > > > b/drivers/perf/arm_cspmu/nvidia_cspmu.c
> > > > > index ea2d44adfa7c..d1cd9975e71a 100644
> > > > > --- a/drivers/perf/arm_cspmu/nvidia_cspmu.c
> > > > > +++ b/drivers/perf/arm_cspmu/nvidia_cspmu.c
> > > > > @@ -112,6 +112,25 @@ static struct attribute *mcf_pmu_event_attrs[]
> > = {
> > > > >       NULL,
> > > > >  };
> > > > >
> > > > > +static struct attribute *mcf_cnvlink_pmu_event_attrs[] = {
> > > > > +     ARM_CSPMU_EVENT_ATTR(rd_bytes_cmem,                     0x0),
> > > > > +     ARM_CSPMU_EVENT_ATTR(rd_bytes_gmem,                     0x1),
> > > > > +     ARM_CSPMU_EVENT_ATTR(wr_bytes_cmem,                     0x2),
> > > > > +     ARM_CSPMU_EVENT_ATTR(wr_bytes_gmem,                     0x3),
> > > > > +     ARM_CSPMU_EVENT_ATTR(total_bytes_cmem,                  0x4),
> > > > > +     ARM_CSPMU_EVENT_ATTR(total_bytes_gmem,                  0x5),
> > > > > +     ARM_CSPMU_EVENT_ATTR(rd_req_cmem,                       0x6),
> > > > > +     ARM_CSPMU_EVENT_ATTR(rd_req_gmem,                       0x7),
> > > > > +     ARM_CSPMU_EVENT_ATTR(wr_req_cmem,                       0x8),
> > > > > +     ARM_CSPMU_EVENT_ATTR(wr_req_gmem,                       0x9),
> > > > > +     ARM_CSPMU_EVENT_ATTR(total_req_cmem,                    0xa),
> > > > > +     ARM_CSPMU_EVENT_ATTR(total_req_gmem,                    0xb),
> > > > > +     ARM_CSPMU_EVENT_ATTR(rd_cum_outs_cmem,                  0xc),
> > > > > +     ARM_CSPMU_EVENT_ATTR(rd_cum_outs_gmem,                  0xd),
> > > > > +     ARM_CSPMU_EVENT_ATTR(cycles,
> > > > ARM_CSPMU_EVT_CYCLES_DEFAULT),
> > > > > +     NULL,
> > > > > +};
> > > > > +
> > > > >  static struct attribute *generic_pmu_event_attrs[] = {
> > > > >       ARM_CSPMU_EVENT_ATTR(cycles,
> > > > ARM_CSPMU_EVT_CYCLES_DEFAULT),
> > > > >       NULL,
> > > > > @@ -234,7 +253,7 @@ static const struct nv_cspmu_match
> > > > nv_cspmu_match[] = {
> > > > >         .filter_default_val = NV_CNVL_FILTER_ID_MASK,
> > > > >         .name_pattern = "nvidia_cnvlink_pmu_%u",
> > > > >         .name_fmt = NAME_FMT_SOCKET,
> > > > > -       .event_attr = mcf_pmu_event_attrs,
> > > > > +       .event_attr = mcf_cnvlink_pmu_event_attrs,
> > > > >         .format_attr = cnvlink_pmu_format_attrs
> > > > >       },
> > > >
> > > > Hmm. Isn't this a user-visible change? For example, will scripts driving
> > > > 'perf' with the old event names continue to work after this patch?
> > > >
> > >
> > > Yes this is user visible. I am expecting user script to be updated accordingly.
> > > Would this be reasonable?
> > 
> > I don't think so, no. We don't tend to require userspace changes as a
> > result of upgrading the kernel.
> 
> Are you referring to userspace change just on the perf tool side?
> Cause this PMU doesn't have JSON scripts for alias/metric in the perf tool yet.

I'm not sure that matters, does it? If the mappings are exposed in sysfs,
then the tool will pick them up.

> Do you have suggestion of the proper approach?

I'd say leave the event names like they are and if you want to add aliases,
do that in userspace.

Will
diff mbox series

Patch

diff --git a/drivers/perf/arm_cspmu/nvidia_cspmu.c b/drivers/perf/arm_cspmu/nvidia_cspmu.c
index ea2d44adfa7c..d1cd9975e71a 100644
--- a/drivers/perf/arm_cspmu/nvidia_cspmu.c
+++ b/drivers/perf/arm_cspmu/nvidia_cspmu.c
@@ -112,6 +112,25 @@  static struct attribute *mcf_pmu_event_attrs[] = {
 	NULL,
 };
 
+static struct attribute *mcf_cnvlink_pmu_event_attrs[] = {
+	ARM_CSPMU_EVENT_ATTR(rd_bytes_cmem,			0x0),
+	ARM_CSPMU_EVENT_ATTR(rd_bytes_gmem,			0x1),
+	ARM_CSPMU_EVENT_ATTR(wr_bytes_cmem,			0x2),
+	ARM_CSPMU_EVENT_ATTR(wr_bytes_gmem,			0x3),
+	ARM_CSPMU_EVENT_ATTR(total_bytes_cmem,			0x4),
+	ARM_CSPMU_EVENT_ATTR(total_bytes_gmem,			0x5),
+	ARM_CSPMU_EVENT_ATTR(rd_req_cmem,			0x6),
+	ARM_CSPMU_EVENT_ATTR(rd_req_gmem,			0x7),
+	ARM_CSPMU_EVENT_ATTR(wr_req_cmem,			0x8),
+	ARM_CSPMU_EVENT_ATTR(wr_req_gmem,			0x9),
+	ARM_CSPMU_EVENT_ATTR(total_req_cmem,			0xa),
+	ARM_CSPMU_EVENT_ATTR(total_req_gmem,			0xb),
+	ARM_CSPMU_EVENT_ATTR(rd_cum_outs_cmem,			0xc),
+	ARM_CSPMU_EVENT_ATTR(rd_cum_outs_gmem,			0xd),
+	ARM_CSPMU_EVENT_ATTR(cycles, ARM_CSPMU_EVT_CYCLES_DEFAULT),
+	NULL,
+};
+
 static struct attribute *generic_pmu_event_attrs[] = {
 	ARM_CSPMU_EVENT_ATTR(cycles, ARM_CSPMU_EVT_CYCLES_DEFAULT),
 	NULL,
@@ -234,7 +253,7 @@  static const struct nv_cspmu_match nv_cspmu_match[] = {
 	  .filter_default_val = NV_CNVL_FILTER_ID_MASK,
 	  .name_pattern = "nvidia_cnvlink_pmu_%u",
 	  .name_fmt = NAME_FMT_SOCKET,
-	  .event_attr = mcf_pmu_event_attrs,
+	  .event_attr = mcf_cnvlink_pmu_event_attrs,
 	  .format_attr = cnvlink_pmu_format_attrs
 	},
 	{