| Message ID | alpine.DEB.2.00.1203131900120.17381@bitbaker64 |
|---|---|
| State | Superseded |
| Headers | show |
> -----Original Message----- > From: David C. Purdy [mailto:david.c.purdy@gmail.com] > Sent: 14 March 2012 05:47 > To: u-boot@lists.denx.de > Cc: Prafulla Wadaskar; albert.u.boot@aribaud.net > Subject: [PATCH v2] kirkwood: add support for Cloud Engines Pogoplug > E02 > > [PATCH v2] add support for Cloud Engines Pogoplug E02 > > This patch adds support for Cloud Engines Pogoplug E02. May you please add here a pointer of the board information here? May you please explain how different this board is if compared to Sheevaplug, Guruplug, DreamPlug ? > > Signed-off-by: David Purdy <david.c.purdy@gmail.com> > Cc: prafulla@marvell.com > Cc: albert.u.boot@aribaud.net > --- > Changes for v2: > - added MAINTAINERS info for pogoplug_e02 > - fixed format to ensure capture of all files in path > > MAINTAINERS | 4 + > board/cloudengines/pogoplug_e02/Makefile | 49 +++++++ > board/cloudengines/pogoplug_e02/kwbimage.cfg | 165 Is this file 100% clone of existing file on the repository? Or you have modified it further for your board, if not, you can reuse the old one. > ++++++++++++++++++++++++ > board/cloudengines/pogoplug_e02/pogoplug_e02.c | 148 > +++++++++++++++++++++ > board/cloudengines/pogoplug_e02/pogoplug_e02.h | 46 +++++++ > boards.cfg | 1 + > include/configs/pogoplug_e02.h | 123 > ++++++++++++++++++ > 7 files changed, 536 insertions(+), 0 deletions(-) > create mode 100644 board/cloudengines/pogoplug_e02/Makefile > create mode 100644 board/cloudengines/pogoplug_e02/kwbimage.cfg > create mode 100644 board/cloudengines/pogoplug_e02/pogoplug_e02.c > create mode 100644 board/cloudengines/pogoplug_e02/pogoplug_e02.h > create mode 100644 include/configs/pogoplug_e02.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index 46f63a0..ae65ff3 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -793,6 +793,10 @@ Stelian Pop <stelian@popies.net> > at91sam9263ek ARM926EJS (AT91SAM9263 SoC) > at91sam9rlek ARM926EJS (AT91SAM9RL SoC) > > +Dave Purdy <david.c.purdy@gmail.com> > + > + pogoplug_e02 ARM926EJS (Kirkwood SoC) > + Please maintain the order here? > Thierry Reding <thierry.reding@avionic-design.de> > > plutux Tegra2 (ARM7 & A9 Dual Core) > diff --git a/board/cloudengines/pogoplug_e02/Makefile > b/board/cloudengines/pogoplug_e02/Makefile > new file mode 100644 > index 0000000..fe92238 > --- /dev/null > +++ b/board/cloudengines/pogoplug_e02/Makefile > @@ -0,0 +1,49 @@ > +# > +# Copyright (C) 2012 > +# David Purdy <david.c.purdy@gmail.com> > +# > +# Based on Kirkwood support: > +# (C) Copyright 2009 > +# Marvell Semiconductor <www.marvell.com> > +# Written-by: Prafulla Wadaskar <prafulla@marvell.com> > +# > +# See file CREDITS for list of people who contributed to this > +# project. > +# > +# This program is free software; you can redistribute it and/or > +# modify it under the terms of the GNU General Public License as > +# published by the Free Software Foundation; either version 2 of > +# the License, or (at your option) any later version. > +# > +# This program is distributed in the hope that it will be useful, > +# but WITHOUT ANY WARRANTY; without even the implied warranty of > +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > +# GNU General Public License for more details. > +# > +# You should have received a copy of the GNU General Public License > +# along with this program; if not, write to the Free Software > +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, > +# MA 02110-1301 USA > +# > + > +include $(TOPDIR)/config.mk > + > +LIB = $(obj)lib$(BOARD).o > + > +COBJS := pogoplug_e02.o > + > +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) > +OBJS := $(addprefix $(obj),$(COBJS)) > +SOBJS := $(addprefix $(obj),$(SOBJS)) > + > +$(LIB): $(obj).depend $(OBJS) $(SOBJS) > + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) > + > +##################################################################### > #### > + > +# defines $(obj).depend target > +include $(SRCTREE)/rules.mk > + > +sinclude $(obj).depend > + > +##################################################################### > #### > diff --git a/board/cloudengines/pogoplug_e02/kwbimage.cfg > b/board/cloudengines/pogoplug_e02/kwbimage.cfg > new file mode 100644 > index 0000000..e482f16 > --- /dev/null > +++ b/board/cloudengines/pogoplug_e02/kwbimage.cfg > @@ -0,0 +1,165 @@ > +# > +# Copyright (C) 2012 > +# David Purdy <david.c.purdy@gmail.com> > +# > +# Based on Kirkwood support: > +# (C) Copyright 2009 > +# Marvell Semiconductor <www.marvell.com> > +# Written-by: Prafulla Wadaskar <prafulla <at> marvell.com> > +# > +# See file CREDITS for list of people who contributed to this > +# project. > +# > +# This program is free software; you can redistribute it and/or > +# modify it under the terms of the GNU General Public License as > +# published by the Free Software Foundation; either version 2 of > +# the License, or (at your option) any later version. > +# > +# This program is distributed in the hope that it will be useful, > +# but WITHOUT ANY WARRANTY; without even the implied warranty of > +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > +# GNU General Public License for more details. > +# > +# You should have received a copy of the GNU General Public License > +# along with this program; if not, write to the Free Software > +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, > +# MA 02110-1301 USA > +# > +# Refer docs/README.kwimage for more details about how-to configure > +# and create kirkwood boot image > +# > + > +# Boot Media configurations > +BOOT_FROM nand > +NAND_ECC_MODE default > +NAND_PAGE_SIZE 0x0800 > + > +# SOC registers configuration using bootrom header extension > +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed > + > +# Configure RGMII-0 interface pad voltage to 1.8V > +DATA 0xFFD100e0 0x1b1b1b9b > + > +#Dram initalization for SINGLE x16 CL=5 @ 400MHz > +DATA 0xFFD01400 0x43000c30 # DDR Configuration register > +# bit13-0: 0xc30 (3120 DDR2 clks refresh rate) > +# bit23-14: zero > +# bit24: 1= enable exit self refresh mode on DDR access > +# bit25: 1 required > +# bit29-26: zero > +# bit31-30: 01 > + > +DATA 0xFFD01404 0x37543000 # DDR Controller Control Low > +# bit 4: 0=addr/cmd in smame cycle > +# bit 5: 0=clk is driven during self refresh, we don't care for > APX > +# bit 6: 0=use recommended falling edge of clk for addr/cmd > +# bit14: 0=input buffer always powered up > +# bit18: 1=cpu lock transaction enabled > +# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled > bit31=0 > +# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, > unbuffered DIMM > +# bit30-28: 3 required > +# bit31: 0=no additional STARTBURST delay > + > +DATA 0xFFD01408 0x22125451 # DDR Timing (Low) (active cycles value > +1) > +# bit3-0: TRAS lsbs > +# bit7-4: TRCD > +# bit11- 8: TRP > +# bit15-12: TWR > +# bit19-16: TWTR > +# bit20: TRAS msb > +# bit23-21: 0x0 > +# bit27-24: TRRD > +# bit31-28: TRTP > + > +DATA 0xFFD0140C 0x00000a33 # DDR Timing (High) > +# bit6-0: TRFC > +# bit8-7: TR2R > +# bit10-9: TR2W > +# bit12-11: TW2W > +# bit31-13: zero required > + > +DATA 0xFFD01410 0x000000cc # DDR Address Control > +# bit1-0: 00, Cs0width=x8 > +# bit3-2: 11, Cs0size=1Gb > +# bit5-4: 00, Cs1width=x8 > +# bit7-6: 11, Cs1size=1Gb > +# bit9-8: 00, Cs2width=nonexistent > +# bit11-10: 00, Cs2size =nonexistent > +# bit13-12: 00, Cs3width=nonexistent > +# bit15-14: 00, Cs3size =nonexistent > +# bit16: 0, Cs0AddrSel > +# bit17: 0, Cs1AddrSel > +# bit18: 0, Cs2AddrSel > +# bit19: 0, Cs3AddrSel > +# bit31-20: 0 required > + > +DATA 0xFFD01414 0x00000000 # DDR Open Pages Control > +# bit0: 0, OpenPage enabled > +# bit31-1: 0 required > + > +DATA 0xFFD01418 0x00000000 # DDR Operation > +# bit3-0: 0x0, DDR cmd > +# bit31-4: 0 required > + > +DATA 0xFFD0141C 0x00000C52 # DDR Mode > +# bit2-0: 2, BurstLen=2 required > +# bit3: 0, BurstType=0 required > +# bit6-4: 4, CL=5 > +# bit7: 0, TestMode=0 normal > +# bit8: 0, DLL reset=0 normal > +# bit11-9: 6, auto-precharge write recovery ???????????? > +# bit12: 0, PD must be zero > +# bit31-13: 0 required > + > +DATA 0xFFD01420 0x00000040 # DDR Extended Mode > +# bit0: 0, DDR DLL enabled > +# bit1: 0, DDR drive strenght normal > +# bit2: 0, DDR ODT control lsd (disabled) > +# bit5-3: 000, required > +# bit6: 1, DDR ODT control msb, (disabled) > +# bit9-7: 000, required > +# bit10: 0, differential DQS enabled > +# bit11: 0, required > +# bit12: 0, DDR output buffer enabled > +# bit31-13: 0 required > + > +DATA 0xFFD01424 0x0000F17F # DDR Controller Control High > +# bit2-0: 111, required > +# bit3 : 1 , MBUS Burst Chop disabled > +# bit6-4: 111, required > +# bit7 : 0 > +# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= > 300MHz > +# bit9 : 0 , no half clock cycle addition to dataout > +# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals > +# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh > +# bit15-12: 1111 required > +# bit31-16: 0 required > + > +DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) > +DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) > + > +DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size > +# bit0: 1, Window enabled > +# bit1: 0, Write Protect disabled > +# bit3-2: 00, CS0 hit selected > +# bit23-4: ones, required > +# bit31-24: 0x0F, Size (i.e. 256MB) > + > +DATA 0xFFD01508 0x10000000 # CS[1]n Base address to 256Mb > +DATA 0xFFD0150C 0x00000000 # CS[2]n Size, window disabled > + > +DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled > +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled > + > +DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low) > +DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) > +# bit1-0: 00, ODT0 controlled by ODT Control (low) register above > +# bit3-2: 01, ODT1 active NEVER! > +# bit31-4: zero, required > + > +DATA 0xFFD0149C 0x0000E803 # CPU ODT Control > +DATA 0xFFD01480 0x00000001 # DDR Initialization Control > +#bit0=1, enable DDR init upon this register write > + > +# End of Header extension > +DATA 0x0 0x0 > diff --git a/board/cloudengines/pogoplug_e02/pogoplug_e02.c > b/board/cloudengines/pogoplug_e02/pogoplug_e02.c > new file mode 100644 > index 0000000..f8e2c46 > --- /dev/null > +++ b/board/cloudengines/pogoplug_e02/pogoplug_e02.c > @@ -0,0 +1,148 @@ > +/* > + * Copyright (C) 2012 > + * David Purdy <david.c.purdy@gmail.com> > + * > + * Based on Kirkwood support: > + * (C) Copyright 2009 > + * Marvell Semiconductor <www.marvell.com> > + * Written-by: Prafulla Wadaskar <prafulla@marvell.com> > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, > + * MA 02110-1301 USA > + */ > + > +#include <common.h> > +#include <miiphy.h> > +#include <asm/arch/kirkwood.h> > +#include <asm/arch/mpp.h> > +#include <asm/arch/cpu.h> > +#include <asm/io.h> > +#include "pogoplug_e02.h" > + > +DECLARE_GLOBAL_DATA_PTR; > + > +int board_early_init_f(void) > +{ > + /* > + * default gpio configuration > + * There are maximum 64 gpios controlled through 2 sets of > registers > + * the below configuration configures mainly initial LED status > + */ > + kw_config_gpio(POGOPLUG_E02_OE_VAL_LOW, > + POGOPLUG_E02_OE_VAL_HIGH, > + POGOPLUG_E02_OE_LOW, POGOPLUG_E02_OE_HIGH); > + > + /* Multi-Purpose Pins Functionality configuration */ > + u32 kwmpp_config[] = { > + MPP0_NF_IO2, > + MPP1_NF_IO3, > + MPP2_NF_IO4, > + MPP3_NF_IO5, > + MPP4_NF_IO6, > + MPP5_NF_IO7, > + MPP6_SYSRST_OUTn, > + MPP7_GPO, > + MPP8_UART0_RTS, > + MPP9_UART0_CTS, > + MPP10_UART0_TXD, > + MPP11_UART0_RXD, > + MPP12_SD_CLK, > + MPP13_SD_CMD, > + MPP14_SD_D0, > + MPP15_SD_D1, > + MPP16_SD_D2, > + MPP17_SD_D3, > + MPP18_NF_IO0, > + MPP19_NF_IO1, > + MPP20_GPIO, > + MPP21_GPIO, > + MPP22_GPIO, > + MPP23_GPIO, > + MPP24_GPIO, > + MPP25_GPIO, > + MPP26_GPIO, > + MPP27_GPIO, > + MPP28_GPIO, > + MPP29_TSMP9, > + MPP30_GPIO, > + MPP31_GPIO, > + MPP32_GPIO, > + MPP33_GPIO, > + MPP34_GPIO, > + MPP35_GPIO, > + MPP36_GPIO, > + MPP37_GPIO, > + MPP38_GPIO, > + MPP39_GPIO, > + MPP40_GPIO, > + MPP41_GPIO, > + MPP42_GPIO, > + MPP43_GPIO, > + MPP44_GPIO, > + MPP45_GPIO, > + MPP46_GPIO, > + MPP47_GPIO, > + MPP48_GPIO, > + MPP49_GPIO, > + 0 > + }; > + kirkwood_mpp_conf(kwmpp_config); > + return 0; > +} > + > +int board_init(void) > +{ > + /* Boot parameters address */ > + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; > + > + return 0; > +} > + > +#ifdef CONFIG_RESET_PHY_R > +/* Configure and initialize PHY */ > +void reset_phy(void) > +{ > + u16 reg; > + u16 devadr; > + char *name = "egiga0"; > + > + if (miiphy_set_current_dev(name)) > + return; > + > + /* command to read PHY dev address */ > + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { > + printf("Err..(%s) could not read PHY dev address\n", > __func__); > + return; > + } > + > + /* > + * Enable RGMII delay on Tx and Rx for CPU port > + * Ref: sec 4.7.2 of chip datasheet > + */ > + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); > + miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); > + reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); > + miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); > + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); > + > + /* reset the phy */ > + miiphy_reset(name, devadr); > + > + debug("88E1116 Initialized on %s\n", name); > +} > +#endif /* CONFIG_RESET_PHY_R */ > diff --git a/board/cloudengines/pogoplug_e02/pogoplug_e02.h > b/board/cloudengines/pogoplug_e02/pogoplug_e02.h > new file mode 100644 > index 0000000..f61ec80 > --- /dev/null > +++ b/board/cloudengines/pogoplug_e02/pogoplug_e02.h > @@ -0,0 +1,46 @@ > +/* > + * Copyright (C) 2012 > + * David Purdy <david.c.purdy@gmail.com> > + * > + * Based on Kirkwood support: > + * (C) Copyright 2009 > + * Marvell Semiconductor <www.marvell.com> > + * Written-by: Prafulla Wadaskar <prafulla@marvell.com> > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, > + * MA 02110-1301 USA > + */ > + > +#ifndef __POGOPLUG_E02_H > +#define __POGOPLUG_E02_H > + > +/* GPIO configuration */ > +#define POGOPLUG_E02_OE_LOW (~(0)) > +#define POGOPLUG_E02_OE_HIGH (~(0)) > +#define POGOPLUG_E02_OE_VAL_LOW (1 << 29) /* > USB_PWEN low */ > +#define POGOPLUG_E02_OE_VAL_HIGH (0) > + > +/* PHY related */ > +#define MV88E1116_LED_FCTRL_REG 10 > +#define MV88E1116_CPRSP_CR3_REG 21 > +#define MV88E1116_MAC_CTRL_REG 21 > +#define MV88E1116_PGADR_REG 22 > +#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) > +#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) > + > +#endif /* __POGOPLUG_E02_H */ > diff --git a/boards.cfg b/boards.cfg > index 28cc345..3cdf17e 100644 > --- a/boards.cfg > +++ b/boards.cfg > @@ -154,6 +154,7 @@ openrd_ultimate arm arm926ejs > openrd Marvell > rd6281a arm arm926ejs - > Marvell kirkwood > sheevaplug arm arm926ejs - > Marvell kirkwood > dockstar arm arm926ejs - > Seagate kirkwood > +pogoplug_e02 arm arm926ejs - > cloudengines Kirkwood Please maintain an order here too. Regards.. Prafulla . . .
Thank you Prafulla, I supplied 4 responses and some questions ... On Wed, Mar 14, 2012 at 9:23 AM, Prafulla Wadaskar <prafulla@marvell.com> wrote: > > >> -----Original Message----- >> From: David C. Purdy [mailto:david.c.purdy@gmail.com] >> Sent: 14 March 2012 05:47 >> To: u-boot@lists.denx.de >> Cc: Prafulla Wadaskar; albert.u.boot@aribaud.net >> Subject: [PATCH v2] kirkwood: add support for Cloud Engines Pogoplug >> E02 >> >> [PATCH v2] add support for Cloud Engines Pogoplug E02 >> >> This patch adds support for Cloud Engines Pogoplug E02. > 1. > May you please add here a pointer of the board information here? Will this suffice for pointer regarding board information: http://archlinuxarm.org/platforms/armv5/pogoplug-v2-pinkgray ... or do you need something more specific? (not sure what level of detail you wish) > 2. > May you please explain how different this board is if compared to Sheevaplug, Guruplug, DreamPlug ? Sheevaplug - 512MB NAND, 512MB RAM, USB, SD card slot & other differences Guruplug - 512MB NAND, 512MB RAM, USB, SATA & other differences Dreamplug - 2MB NAND, 512MB RAM, Audio, USB, eSATA & other differences Pogoplug E02 - 128MB NAND, 256MB RAM, USB ... actually it is probably closest to the Seagate Dockstar (which is supported in U-Boot stable since 2010.12 IIRC), but there are enough differences that the Dockstar's u-boot binary will not work correctly in the Pogoplug E02. >> >> Signed-off-by: David Purdy <david.c.purdy@gmail.com> >> Cc: prafulla@marvell.com >> Cc: albert.u.boot@aribaud.net >> --- >> Changes for v2: >> - added MAINTAINERS info for pogoplug_e02 >> - fixed format to ensure capture of all files in path >> >> MAINTAINERS | 4 + >> board/cloudengines/pogoplug_e02/Makefile | 49 +++++++ >> board/cloudengines/pogoplug_e02/kwbimage.cfg | 165 > 3. > Is this file 100% clone of existing file on the repository? Or you have modified it further for your board, if not, you can reuse the old one. I may make some modest/minor modifications to it in the future. Perhaps in the GPIO section. For that reason I'd like the pogoE02 to have its own. Does that sound OK? > >> ++++++++++++++++++++++++ >> board/cloudengines/pogoplug_e02/pogoplug_e02.c | 148 >> +++++++++++++++++++++ >> board/cloudengines/pogoplug_e02/pogoplug_e02.h | 46 +++++++ >> boards.cfg | 1 + >> include/configs/pogoplug_e02.h | 123 >> ++++++++++++++++++ >> 7 files changed, 536 insertions(+), 0 deletions(-) >> create mode 100644 board/cloudengines/pogoplug_e02/Makefile >> create mode 100644 board/cloudengines/pogoplug_e02/kwbimage.cfg >> create mode 100644 board/cloudengines/pogoplug_e02/pogoplug_e02.c >> create mode 100644 board/cloudengines/pogoplug_e02/pogoplug_e02.h >> create mode 100644 include/configs/pogoplug_e02.h >> >> diff --git a/MAINTAINERS b/MAINTAINERS >> index 46f63a0..ae65ff3 100644 >> --- a/MAINTAINERS >> +++ b/MAINTAINERS >> @@ -793,6 +793,10 @@ Stelian Pop <stelian@popies.net> >> at91sam9263ek ARM926EJS (AT91SAM9263 SoC) >> at91sam9rlek ARM926EJS (AT91SAM9RL SoC) >> >> +Dave Purdy <david.c.purdy@gmail.com> >> + >> + pogoplug_e02 ARM926EJS (Kirkwood SoC) >> + > 3. > Please maintain the order here? > >> Thierry Reding <thierry.reding@avionic-design.de> >> >> plutux Tegra2 (ARM7 & A9 Dual Core) I'm not at all sure I understand you there. Alphabetically: Pop, Purdy, Reding... all in the ARM section.. >> +#endif /* __POGOPLUG_E02_H */ >> diff --git a/boards.cfg b/boards.cfg >> index 28cc345..3cdf17e 100644 >> --- a/boards.cfg >> +++ b/boards.cfg >> @@ -154,6 +154,7 @@ openrd_ultimate arm arm926ejs >> openrd Marvell >> rd6281a arm arm926ejs - >> Marvell kirkwood >> sheevaplug arm arm926ejs - >> Marvell kirkwood >> dockstar arm arm926ejs - >> Seagate kirkwood >> +pogoplug_e02 arm arm926ejs - >> cloudengines Kirkwood > 4. > Please maintain an order here too. > Yes, I see. If I understand you, this would become: calimain arm arm926ejs calimain omicron davinci pogoplug_e02 arm arm926ejs - cloudengines kirkwood dns325 arm arm926ejs - d-link kirkwood > Regards.. > Prafulla . . . Thanks and regards, Dave
> -----Original Message----- > From: David Purdy [mailto:david.c.purdy@gmail.com] > Sent: 14 March 2012 23:32 > To: Prafulla Wadaskar > Cc: u-boot@lists.denx.de; albert.u.boot@aribaud.net > Subject: Re: [PATCH v2] kirkwood: add support for Cloud Engines > Pogoplug E02 > > Thank you Prafulla, > > I supplied 4 responses and some questions ... > > On Wed, Mar 14, 2012 at 9:23 AM, Prafulla Wadaskar > <prafulla@marvell.com> wrote: > > > > > >> -----Original Message----- > >> From: David C. Purdy [mailto:david.c.purdy@gmail.com] > >> Sent: 14 March 2012 05:47 > >> To: u-boot@lists.denx.de > >> Cc: Prafulla Wadaskar; albert.u.boot@aribaud.net > >> Subject: [PATCH v2] kirkwood: add support for Cloud Engines > Pogoplug > >> E02 > >> > >> [PATCH v2] add support for Cloud Engines Pogoplug E02 > >> > >> This patch adds support for Cloud Engines Pogoplug E02. > > > > 1. > > May you please add here a pointer of the board information here? > > Will this suffice for pointer regarding board information: > > http://archlinuxarm.org/platforms/armv5/pogoplug-v2-pinkgray > > ... or do you need something more specific? (not sure what level of > detail you wish) I think this is enough, please add this link for your next patch version in the patch description. > > > > > > 2. > > May you please explain how different this board is if compared to > Sheevaplug, Guruplug, DreamPlug ? > > Sheevaplug - 512MB NAND, 512MB RAM, USB, SD card slot & other > differences > Guruplug - 512MB NAND, 512MB RAM, USB, SATA & other > differences > Dreamplug - 2MB NAND, 512MB RAM, Audio, USB, eSATA & other > differences > Pogoplug E02 - 128MB NAND, 256MB RAM, USB > > > ... actually it is probably closest to the Seagate Dockstar (which is > supported in U-Boot stable since 2010.12 IIRC), but there are enough > differences that the Dockstar's u-boot binary will not work correctly > in the Pogoplug E02. So in this case, can you use boards/Seagate/dockstar/kwbimage.cfg instead of creating one more similar file? You rest of code will remain as it is. > > >> > >> Signed-off-by: David Purdy <david.c.purdy@gmail.com> > >> Cc: prafulla@marvell.com > >> Cc: albert.u.boot@aribaud.net > >> --- > >> Changes for v2: > >> - added MAINTAINERS info for pogoplug_e02 > >> - fixed format to ensure capture of all files in path > >> > >> MAINTAINERS | 4 + > >> board/cloudengines/pogoplug_e02/Makefile | 49 +++++++ > >> board/cloudengines/pogoplug_e02/kwbimage.cfg | 165 > > > > 3. > > Is this file 100% clone of existing file on the repository? Or you > have modified it further for your board, if not, you can reuse the old > one. > > I may make some modest/minor modifications to it in the future. > Perhaps in the GPIO section. > > For that reason I'd like the pogoE02 to have its own. > Does that sound OK? Intention here is to avoid duplicate code, the framework is created to support this, if kwbimage.cfg can be reused from dockstart project, we can add little code to support your board, in future if there are expansion and updates you can have your own. > > > > > >> ++++++++++++++++++++++++ > >> board/cloudengines/pogoplug_e02/pogoplug_e02.c | 148 > >> +++++++++++++++++++++ > >> board/cloudengines/pogoplug_e02/pogoplug_e02.h | 46 +++++++ > >> boards.cfg | 1 + > >> include/configs/pogoplug_e02.h | 123 > >> ++++++++++++++++++ > >> 7 files changed, 536 insertions(+), 0 deletions(-) > >> create mode 100644 board/cloudengines/pogoplug_e02/Makefile > >> create mode 100644 board/cloudengines/pogoplug_e02/kwbimage.cfg > >> create mode 100644 board/cloudengines/pogoplug_e02/pogoplug_e02.c > >> create mode 100644 board/cloudengines/pogoplug_e02/pogoplug_e02.h > >> create mode 100644 include/configs/pogoplug_e02.h > >> > >> diff --git a/MAINTAINERS b/MAINTAINERS > >> index 46f63a0..ae65ff3 100644 > >> --- a/MAINTAINERS > >> +++ b/MAINTAINERS > >> @@ -793,6 +793,10 @@ Stelian Pop <stelian@popies.net> > >> at91sam9263ek ARM926EJS (AT91SAM9263 SoC) > >> at91sam9rlek ARM926EJS (AT91SAM9RL SoC) > >> > >> +Dave Purdy <david.c.purdy@gmail.com> > >> + > >> + pogoplug_e02 ARM926EJS (Kirkwood SoC) > >> + > > > > > 3. > > Please maintain the order here? > > > >> Thierry Reding <thierry.reding@avionic-design.de> > >> > >> plutux Tegra2 (ARM7 & A9 Dual Core) > > I'm not at all sure I understand you there. Alphabetically: Pop, > Purdy, Reding... > all in the ARM section.. I think you are right here, the MAINTAINERs file structure is bit confusing at some places, mostly order is maintained by second name and you are right here. > > > > >> +#endif /* __POGOPLUG_E02_H */ > >> diff --git a/boards.cfg b/boards.cfg > >> index 28cc345..3cdf17e 100644 > >> --- a/boards.cfg > >> +++ b/boards.cfg > >> @@ -154,6 +154,7 @@ openrd_ultimate arm > arm926ejs > >> openrd Marvell > >> rd6281a arm arm926ejs - > >> Marvell kirkwood > >> sheevaplug arm arm926ejs - > >> Marvell kirkwood > >> dockstar arm arm926ejs - > >> Seagate kirkwood > >> +pogoplug_e02 arm arm926ejs - > >> cloudengines Kirkwood > > > > 4. > > Please maintain an order here too. > > > Yes, I see. If I understand you, this would become: > > calimain arm arm926ejs calimain > omicron davinci > pogoplug_e02 arm arm926ejs - > cloudengines kirkwood > dns325 arm arm926ejs - > d-link Kirkwood Yes, that's correct. Regards.. Prafulla . ..
Hi Prafulla, You comments are very clear and helpful. I'll try to get the v3 patch in sometime over the weekend. thanks & regards, Dave On Thu, Mar 15, 2012 at 3:12 AM, Prafulla Wadaskar <prafulla@marvell.com> wrote: > > >> -----Original Message----- >> From: David Purdy [mailto:david.c.purdy@gmail.com] >> Sent: 14 March 2012 23:32 >> To: Prafulla Wadaskar >> Cc: u-boot@lists.denx.de; albert.u.boot@aribaud.net >> Subject: Re: [PATCH v2] kirkwood: add support for Cloud Engines >> Pogoplug E02 >> >> Thank you Prafulla, >> >> I supplied 4 responses and some questions ... >> >> On Wed, Mar 14, 2012 at 9:23 AM, Prafulla Wadaskar >> <prafulla@marvell.com> wrote: >> > >> > >> >> -----Original Message----- >> >> From: David C. Purdy [mailto:david.c.purdy@gmail.com] >> >> Sent: 14 March 2012 05:47 >> >> To: u-boot@lists.denx.de >> >> Cc: Prafulla Wadaskar; albert.u.boot@aribaud.net >> >> Subject: [PATCH v2] kirkwood: add support for Cloud Engines >> Pogoplug >> >> E02 >> >> >> >> [PATCH v2] add support for Cloud Engines Pogoplug E02 >> >> >> >> This patch adds support for Cloud Engines Pogoplug E02. >> > >> >> 1. >> > May you please add here a pointer of the board information here? >> >> Will this suffice for pointer regarding board information: >> >> http://archlinuxarm.org/platforms/armv5/pogoplug-v2-pinkgray >> >> ... or do you need something more specific? (not sure what level of >> detail you wish) > > I think this is enough, please add this link for your next patch version in the patch description. > >> >> > >> >> >> 2. >> > May you please explain how different this board is if compared to >> Sheevaplug, Guruplug, DreamPlug ? >> >> Sheevaplug - 512MB NAND, 512MB RAM, USB, SD card slot & other >> differences >> Guruplug - 512MB NAND, 512MB RAM, USB, SATA & other >> differences >> Dreamplug - 2MB NAND, 512MB RAM, Audio, USB, eSATA & other >> differences >> Pogoplug E02 - 128MB NAND, 256MB RAM, USB >> >> >> ... actually it is probably closest to the Seagate Dockstar (which is >> supported in U-Boot stable since 2010.12 IIRC), but there are enough >> differences that the Dockstar's u-boot binary will not work correctly >> in the Pogoplug E02. > > So in this case, can you use boards/Seagate/dockstar/kwbimage.cfg instead of creating one more similar file? > > You rest of code will remain as it is. > >> >> >> >> >> Signed-off-by: David Purdy <david.c.purdy@gmail.com> >> >> Cc: prafulla@marvell.com >> >> Cc: albert.u.boot@aribaud.net >> >> --- >> >> Changes for v2: >> >> - added MAINTAINERS info for pogoplug_e02 >> >> - fixed format to ensure capture of all files in path >> >> >> >> MAINTAINERS | 4 + >> >> board/cloudengines/pogoplug_e02/Makefile | 49 +++++++ >> >> board/cloudengines/pogoplug_e02/kwbimage.cfg | 165 >> > >> >> 3. >> > Is this file 100% clone of existing file on the repository? Or you >> have modified it further for your board, if not, you can reuse the old >> one. >> >> I may make some modest/minor modifications to it in the future. >> Perhaps in the GPIO section. >> >> For that reason I'd like the pogoE02 to have its own. >> Does that sound OK? > > Intention here is to avoid duplicate code, the framework is created to support this, if kwbimage.cfg can be reused from dockstart project, we can add little code to support your board, in future if there are expansion and updates you can have your own. > >> >> >> > >> >> ++++++++++++++++++++++++ >> >> board/cloudengines/pogoplug_e02/pogoplug_e02.c | 148 >> >> +++++++++++++++++++++ >> >> board/cloudengines/pogoplug_e02/pogoplug_e02.h | 46 +++++++ >> >> boards.cfg | 1 + >> >> include/configs/pogoplug_e02.h | 123 >> >> ++++++++++++++++++ >> >> 7 files changed, 536 insertions(+), 0 deletions(-) >> >> create mode 100644 board/cloudengines/pogoplug_e02/Makefile >> >> create mode 100644 board/cloudengines/pogoplug_e02/kwbimage.cfg >> >> create mode 100644 board/cloudengines/pogoplug_e02/pogoplug_e02.c >> >> create mode 100644 board/cloudengines/pogoplug_e02/pogoplug_e02.h >> >> create mode 100644 include/configs/pogoplug_e02.h >> >> >> >> diff --git a/MAINTAINERS b/MAINTAINERS >> >> index 46f63a0..ae65ff3 100644 >> >> --- a/MAINTAINERS >> >> +++ b/MAINTAINERS >> >> @@ -793,6 +793,10 @@ Stelian Pop <stelian@popies.net> >> >> at91sam9263ek ARM926EJS (AT91SAM9263 SoC) >> >> at91sam9rlek ARM926EJS (AT91SAM9RL SoC) >> >> >> >> +Dave Purdy <david.c.purdy@gmail.com> >> >> + >> >> + pogoplug_e02 ARM926EJS (Kirkwood SoC) >> >> + >> > >> >> >> 3. >> > Please maintain the order here? >> > >> >> Thierry Reding <thierry.reding@avionic-design.de> >> >> >> >> plutux Tegra2 (ARM7 & A9 Dual Core) >> >> I'm not at all sure I understand you there. Alphabetically: Pop, >> Purdy, Reding... >> all in the ARM section.. > > I think you are right here, the MAINTAINERs file structure is bit confusing at some places, mostly order is maintained by second name and you are right here. > >> >> >> >> >> +#endif /* __POGOPLUG_E02_H */ >> >> diff --git a/boards.cfg b/boards.cfg >> >> index 28cc345..3cdf17e 100644 >> >> --- a/boards.cfg >> >> +++ b/boards.cfg >> >> @@ -154,6 +154,7 @@ openrd_ultimate arm >> arm926ejs >> >> openrd Marvell >> >> rd6281a arm arm926ejs - >> >> Marvell kirkwood >> >> sheevaplug arm arm926ejs - >> >> Marvell kirkwood >> >> dockstar arm arm926ejs - >> >> Seagate kirkwood >> >> +pogoplug_e02 arm arm926ejs - >> >> cloudengines Kirkwood >> > >> >> 4. >> > Please maintain an order here too. >> > >> Yes, I see. If I understand you, this would become: >> >> calimain arm arm926ejs calimain >> omicron davinci >> pogoplug_e02 arm arm926ejs - >> cloudengines kirkwood >> dns325 arm arm926ejs - >> d-link Kirkwood > > Yes, that's correct. > > Regards.. > Prafulla . ..
Hi Prafulla, Just discovered one important thing to let you know regarding the v3 patch that I'll send to you later... I misinterpreted a question you asked regarding "100% clone of existing files in the repo". For instance, boards/Seagate/dockstar/kwbimage.cfg and boards/cloudengines/pogoplug_e02/kwbimage.cfg and pretty much everything else in boards/Seagate/dockstar/ and boards/cloudengines/pogoplug_e02/ differ significantly. There are some similarities w/ many sections, but nevertheless numerous differences. RAM, NAND and GPIO/LED setup all differ, as far as the hardware. So, nothing is 100% clone of existing file in the repo. I have gone ahead and fixed the ordering/alphabetization in boards.cfg, and will supply a URL/link to the pogoplug_e02 board in the description. thanks, regards, Dave On Thu, Mar 15, 2012 at 3:12 AM, Prafulla Wadaskar <prafulla@marvell.com>wrote: > > > > -----Original Message----- > > From: David Purdy [mailto:david.c.purdy@gmail.com] > > Sent: 14 March 2012 23:32 > > To: Prafulla Wadaskar > > Cc: u-boot@lists.denx.de; albert.u.boot@aribaud.net > > Subject: Re: [PATCH v2] kirkwood: add support for Cloud Engines > > Pogoplug E02 > > > > Thank you Prafulla, > > > > I supplied 4 responses and some questions ... > > > > On Wed, Mar 14, 2012 at 9:23 AM, Prafulla Wadaskar > > <prafulla@marvell.com> wrote: > > > > > > > > >> -----Original Message----- > > >> From: David C. Purdy [mailto:david.c.purdy@gmail.com] > > >> Sent: 14 March 2012 05:47 > > >> To: u-boot@lists.denx.de > > >> Cc: Prafulla Wadaskar; albert.u.boot@aribaud.net > > >> Subject: [PATCH v2] kirkwood: add support for Cloud Engines > > Pogoplug > > >> E02 > > >> > > >> [PATCH v2] add support for Cloud Engines Pogoplug E02 > > >> > > >> This patch adds support for Cloud Engines Pogoplug E02. > > > > > > > 1. > > > May you please add here a pointer of the board information here? > > > > Will this suffice for pointer regarding board information: > > > > http://archlinuxarm.org/platforms/armv5/pogoplug-v2-pinkgray > > > > ... or do you need something more specific? (not sure what level of > > detail you wish) > > I think this is enough, please add this link for your next patch version > in the patch description. > > > > > > > > > > > > 2. > > > May you please explain how different this board is if compared to > > Sheevaplug, Guruplug, DreamPlug ? > > > > Sheevaplug - 512MB NAND, 512MB RAM, USB, SD card slot & other > > differences > > Guruplug - 512MB NAND, 512MB RAM, USB, SATA & other > > differences > > Dreamplug - 2MB NAND, 512MB RAM, Audio, USB, eSATA & other > > differences > > Pogoplug E02 - 128MB NAND, 256MB RAM, USB > > > > > > ... actually it is probably closest to the Seagate Dockstar (which is > > supported in U-Boot stable since 2010.12 IIRC), but there are enough > > differences that the Dockstar's u-boot binary will not work correctly > > in the Pogoplug E02. > > So in this case, can you use boards/Seagate/dockstar/kwbimage.cfg instead > of creating one more similar file? > > You rest of code will remain as it is. > > > > > >> > > >> Signed-off-by: David Purdy <david.c.purdy@gmail.com> > > >> Cc: prafulla@marvell.com > > >> Cc: albert.u.boot@aribaud.net > > >> --- > > >> Changes for v2: > > >> - added MAINTAINERS info for pogoplug_e02 > > >> - fixed format to ensure capture of all files in path > > >> > > >> MAINTAINERS | 4 + > > >> board/cloudengines/pogoplug_e02/Makefile | 49 +++++++ > > >> board/cloudengines/pogoplug_e02/kwbimage.cfg | 165 > > > > > > > 3. > > > Is this file 100% clone of existing file on the repository? Or you > > have modified it further for your board, if not, you can reuse the old > > one. > > > > I may make some modest/minor modifications to it in the future. > > Perhaps in the GPIO section. > > > > For that reason I'd like the pogoE02 to have its own. > > Does that sound OK? > > Intention here is to avoid duplicate code, the framework is created to > support this, if kwbimage.cfg can be reused from dockstart project, we can > add little code to support your board, in future if there are expansion and > updates you can have your own. > > > > > > > > > > >> ++++++++++++++++++++++++ > > >> board/cloudengines/pogoplug_e02/pogoplug_e02.c | 148 > > >> +++++++++++++++++++++ > > >> board/cloudengines/pogoplug_e02/pogoplug_e02.h | 46 +++++++ > > >> boards.cfg | 1 + > > >> include/configs/pogoplug_e02.h | 123 > > >> ++++++++++++++++++ > > >> 7 files changed, 536 insertions(+), 0 deletions(-) > > >> create mode 100644 board/cloudengines/pogoplug_e02/Makefile > > >> create mode 100644 board/cloudengines/pogoplug_e02/kwbimage.cfg > > >> create mode 100644 board/cloudengines/pogoplug_e02/pogoplug_e02.c > > >> create mode 100644 board/cloudengines/pogoplug_e02/pogoplug_e02.h > > >> create mode 100644 include/configs/pogoplug_e02.h > > >> > > >> diff --git a/MAINTAINERS b/MAINTAINERS > > >> index 46f63a0..ae65ff3 100644 > > >> --- a/MAINTAINERS > > >> +++ b/MAINTAINERS > > >> @@ -793,6 +793,10 @@ Stelian Pop <stelian@popies.net> > > >> at91sam9263ek ARM926EJS (AT91SAM9263 SoC) > > >> at91sam9rlek ARM926EJS (AT91SAM9RL SoC) > > >> > > >> +Dave Purdy <david.c.purdy@gmail.com> > > >> + > > >> + pogoplug_e02 ARM926EJS (Kirkwood SoC) > > >> + > > > > > > > > > 3. > > > Please maintain the order here? > > > > > >> Thierry Reding <thierry.reding@avionic-design.de> > > >> > > >> plutux Tegra2 (ARM7 & A9 Dual Core) > > > > I'm not at all sure I understand you there. Alphabetically: Pop, > > Purdy, Reding... > > all in the ARM section.. > > I think you are right here, the MAINTAINERs file structure is bit > confusing at some places, mostly order is maintained by second name and you > are right here. > > > > > > > > > >> +#endif /* __POGOPLUG_E02_H */ > > >> diff --git a/boards.cfg b/boards.cfg > > >> index 28cc345..3cdf17e 100644 > > >> --- a/boards.cfg > > >> +++ b/boards.cfg > > >> @@ -154,6 +154,7 @@ openrd_ultimate arm > > arm926ejs > > >> openrd Marvell > > >> rd6281a arm arm926ejs - > > >> Marvell kirkwood > > >> sheevaplug arm arm926ejs - > > >> Marvell kirkwood > > >> dockstar arm arm926ejs - > > >> Seagate kirkwood > > >> +pogoplug_e02 arm arm926ejs - > > >> cloudengines Kirkwood > > > > > > > 4. > > > Please maintain an order here too. > > > > > Yes, I see. If I understand you, this would become: > > > > calimain arm arm926ejs calimain > > omicron davinci > > pogoplug_e02 arm arm926ejs - > > cloudengines kirkwood > > dns325 arm arm926ejs - > > d-link Kirkwood > > Yes, that's correct. > > Regards.. > Prafulla . .. >
diff --git a/MAINTAINERS b/MAINTAINERS index 46f63a0..ae65ff3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -793,6 +793,10 @@ Stelian Pop <stelian@popies.net> at91sam9263ek ARM926EJS (AT91SAM9263 SoC) at91sam9rlek ARM926EJS (AT91SAM9RL SoC) +Dave Purdy <david.c.purdy@gmail.com> + + pogoplug_e02 ARM926EJS (Kirkwood SoC) + Thierry Reding <thierry.reding@avionic-design.de> plutux Tegra2 (ARM7 & A9 Dual Core) diff --git a/board/cloudengines/pogoplug_e02/Makefile b/board/cloudengines/pogoplug_e02/Makefile new file mode 100644 index 0000000..fe92238 --- /dev/null +++ b/board/cloudengines/pogoplug_e02/Makefile @@ -0,0 +1,49 @@ +# +# Copyright (C) 2012 +# David Purdy <david.c.purdy@gmail.com> +# +# Based on Kirkwood support: +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar <prafulla@marvell.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := pogoplug_e02.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/cloudengines/pogoplug_e02/kwbimage.cfg b/board/cloudengines/pogoplug_e02/kwbimage.cfg new file mode 100644 index 0000000..e482f16 --- /dev/null +++ b/board/cloudengines/pogoplug_e02/kwbimage.cfg @@ -0,0 +1,165 @@ +# +# Copyright (C) 2012 +# David Purdy <david.c.purdy@gmail.com> +# +# Based on Kirkwood support: +# (C) Copyright 2009 +# Marvell Semiconductor <www.marvell.com> +# Written-by: Prafulla Wadaskar <prafulla <at> marvell.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM nand +NAND_ECC_MODE default +NAND_PAGE_SIZE 0x0800 + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1b1b1b9b + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000c30 # DDR Configuration register +# bit13-0: 0xc30 (3120 DDR2 clks refresh rate) +# bit23-14: zero +# bit24: 1= enable exit self refresh mode on DDR access +# bit25: 1 required +# bit29-26: zero +# bit31-30: 01 + +DATA 0xFFD01404 0x37543000 # DDR Controller Control Low +# bit 4: 0=addr/cmd in smame cycle +# bit 5: 0=clk is driven during self refresh, we don't care for APX +# bit 6: 0=use recommended falling edge of clk for addr/cmd +# bit14: 0=input buffer always powered up +# bit18: 1=cpu lock transaction enabled +# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 +# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM +# bit30-28: 3 required +# bit31: 0=no additional STARTBURST delay + +DATA 0xFFD01408 0x22125451 # DDR Timing (Low) (active cycles value +1) +# bit3-0: TRAS lsbs +# bit7-4: TRCD +# bit11- 8: TRP +# bit15-12: TWR +# bit19-16: TWTR +# bit20: TRAS msb +# bit23-21: 0x0 +# bit27-24: TRRD +# bit31-28: TRTP + +DATA 0xFFD0140C 0x00000a33 # DDR Timing (High) +# bit6-0: TRFC +# bit8-7: TR2R +# bit10-9: TR2W +# bit12-11: TW2W +# bit31-13: zero required + +DATA 0xFFD01410 0x000000cc # DDR Address Control +# bit1-0: 00, Cs0width=x8 +# bit3-2: 11, Cs0size=1Gb +# bit5-4: 00, Cs1width=x8 +# bit7-6: 11, Cs1size=1Gb +# bit9-8: 00, Cs2width=nonexistent +# bit11-10: 00, Cs2size =nonexistent +# bit13-12: 00, Cs3width=nonexistent +# bit15-14: 00, Cs3size =nonexistent +# bit16: 0, Cs0AddrSel +# bit17: 0, Cs1AddrSel +# bit18: 0, Cs2AddrSel +# bit19: 0, Cs3AddrSel +# bit31-20: 0 required + +DATA 0xFFD01414 0x00000000 # DDR Open Pages Control +# bit0: 0, OpenPage enabled +# bit31-1: 0 required + +DATA 0xFFD01418 0x00000000 # DDR Operation +# bit3-0: 0x0, DDR cmd +# bit31-4: 0 required + +DATA 0xFFD0141C 0x00000C52 # DDR Mode +# bit2-0: 2, BurstLen=2 required +# bit3: 0, BurstType=0 required +# bit6-4: 4, CL=5 +# bit7: 0, TestMode=0 normal +# bit8: 0, DLL reset=0 normal +# bit11-9: 6, auto-precharge write recovery ???????????? +# bit12: 0, PD must be zero +# bit31-13: 0 required + +DATA 0xFFD01420 0x00000040 # DDR Extended Mode +# bit0: 0, DDR DLL enabled +# bit1: 0, DDR drive strenght normal +# bit2: 0, DDR ODT control lsd (disabled) +# bit5-3: 000, required +# bit6: 1, DDR ODT control msb, (disabled) +# bit9-7: 000, required +# bit10: 0, differential DQS enabled +# bit11: 0, required +# bit12: 0, DDR output buffer enabled +# bit31-13: 0 required + +DATA 0xFFD01424 0x0000F17F # DDR Controller Control High +# bit2-0: 111, required +# bit3 : 1 , MBUS Burst Chop disabled +# bit6-4: 111, required +# bit7 : 0 +# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz +# bit9 : 0 , no half clock cycle addition to dataout +# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals +# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh +# bit15-12: 1111 required +# bit31-16: 0 required + +DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) +DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) + +DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size +# bit0: 1, Window enabled +# bit1: 0, Write Protect disabled +# bit3-2: 00, CS0 hit selected +# bit23-4: ones, required +# bit31-24: 0x0F, Size (i.e. 256MB) + +DATA 0xFFD01508 0x10000000 # CS[1]n Base address to 256Mb +DATA 0xFFD0150C 0x00000000 # CS[2]n Size, window disabled + +DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled + +DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low) +DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) +# bit1-0: 00, ODT0 controlled by ODT Control (low) register above +# bit3-2: 01, ODT1 active NEVER! +# bit31-4: zero, required + +DATA 0xFFD0149C 0x0000E803 # CPU ODT Control +DATA 0xFFD01480 0x00000001 # DDR Initialization Control +#bit0=1, enable DDR init upon this register write + +# End of Header extension +DATA 0x0 0x0 diff --git a/board/cloudengines/pogoplug_e02/pogoplug_e02.c b/board/cloudengines/pogoplug_e02/pogoplug_e02.c new file mode 100644 index 0000000..f8e2c46 --- /dev/null +++ b/board/cloudengines/pogoplug_e02/pogoplug_e02.c @@ -0,0 +1,148 @@ +/* + * Copyright (C) 2012 + * David Purdy <david.c.purdy@gmail.com> + * + * Based on Kirkwood support: + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar <prafulla@marvell.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <common.h> +#include <miiphy.h> +#include <asm/arch/kirkwood.h> +#include <asm/arch/mpp.h> +#include <asm/arch/cpu.h> +#include <asm/io.h> +#include "pogoplug_e02.h" + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + kw_config_gpio(POGOPLUG_E02_OE_VAL_LOW, + POGOPLUG_E02_OE_VAL_HIGH, + POGOPLUG_E02_OE_LOW, POGOPLUG_E02_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + u32 kwmpp_config[] = { + MPP0_NF_IO2, + MPP1_NF_IO3, + MPP2_NF_IO4, + MPP3_NF_IO5, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP6_SYSRST_OUTn, + MPP7_GPO, + MPP8_UART0_RTS, + MPP9_UART0_CTS, + MPP10_UART0_TXD, + MPP11_UART0_RXD, + MPP12_SD_CLK, + MPP13_SD_CMD, + MPP14_SD_D0, + MPP15_SD_D1, + MPP16_SD_D2, + MPP17_SD_D3, + MPP18_NF_IO0, + MPP19_NF_IO1, + MPP20_GPIO, + MPP21_GPIO, + MPP22_GPIO, + MPP23_GPIO, + MPP24_GPIO, + MPP25_GPIO, + MPP26_GPIO, + MPP27_GPIO, + MPP28_GPIO, + MPP29_TSMP9, + MPP30_GPIO, + MPP31_GPIO, + MPP32_GPIO, + MPP33_GPIO, + MPP34_GPIO, + MPP35_GPIO, + MPP36_GPIO, + MPP37_GPIO, + MPP38_GPIO, + MPP39_GPIO, + MPP40_GPIO, + MPP41_GPIO, + MPP42_GPIO, + MPP43_GPIO, + MPP44_GPIO, + MPP45_GPIO, + MPP46_GPIO, + MPP47_GPIO, + MPP48_GPIO, + MPP49_GPIO, + 0 + }; + kirkwood_mpp_conf(kwmpp_config); + return 0; +} + +int board_init(void) +{ + /* Boot parameters address */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +/* Configure and initialize PHY */ +void reset_phy(void) +{ + u16 reg; + u16 devadr; + char *name = "egiga0"; + + if (miiphy_set_current_dev(name)) + return; + + /* command to read PHY dev address */ + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { + printf("Err..(%s) could not read PHY dev address\n", __func__); + return; + } + + /* + * Enable RGMII delay on Tx and Rx for CPU port + * Ref: sec 4.7.2 of chip datasheet + */ + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); + miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); + reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); + miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg); + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); + + /* reset the phy */ + miiphy_reset(name, devadr); + + debug("88E1116 Initialized on %s\n", name); +} +#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/cloudengines/pogoplug_e02/pogoplug_e02.h b/board/cloudengines/pogoplug_e02/pogoplug_e02.h new file mode 100644 index 0000000..f61ec80 --- /dev/null +++ b/board/cloudengines/pogoplug_e02/pogoplug_e02.h @@ -0,0 +1,46 @@ +/* + * Copyright (C) 2012 + * David Purdy <david.c.purdy@gmail.com> + * + * Based on Kirkwood support: + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar <prafulla@marvell.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __POGOPLUG_E02_H +#define __POGOPLUG_E02_H + +/* GPIO configuration */ +#define POGOPLUG_E02_OE_LOW (~(0)) +#define POGOPLUG_E02_OE_HIGH (~(0)) +#define POGOPLUG_E02_OE_VAL_LOW (1 << 29) /* USB_PWEN low */ +#define POGOPLUG_E02_OE_VAL_HIGH (0) + +/* PHY related */ +#define MV88E1116_LED_FCTRL_REG 10 +#define MV88E1116_CPRSP_CR3_REG 21 +#define MV88E1116_MAC_CTRL_REG 21 +#define MV88E1116_PGADR_REG 22 +#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) +#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) + +#endif /* __POGOPLUG_E02_H */ diff --git a/boards.cfg b/boards.cfg index 28cc345..3cdf17e 100644 --- a/boards.cfg +++ b/boards.cfg @@ -154,6 +154,7 @@ openrd_ultimate arm arm926ejs openrd Marvell rd6281a arm arm926ejs - Marvell kirkwood sheevaplug arm arm926ejs - Marvell kirkwood dockstar arm arm926ejs - Seagate kirkwood +pogoplug_e02 arm arm926ejs - cloudengines kirkwood jadecpu arm arm926ejs jadecpu syteco mb86r0x mx25pdk arm arm926ejs mx25pdk freescale mx25 mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg tx25 arm arm926ejs tx25 karo mx25 diff --git a/include/configs/pogoplug_e02.h b/include/configs/pogoplug_e02.h new file mode 100644 index 0000000..588a0c3 --- /dev/null +++ b/include/configs/pogoplug_e02.h @@ -0,0 +1,123 @@ +/* + * Copyright (C) 2012 + * David Purdy <david.c.purdy@gmail.com> + * + * Based on Kirkwood support: + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar <prafulla@marvell.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _CONFIG_POGOPLUG_E02_H +#define _CONFIG_POGOPLUG_E02_H + +/* + * Machine definition + */ +#define CONFIG_MACH_POGOPLUG_E02 /* Machine type */ +#define CONFIG_IDENT_STRING "\nPogoplug E02" + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD /* SOC Family Name */ +#define CONFIG_KW88F6281 /* SOC Name */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ + +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ +#include <config_cmd_default.h> +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_MII +#define CONFIG_CMD_NAND +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +/* Remove or override few declarations from mv-common.h */ +#undef CONFIG_SYS_PROMPT /* previously defined in mv-common.h */ +#define CONFIG_SYS_PROMPT "PogoE02> " + +/* + * Environment variables configurations + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K */ +#else +#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ +#endif +/* + * max 4k env size is enough, but in case of nand + * it has to be rounded to sector size + */ +#define CONFIG_ENV_SIZE 0x20000 /* 128k */ +#define CONFIG_ENV_ADDR 0x60000 +#define CONFIG_ENV_OFFSET 0x60000 /* env starts here */ + +/* + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND \ + "setenv bootargs $(bootargs_console); " \ + "run bootcmd_usb; " \ + "bootm 0x00800000 0x01100000" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "mtdparts=mtdparts=orion_nand:1M(u-boot),4M(uImage)," \ + "32M(rootfs),-(data)\0"\ + "mtdids=nand0=orion_nand\0"\ + "bootargs_console=console=ttyS0,115200\0" \ + "bootcmd_usb=usb start; ext2load usb 0:1 0x00800000 /uImage; " \ + "ext2load usb 0:1 0x01100000 /uInitrd\0" + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ +#define CONFIG_PHY_BASE_ADR 0 +#endif /* CONFIG_CMD_NET */ + +/* + * File system + */ +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_RBTREE +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_MTD_PARTITIONS +#define CONFIG_CMD_MTDPARTS +#define CONFIG_LZO +
[PATCH v2] add support for Cloud Engines Pogoplug E02 This patch adds support for Cloud Engines Pogoplug E02. Signed-off-by: David Purdy <david.c.purdy@gmail.com> Cc: prafulla@marvell.com Cc: albert.u.boot@aribaud.net --- Changes for v2: - added MAINTAINERS info for pogoplug_e02 - fixed format to ensure capture of all files in path MAINTAINERS | 4 + board/cloudengines/pogoplug_e02/Makefile | 49 +++++++ board/cloudengines/pogoplug_e02/kwbimage.cfg | 165 ++++++++++++++++++++++++ board/cloudengines/pogoplug_e02/pogoplug_e02.c | 148 +++++++++++++++++++++ board/cloudengines/pogoplug_e02/pogoplug_e02.h | 46 +++++++ boards.cfg | 1 + include/configs/pogoplug_e02.h | 123 ++++++++++++++++++ 7 files changed, 536 insertions(+), 0 deletions(-) create mode 100644 board/cloudengines/pogoplug_e02/Makefile create mode 100644 board/cloudengines/pogoplug_e02/kwbimage.cfg create mode 100644 board/cloudengines/pogoplug_e02/pogoplug_e02.c create mode 100644 board/cloudengines/pogoplug_e02/pogoplug_e02.h create mode 100644 include/configs/pogoplug_e02.h +#endif /* _CONFIG_POGOPLUG_E02_H */