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[SH,committed] PR 113533

Message ID 7f370a21984486ed57cd39b6ab427a1d576604f0.camel@gmail.com
State New
Headers show
Series [SH,committed] PR 113533 | expand

Commit Message

Oleg Endo Oct. 14, 2024, 2:37 a.m. UTC
For memory loads/stores (that contain a MEM rtx) sh_rtx_costs would wrongly
report a cost lower than 1 insn which is not accurate as it makes
loads/stores appear cheaper than simple arithmetic insns.  The cost of a
load/store insn is at least 1 insn plus the cost of the address expression
(some addressing modes can be considered more expensive than others due to
additional constraints).

Tested with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-
mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"

CSiBE set shows a little bit of +/- code size movement due to some insn
reordering.  Difficult to judge whether it's all good or bad.  Doesn't seem
that significant.

Thanks to Roger for the original patch proposal.
Committed to master.


gcc/ChangeLog:

	PR target/113533
	* config/sh/sh.cc (sh_rtx_costs): Adjust cost estimation of MEM rtx
	to be always at least COST_N_INSNS (1).  Forward speed argument to
	sh_address_cost.

Comments

Oleg Endo Oct. 17, 2024, 1:39 p.m. UTC | #1
On Mon, 2024-10-14 at 11:37 +0900, Oleg Endo wrote:
> For memory loads/stores (that contain a MEM rtx) sh_rtx_costs would wrongly
> report a cost lower than 1 insn which is not accurate as it makes
> loads/stores appear cheaper than simple arithmetic insns.  The cost of a
> load/store insn is at least 1 insn plus the cost of the address expression
> (some addressing modes can be considered more expensive than others due to
> additional constraints).
> 
> Tested with make -k check RUNTESTFLAGS="--target_board=sh-sim\{-m2/-ml,-m2/-
> mb,-m2a/-mb,-m4/-ml,-m4/-mb,-m4a/-ml,-m4a/-mb}"
> 
> CSiBE set shows a little bit of +/- code size movement due to some insn
> reordering.  Difficult to judge whether it's all good or bad.  Doesn't seem
> that significant.
> 
> Thanks to Roger for the original patch proposal.
> Committed to master.
> 

The previous patch had a typo.  Committed the attached amendment to master
after re-testing.

Best regards,
Oleg Endo
diff mbox series

Patch

From b717c462b96e7870f8081d2bc330e4749a4b0538 Mon Sep 17 00:00:00 2001
From: Oleg Endo <olegendo@gcc.gnu.org>
Date: Sun, 13 Oct 2024 11:36:38 +0900
Subject: [PATCH] SH: Fix cost estimation of mem load/store

For memory loads/stores (that contain a MEM rtx) sh_rtx_costs would wrongly
report a cost lower than 1 insn which is not accurate as it makes loads/stores
appear cheaper than simple arithmetic insns.  The cost of a load/store insn is
at least 1 insn plus the cost of the address expression (some addressing modes
can be considered more expensive than others due to additional constraints).

gcc/ChangeLog:

	PR target/113533
	* config/sh/sh.cc (sh_rtx_costs): Adjust cost estimation of MEM rtx
	to be always at least COST_N_INSNS (1).  Forward speed argument to
	sh_address_cost.

Co-authored-by: Roger Sayle <roger@nextmovesoftware.com>
---
 gcc/config/sh/sh.cc | 20 +++++++++++++-------
 1 file changed, 13 insertions(+), 7 deletions(-)

diff --git a/gcc/config/sh/sh.cc b/gcc/config/sh/sh.cc
index 7391b8d..6ad202f 100644
--- a/gcc/config/sh/sh.cc
+++ b/gcc/config/sh/sh.cc
@@ -3230,9 +3230,9 @@  multcosts (rtx x ATTRIBUTE_UNUSED)
    scanned.  In either case, *TOTAL contains the cost result.  */
 static bool
 sh_rtx_costs (rtx x, machine_mode mode ATTRIBUTE_UNUSED, int outer_code,
 	      int opno ATTRIBUTE_UNUSED,
-	      int *total, bool speed ATTRIBUTE_UNUSED)
+	      int *total, bool speed)
 {
   int code = GET_CODE (x);
 
   switch (code)
@@ -3263,12 +3263,14 @@  sh_rtx_costs (rtx x, machine_mode mode ATTRIBUTE_UNUSED, int outer_code,
 	  return true;
         }
       return false;
 
-    /* The cost of a mem access is mainly the cost of the address mode.  */
+    /* The cost of a mem access is mainly the cost of the address mode on top
+       of the cost of the load/store insn itself.  */
     case MEM:
       *total = sh_address_cost (XEXP (x, 0), GET_MODE (x), MEM_ADDR_SPACE (x),
-				true);
+				speed)
+	       + COSTS_N_INSNS (1);
       return true;
 
     case IF_THEN_ELSE:
       /* This case is required for the if_then_else negc pattern.  */
@@ -3316,9 +3318,10 @@  sh_rtx_costs (rtx x, machine_mode mode ATTRIBUTE_UNUSED, int outer_code,
       if (MEM_P (XEXP (x, 0)))
 	{
 	  *total = sh_address_cost (XEXP (XEXP (x, 0), 0),
 				    GET_MODE (XEXP (x, 0)),
-				    MEM_ADDR_SPACE (XEXP (x, 0)), true);
+				    MEM_ADDR_SPACE (XEXP (x, 0)), speed)
+		   + COSTS_N_INSNS (1);
 	  return true;
 	}
       return false;
 
@@ -3334,9 +3337,10 @@  sh_rtx_costs (rtx x, machine_mode mode ATTRIBUTE_UNUSED, int outer_code,
 	{
 	  /* Handle SH2A's movu.b and movu.w insn.  */
 	  *total = sh_address_cost (XEXP (XEXP (x, 0), 0), 
 				    GET_MODE (XEXP (x, 0)), 
-				    MEM_ADDR_SPACE (XEXP (x, 0)), true);
+				    MEM_ADDR_SPACE (XEXP (x, 0)), speed)
+		   + COSTS_N_INSNS (1);
 	  return true;
 	}
       return false;
 
@@ -3349,16 +3353,18 @@  sh_rtx_costs (rtx x, machine_mode mode ATTRIBUTE_UNUSED, int outer_code,
 	  if (GET_CODE (xx) == SET && MEM_P (XEXP (xx, 0)))
 	    {
 	      *total = sh_address_cost (XEXP (XEXP (xx, 0), 0), 
 					GET_MODE (XEXP (xx, 0)),
-					MEM_ADDR_SPACE (XEXP (xx, 0)), true);
+					MEM_ADDR_SPACE (XEXP (xx, 0)), speed);
+		       + COSTS_N_INSNS (1);
 	      return true;
 	    }
 	  if (GET_CODE (xx) == SET && MEM_P (XEXP (xx, 1)))
 	    {
 	      *total = sh_address_cost (XEXP (XEXP (xx, 1), 0),
 					GET_MODE (XEXP (xx, 1)),
-					MEM_ADDR_SPACE (XEXP (xx, 1)), true);
+					MEM_ADDR_SPACE (XEXP (xx, 1)), speed);
+		       + COSTS_N_INSNS (1);
 	      return true;
 	    }
 	}
 
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