diff mbox series

[v2,net-next,03/13] dt-bindings: net: add bindings for NETC blocks control

Message ID 20241015125841.1075560-4-wei.fang@nxp.com
State Changes Requested
Headers show
Series add basic support for i.MX95 NETC | expand

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Commit Message

Wei Fang Oct. 15, 2024, 12:58 p.m. UTC 
Add bindings for NXP NETC blocks control. Usually, NETC has 2 blocks of
64KB registers, integrated endpoint register block (IERB) and privileged
register block (PRB). IERB is used for pre-boot initialization for all
NETC devices, such as ENETC, Timer, EMIDO and so on. And PRB controls
global reset and global error handling for NETC. Moreover, for the i.MX
platform, there is also a NETCMIX block for link configuration, such as
MII protocol, PCS protocol, etc.

Signed-off-by: Wei Fang <wei.fang@nxp.com>
---
v2 changes:
1. Rephrase the commit message.
2. Change unevaluatedProperties to additionalProperties.
3. Remove the useless lables from examples.
---
 .../bindings/net/nxp,netc-blk-ctrl.yaml       | 107 ++++++++++++++++++
 1 file changed, 107 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml

Comments

Frank Li Oct. 15, 2024, 3:45 p.m. UTC | #1 
On Tue, Oct 15, 2024 at 08:58:31PM +0800, Wei Fang wrote:
> Add bindings for NXP NETC blocks control. Usually, NETC has 2 blocks of
> 64KB registers, integrated endpoint register block (IERB) and privileged
> register block (PRB). IERB is used for pre-boot initialization for all
> NETC devices, such as ENETC, Timer, EMIDO and so on. And PRB controls
> global reset and global error handling for NETC. Moreover, for the i.MX
> platform, there is also a NETCMIX block for link configuration, such as
> MII protocol, PCS protocol, etc.
>
> Signed-off-by: Wei Fang <wei.fang@nxp.com>
> ---
> v2 changes:
> 1. Rephrase the commit message.
> 2. Change unevaluatedProperties to additionalProperties.
> 3. Remove the useless lables from examples.
> ---
>  .../bindings/net/nxp,netc-blk-ctrl.yaml       | 107 ++++++++++++++++++
>  1 file changed, 107 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
>
> diff --git a/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml b/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
> new file mode 100644
> index 000000000000..18a6ccf6bc2e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
> @@ -0,0 +1,107 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/nxp,netc-blk-ctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NETC Blocks Control
> +
> +description:
> +  Usually, NETC has 2 blocks of 64KB registers, integrated endpoint register
> +  block (IERB) and privileged register block (PRB). IERB is used for pre-boot
> +  initialization for all NETC devices, such as ENETC, Timer, EMIDO and so on.
> +  And PRB controls global reset and global error handling for NETC. Moreover,
> +  for the i.MX platform, there is also a NETCMIX block for link configuration,
> +  such as MII protocol, PCS protocol, etc.
> +
> +maintainers:
> +  - Wei Fang <wei.fang@nxp.com>
> +  - Clark Wang <xiaoning.wang@nxp.com>
> +
> +properties:
> +  compatible:
> +    enum:
> +      - nxp,imx95-netc-blk-ctrl
> +
> +  reg:
> +    minItems: 2
> +    maxItems: 3
> +
> +  reg-names:
> +    minItems: 2
> +    items:
> +      - const: ierb
> +      - const: prb
> +      - const: netcmix

Is 'netcmix'  optional?

Frank

> +
> +  "#address-cells":
> +    const: 2
> +
> +  "#size-cells":
> +    const: 2
> +
> +  ranges: true
> +
> +  clocks:
> +    items:
> +      - description: NETC system clock
> +
> +  clock-names:
> +    items:
> +      - const: ipg_clk
> +
> +  power-domains:
> +    maxItems: 1
> +
> +patternProperties:
> +  "^pcie@[0-9a-f]+$":
> +    $ref: /schemas/pci/host-generic-pci.yaml#
> +
> +required:
> +  - compatible
> +  - "#address-cells"
> +  - "#size-cells"
> +  - reg
> +  - reg-names
> +  - ranges
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    bus {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        netc-blk-ctrl@4cde0000 {
> +            compatible = "nxp,imx95-netc-blk-ctrl";
> +            reg = <0x0 0x4cde0000 0x0 0x10000>,
> +                  <0x0 0x4cdf0000 0x0 0x10000>,
> +                  <0x0 0x4c81000c 0x0 0x18>;
> +            reg-names = "ierb", "prb", "netcmix";
> +            #address-cells = <2>;
> +            #size-cells = <2>;
> +            ranges;
> +            clocks = <&scmi_clk 98>;
> +            clock-names = "ipg_clk";
> +            power-domains = <&scmi_devpd 18>;
> +
> +            pcie@4cb00000 {
> +                compatible = "pci-host-ecam-generic";
> +                reg = <0x0 0x4cb00000 0x0 0x100000>;
> +                #address-cells = <3>;
> +                #size-cells = <2>;
> +                device_type = "pci";
> +                bus-range = <0x1 0x1>;
> +                ranges = <0x82000000 0x0 0x4cce0000  0x0 0x4cce0000  0x0 0x20000
> +                          0xc2000000 0x0 0x4cd10000  0x0 0x4cd10000  0x0 0x10000>;
> +
> +                mdio@0,0 {
> +                    compatible = "pci1131,ee00";
> +                    reg = <0x010000 0 0 0 0>;
> +                    #address-cells = <1>;
> +                    #size-cells = <0>;
> +                };
> +            };
> +        };
> +    };
> --
> 2.34.1
>
Rob Herring Oct. 15, 2024, 10:02 p.m. UTC | #2 
On Tue, Oct 15, 2024 at 08:58:31PM +0800, Wei Fang wrote:
> Add bindings for NXP NETC blocks control. Usually, NETC has 2 blocks of
> 64KB registers, integrated endpoint register block (IERB) and privileged
> register block (PRB). IERB is used for pre-boot initialization for all
> NETC devices, such as ENETC, Timer, EMIDO and so on. And PRB controls

EMIDO or EMDIO? 

> global reset and global error handling for NETC. Moreover, for the i.MX
> platform, there is also a NETCMIX block for link configuration, such as
> MII protocol, PCS protocol, etc.
> 
> Signed-off-by: Wei Fang <wei.fang@nxp.com>
> ---
> v2 changes:
> 1. Rephrase the commit message.
> 2. Change unevaluatedProperties to additionalProperties.
> 3. Remove the useless lables from examples.
> ---
>  .../bindings/net/nxp,netc-blk-ctrl.yaml       | 107 ++++++++++++++++++
>  1 file changed, 107 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
> 
> diff --git a/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml b/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
> new file mode 100644
> index 000000000000..18a6ccf6bc2e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
> @@ -0,0 +1,107 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/nxp,netc-blk-ctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NETC Blocks Control
> +
> +description:
> +  Usually, NETC has 2 blocks of 64KB registers, integrated endpoint register
> +  block (IERB) and privileged register block (PRB). IERB is used for pre-boot
> +  initialization for all NETC devices, such as ENETC, Timer, EMIDO and so on.
> +  And PRB controls global reset and global error handling for NETC. Moreover,
> +  for the i.MX platform, there is also a NETCMIX block for link configuration,
> +  such as MII protocol, PCS protocol, etc.
> +
> +maintainers:
> +  - Wei Fang <wei.fang@nxp.com>
> +  - Clark Wang <xiaoning.wang@nxp.com>
> +
> +properties:
> +  compatible:
> +    enum:
> +      - nxp,imx95-netc-blk-ctrl
> +
> +  reg:
> +    minItems: 2
> +    maxItems: 3
> +
> +  reg-names:
> +    minItems: 2
> +    items:
> +      - const: ierb
> +      - const: prb
> +      - const: netcmix
> +
> +  "#address-cells":
> +    const: 2
> +
> +  "#size-cells":
> +    const: 2
> +
> +  ranges: true
> +
> +  clocks:
> +    items:
> +      - description: NETC system clock

Just 'maxItems: 1' is enough. The description doesn't add much.
> +
> +  clock-names:
> +    items:
> +      - const: ipg_clk

Just 'ipg'

> +
> +  power-domains:
> +    maxItems: 1
> +
> +patternProperties:
> +  "^pcie@[0-9a-f]+$":
> +    $ref: /schemas/pci/host-generic-pci.yaml#
> +
> +required:
> +  - compatible
> +  - "#address-cells"
> +  - "#size-cells"
> +  - reg
> +  - reg-names
> +  - ranges
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    bus {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        netc-blk-ctrl@4cde0000 {
> +            compatible = "nxp,imx95-netc-blk-ctrl";
> +            reg = <0x0 0x4cde0000 0x0 0x10000>,
> +                  <0x0 0x4cdf0000 0x0 0x10000>,
> +                  <0x0 0x4c81000c 0x0 0x18>;
> +            reg-names = "ierb", "prb", "netcmix";
> +            #address-cells = <2>;
> +            #size-cells = <2>;
> +            ranges;
> +            clocks = <&scmi_clk 98>;
> +            clock-names = "ipg_clk";
> +            power-domains = <&scmi_devpd 18>;
> +
> +            pcie@4cb00000 {
> +                compatible = "pci-host-ecam-generic";
> +                reg = <0x0 0x4cb00000 0x0 0x100000>;
> +                #address-cells = <3>;
> +                #size-cells = <2>;
> +                device_type = "pci";
> +                bus-range = <0x1 0x1>;
> +                ranges = <0x82000000 0x0 0x4cce0000  0x0 0x4cce0000  0x0 0x20000
> +                          0xc2000000 0x0 0x4cd10000  0x0 0x4cd10000  0x0 0x10000>;
> +
> +                mdio@0,0 {
> +                    compatible = "pci1131,ee00";
> +                    reg = <0x010000 0 0 0 0>;
> +                    #address-cells = <1>;
> +                    #size-cells = <0>;
> +                };
> +            };
> +        };
> +    };
> -- 
> 2.34.1
>
Wei Fang Oct. 16, 2024, 1:22 a.m. UTC | #3 
> -----Original Message-----
> From: Frank Li <frank.li@nxp.com>
> Sent: 2024年10月15日 23:45
> To: Wei Fang <wei.fang@nxp.com>
> Cc: davem@davemloft.net; edumazet@google.com; kuba@kernel.org;
> pabeni@redhat.com; robh@kernel.org; krzk+dt@kernel.org;
> conor+dt@kernel.org; Vladimir Oltean <vladimir.oltean@nxp.com>; Claudiu
> Manoil <claudiu.manoil@nxp.com>; Clark Wang <xiaoning.wang@nxp.com>;
> christophe.leroy@csgroup.eu; linux@armlinux.org.uk; bhelgaas@google.com;
> horms@kernel.org; imx@lists.linux.dev; netdev@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-pci@vger.kernel.org
> Subject: Re: [PATCH v2 net-next 03/13] dt-bindings: net: add bindings for NETC
> blocks control
> 
> On Tue, Oct 15, 2024 at 08:58:31PM +0800, Wei Fang wrote:
> > Add bindings for NXP NETC blocks control. Usually, NETC has 2 blocks
> > of 64KB registers, integrated endpoint register block (IERB) and
> > privileged register block (PRB). IERB is used for pre-boot
> > initialization for all NETC devices, such as ENETC, Timer, EMIDO and
> > so on. And PRB controls global reset and global error handling for
> > NETC. Moreover, for the i.MX platform, there is also a NETCMIX block
> > for link configuration, such as MII protocol, PCS protocol, etc.
> >
> > Signed-off-by: Wei Fang <wei.fang@nxp.com>
> > ---
> > v2 changes:
> > 1. Rephrase the commit message.
> > 2. Change unevaluatedProperties to additionalProperties.
> > 3. Remove the useless lables from examples.
> > ---
> >  .../bindings/net/nxp,netc-blk-ctrl.yaml       | 107
> ++++++++++++++++++
> >  1 file changed, 107 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
> > b/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
> > new file mode 100644
> > index 000000000000..18a6ccf6bc2e
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
> > @@ -0,0 +1,107 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/net/nxp,netc-blk-ctrl.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: NETC Blocks Control
> > +
> > +description:
> > +  Usually, NETC has 2 blocks of 64KB registers, integrated endpoint
> > +register
> > +  block (IERB) and privileged register block (PRB). IERB is used for
> > +pre-boot
> > +  initialization for all NETC devices, such as ENETC, Timer, EMIDO and so
> on.
> > +  And PRB controls global reset and global error handling for NETC.
> > +Moreover,
> > +  for the i.MX platform, there is also a NETCMIX block for link
> > +configuration,
> > +  such as MII protocol, PCS protocol, etc.
> > +
> > +maintainers:
> > +  - Wei Fang <wei.fang@nxp.com>
> > +  - Clark Wang <xiaoning.wang@nxp.com>
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - nxp,imx95-netc-blk-ctrl
> > +
> > +  reg:
> > +    minItems: 2
> > +    maxItems: 3
> > +
> > +  reg-names:
> > +    minItems: 2
> > +    items:
> > +      - const: ierb
> > +      - const: prb
> > +      - const: netcmix
> 
> Is 'netcmix'  optional?
> 

Yes, currently, NETCMIX is only existed on i.MX platforms.

> 
> > +
> > +  "#address-cells":
> > +    const: 2
> > +
> > +  "#size-cells":
> > +    const: 2
> > +
> > +  ranges: true
> > +
> > +  clocks:
> > +    items:
> > +      - description: NETC system clock
> > +
> > +  clock-names:
> > +    items:
> > +      - const: ipg_clk
> > +
> > +  power-domains:
> > +    maxItems: 1
> > +
> > +patternProperties:
> > +  "^pcie@[0-9a-f]+$":
> > +    $ref: /schemas/pci/host-generic-pci.yaml#
> > +
> > +required:
> > +  - compatible
> > +  - "#address-cells"
> > +  - "#size-cells"
> > +  - reg
> > +  - reg-names
> > +  - ranges
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    bus {
> > +        #address-cells = <2>;
> > +        #size-cells = <2>;
> > +
> > +        netc-blk-ctrl@4cde0000 {
> > +            compatible = "nxp,imx95-netc-blk-ctrl";
> > +            reg = <0x0 0x4cde0000 0x0 0x10000>,
> > +                  <0x0 0x4cdf0000 0x0 0x10000>,
> > +                  <0x0 0x4c81000c 0x0 0x18>;
> > +            reg-names = "ierb", "prb", "netcmix";
> > +            #address-cells = <2>;
> > +            #size-cells = <2>;
> > +            ranges;
> > +            clocks = <&scmi_clk 98>;
> > +            clock-names = "ipg_clk";
> > +            power-domains = <&scmi_devpd 18>;
> > +
> > +            pcie@4cb00000 {
> > +                compatible = "pci-host-ecam-generic";
> > +                reg = <0x0 0x4cb00000 0x0 0x100000>;
> > +                #address-cells = <3>;
> > +                #size-cells = <2>;
> > +                device_type = "pci";
> > +                bus-range = <0x1 0x1>;
> > +                ranges = <0x82000000 0x0 0x4cce0000  0x0
> 0x4cce0000  0x0 0x20000
> > +                          0xc2000000 0x0 0x4cd10000  0x0
> 0x4cd10000
> > + 0x0 0x10000>;
> > +
> > +                mdio@0,0 {
> > +                    compatible = "pci1131,ee00";
> > +                    reg = <0x010000 0 0 0 0>;
> > +                    #address-cells = <1>;
> > +                    #size-cells = <0>;
> > +                };
> > +            };
> > +        };
> > +    };
> > --
> > 2.34.1
> >
Wei Fang Oct. 16, 2024, 2:03 a.m. UTC | #4 
> -----Original Message-----
> From: Rob Herring <robh@kernel.org>
> Sent: 2024年10月16日 6:03
> To: Wei Fang <wei.fang@nxp.com>
> Cc: davem@davemloft.net; edumazet@google.com; kuba@kernel.org;
> pabeni@redhat.com; krzk+dt@kernel.org; conor+dt@kernel.org; Vladimir
> Oltean <vladimir.oltean@nxp.com>; Claudiu Manoil
> <claudiu.manoil@nxp.com>; Clark Wang <xiaoning.wang@nxp.com>; Frank Li
> <frank.li@nxp.com>; christophe.leroy@csgroup.eu; linux@armlinux.org.uk;
> bhelgaas@google.com; horms@kernel.org; imx@lists.linux.dev;
> netdev@vger.kernel.org; devicetree@vger.kernel.org;
> linux-kernel@vger.kernel.org; linux-pci@vger.kernel.org
> Subject: Re: [PATCH v2 net-next 03/13] dt-bindings: net: add bindings for NETC
> blocks control
> 
> On Tue, Oct 15, 2024 at 08:58:31PM +0800, Wei Fang wrote:
> > Add bindings for NXP NETC blocks control. Usually, NETC has 2 blocks
> > of 64KB registers, integrated endpoint register block (IERB) and
> > privileged register block (PRB). IERB is used for pre-boot
> > initialization for all NETC devices, such as ENETC, Timer, EMIDO and
> > so on. And PRB controls
> 
> EMIDO or EMDIO?

Sorry, it should be EMDIO.
> 
> > global reset and global error handling for NETC. Moreover, for the
> > i.MX platform, there is also a NETCMIX block for link configuration,
> > such as MII protocol, PCS protocol, etc.
> >
> > Signed-off-by: Wei Fang <wei.fang@nxp.com>
> > ---
> > v2 changes:
> > 1. Rephrase the commit message.
> > 2. Change unevaluatedProperties to additionalProperties.
> > 3. Remove the useless lables from examples.
> > ---
> >  .../bindings/net/nxp,netc-blk-ctrl.yaml       | 107
> ++++++++++++++++++
> >  1 file changed, 107 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
> > b/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
> > new file mode 100644
> > index 000000000000..18a6ccf6bc2e
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
> > @@ -0,0 +1,107 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id:
> > +  clocks:
> > +    items:
> > +      - description: NETC system clock
> 
> Just 'maxItems: 1' is enough. The description doesn't add much.

Okay, thanks.

> > +
> > +  clock-names:
> > +    items:
> > +      - const: ipg_clk
> 
> Just 'ipg'
> 

Sure, I will change it.

> > +
> > +  power-domains:
> > +    maxItems: 1
> > +
> > +patternProperties:
> > +  "^pcie@[0-9a-f]+$":
> > +    $ref: /schemas/pci/host-generic-pci.yaml#
> > +
> > +required:
> > +  - compatible
> > +  - "#address-cells"
> > +  - "#size-cells"
> > +  - reg
> > +  - reg-names
> > +  - ranges
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    bus {
> > +        #address-cells = <2>;
> > +        #size-cells = <2>;
> > +
> > +        netc-blk-ctrl@4cde0000 {
> > +            compatible = "nxp,imx95-netc-blk-ctrl";
> > +            reg = <0x0 0x4cde0000 0x0 0x10000>,
> > +                  <0x0 0x4cdf0000 0x0 0x10000>,
> > +                  <0x0 0x4c81000c 0x0 0x18>;
> > +            reg-names = "ierb", "prb", "netcmix";
> > +            #address-cells = <2>;
> > +            #size-cells = <2>;
> > +            ranges;
> > +            clocks = <&scmi_clk 98>;
> > +            clock-names = "ipg_clk";
> > +            power-domains = <&scmi_devpd 18>;
> > +
> > +            pcie@4cb00000 {
> > +                compatible = "pci-host-ecam-generic";
> > +                reg = <0x0 0x4cb00000 0x0 0x100000>;
> > +                #address-cells = <3>;
> > +                #size-cells = <2>;
> > +                device_type = "pci";
> > +                bus-range = <0x1 0x1>;
> > +                ranges = <0x82000000 0x0 0x4cce0000  0x0
> 0x4cce0000  0x0 0x20000
> > +                          0xc2000000 0x0 0x4cd10000  0x0
> 0x4cd10000
> > + 0x0 0x10000>;
> > +
> > +                mdio@0,0 {
> > +                    compatible = "pci1131,ee00";
> > +                    reg = <0x010000 0 0 0 0>;
> > +                    #address-cells = <1>;
> > +                    #size-cells = <0>;
> > +                };
> > +            };
> > +        };
> > +    };
> > --
> > 2.34.1
> >
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml b/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
new file mode 100644
index 000000000000..18a6ccf6bc2e
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
@@ -0,0 +1,107 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/nxp,netc-blk-ctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NETC Blocks Control
+
+description:
+  Usually, NETC has 2 blocks of 64KB registers, integrated endpoint register
+  block (IERB) and privileged register block (PRB). IERB is used for pre-boot
+  initialization for all NETC devices, such as ENETC, Timer, EMIDO and so on.
+  And PRB controls global reset and global error handling for NETC. Moreover,
+  for the i.MX platform, there is also a NETCMIX block for link configuration,
+  such as MII protocol, PCS protocol, etc.
+
+maintainers:
+  - Wei Fang <wei.fang@nxp.com>
+  - Clark Wang <xiaoning.wang@nxp.com>
+
+properties:
+  compatible:
+    enum:
+      - nxp,imx95-netc-blk-ctrl
+
+  reg:
+    minItems: 2
+    maxItems: 3
+
+  reg-names:
+    minItems: 2
+    items:
+      - const: ierb
+      - const: prb
+      - const: netcmix
+
+  "#address-cells":
+    const: 2
+
+  "#size-cells":
+    const: 2
+
+  ranges: true
+
+  clocks:
+    items:
+      - description: NETC system clock
+
+  clock-names:
+    items:
+      - const: ipg_clk
+
+  power-domains:
+    maxItems: 1
+
+patternProperties:
+  "^pcie@[0-9a-f]+$":
+    $ref: /schemas/pci/host-generic-pci.yaml#
+
+required:
+  - compatible
+  - "#address-cells"
+  - "#size-cells"
+  - reg
+  - reg-names
+  - ranges
+
+additionalProperties: false
+
+examples:
+  - |
+    bus {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        netc-blk-ctrl@4cde0000 {
+            compatible = "nxp,imx95-netc-blk-ctrl";
+            reg = <0x0 0x4cde0000 0x0 0x10000>,
+                  <0x0 0x4cdf0000 0x0 0x10000>,
+                  <0x0 0x4c81000c 0x0 0x18>;
+            reg-names = "ierb", "prb", "netcmix";
+            #address-cells = <2>;
+            #size-cells = <2>;
+            ranges;
+            clocks = <&scmi_clk 98>;
+            clock-names = "ipg_clk";
+            power-domains = <&scmi_devpd 18>;
+
+            pcie@4cb00000 {
+                compatible = "pci-host-ecam-generic";
+                reg = <0x0 0x4cb00000 0x0 0x100000>;
+                #address-cells = <3>;
+                #size-cells = <2>;
+                device_type = "pci";
+                bus-range = <0x1 0x1>;
+                ranges = <0x82000000 0x0 0x4cce0000  0x0 0x4cce0000  0x0 0x20000
+                          0xc2000000 0x0 0x4cd10000  0x0 0x4cd10000  0x0 0x10000>;
+
+                mdio@0,0 {
+                    compatible = "pci1131,ee00";
+                    reg = <0x010000 0 0 0 0>;
+                    #address-cells = <1>;
+                    #size-cells = <0>;
+                };
+            };
+        };
+    };