Message ID | 20241014101807.2800011-1-chenyangyu@isrc.iscas.ac.cn |
---|---|
State | New |
Headers | show |
Series | RISC-V: Fix feature_bits.c failed to compile on non-Linux targets | expand |
This patch can be dropped. I noticed Kito finally fixed that before committing to master after I submitted this patch. > On Oct 14, 2024, at 18:18, Yangyu Chen <chenyangyu@isrc.iscas.ac.cn> wrote: > > The feature_bits.c file failed to compile on non-Linux targets because > we forgot to remove the __riscv_vendor_feature_bits.vendorID set > when target is not Linux. > > This commit fixed this and also has several improvements including: > - Initialize all data to zero when syscall is not supported. > - Add detailed comments on processing implied extensions. > > Fixes: ca44eb7f6a33 ("RISC-V: Implement __init_riscv_feature_bits, > __riscv_feature_bits, and > __riscv_vendor_feature_bits") > > libgcc/ChangeLog: > > * config/riscv/feature_bits.c (__init_riscv_features_bits_linux): > Remove __riscv_vendor_feature_bits.vendorID set when target is > not Linux, and initialize all data to zero when syscall is not > supported. > > Signed-off-by: Yangyu Chen <chenyangyu@isrc.iscas.ac.cn> > --- > libgcc/config/riscv/feature_bits.c | 19 +++++++++++++++---- > 1 file changed, 15 insertions(+), 4 deletions(-) > > diff --git a/libgcc/config/riscv/feature_bits.c b/libgcc/config/riscv/feature_bits.c > index 9bdbc466fee..44f8eeee4e7 100644 > --- a/libgcc/config/riscv/feature_bits.c > +++ b/libgcc/config/riscv/feature_bits.c > @@ -262,7 +262,15 @@ static void __init_riscv_features_bits_linux () > 0, 0); > > if (res) > - return; > + { > + /* When syscall is not supported, just initialize that into all zeros. */ > + __riscv_feature_bits.length = 0; > + __riscv_vendor_feature_bits.length = 0; > + __riscv_cpu_model.mvendorid = 0; > + __riscv_cpu_model.marchid = 0; > + __riscv_cpu_model.mimpid = 0; > + return; > + } > > const struct riscv_hwprobe hwprobe_mvendorid = hwprobes[0]; > > @@ -290,9 +298,12 @@ static void __init_riscv_features_bits_linux () > } > > const struct riscv_hwprobe hwprobe_ima_ext = hwprobes[4]; > - > /* Every time we add new extensions, we should check if previous extensions > - imply the new extension and set the corresponding bit. */ > + imply the new extension and set the corresponding bit. > + We don't need to handle cases where: > + 1. The new extension implies a previous extension (e.g., Zve32f -> F). > + 2. The extensions imply some other extensions appear in the same release > + version of Linux Kernel (e.g., Zbc - > Zbkc). */ > > if (hwprobe_ima_ext.value & RISCV_HWPROBE_IMA_FD) > { > @@ -397,7 +408,7 @@ __init_riscv_feature_bits () > #ifdef __linux > __init_riscv_features_bits_linux (); > #else > - /* Unsupported, just initlizaed that into all zeros. */ > + /* Unsupported, just initialize that into all zeros. */ > __riscv_feature_bits.length = 0; > __riscv_vendor_feature_bits.length = 0; > __riscv_cpu_model.mvendorid = 0; > -- > 2.45.2
diff --git a/libgcc/config/riscv/feature_bits.c b/libgcc/config/riscv/feature_bits.c index 9bdbc466fee..44f8eeee4e7 100644 --- a/libgcc/config/riscv/feature_bits.c +++ b/libgcc/config/riscv/feature_bits.c @@ -262,7 +262,15 @@ static void __init_riscv_features_bits_linux () 0, 0); if (res) - return; + { + /* When syscall is not supported, just initialize that into all zeros. */ + __riscv_feature_bits.length = 0; + __riscv_vendor_feature_bits.length = 0; + __riscv_cpu_model.mvendorid = 0; + __riscv_cpu_model.marchid = 0; + __riscv_cpu_model.mimpid = 0; + return; + } const struct riscv_hwprobe hwprobe_mvendorid = hwprobes[0]; @@ -290,9 +298,12 @@ static void __init_riscv_features_bits_linux () } const struct riscv_hwprobe hwprobe_ima_ext = hwprobes[4]; - /* Every time we add new extensions, we should check if previous extensions - imply the new extension and set the corresponding bit. */ + imply the new extension and set the corresponding bit. + We don't need to handle cases where: + 1. The new extension implies a previous extension (e.g., Zve32f -> F). + 2. The extensions imply some other extensions appear in the same release + version of Linux Kernel (e.g., Zbc - > Zbkc). */ if (hwprobe_ima_ext.value & RISCV_HWPROBE_IMA_FD) { @@ -397,7 +408,7 @@ __init_riscv_feature_bits () #ifdef __linux __init_riscv_features_bits_linux (); #else - /* Unsupported, just initlizaed that into all zeros. */ + /* Unsupported, just initialize that into all zeros. */ __riscv_feature_bits.length = 0; __riscv_vendor_feature_bits.length = 0; __riscv_cpu_model.mvendorid = 0;
The feature_bits.c file failed to compile on non-Linux targets because we forgot to remove the __riscv_vendor_feature_bits.vendorID set when target is not Linux. This commit fixed this and also has several improvements including: - Initialize all data to zero when syscall is not supported. - Add detailed comments on processing implied extensions. Fixes: ca44eb7f6a33 ("RISC-V: Implement __init_riscv_feature_bits, __riscv_feature_bits, and __riscv_vendor_feature_bits") libgcc/ChangeLog: * config/riscv/feature_bits.c (__init_riscv_features_bits_linux): Remove __riscv_vendor_feature_bits.vendorID set when target is not Linux, and initialize all data to zero when syscall is not supported. Signed-off-by: Yangyu Chen <chenyangyu@isrc.iscas.ac.cn> --- libgcc/config/riscv/feature_bits.c | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-)