| Message ID | 20241011055231.9826-3-kfting@nuvoton.com |
|---|---|
| State | New |
| Headers | show |
| Series | i2c: npcm: read/write operation, checkpatch | expand |
On Fri, Oct 11, 2024 at 01:52:29PM +0800, Tyrone Ting wrote: > From: Tyrone Ting <kfting@nuvoton.com> > > Store the client address earlier since it might get called in > the i2c_recover_bus() logic flow at the early stage of > npcm_i2c_master_xfer(). ... > + /* > + * Previously, the address was stored w/o left-shift by one bit and > + * with that shift in the following call to npcm_i2c_master_start_xmit(). > + * > + * Since there are cases that the i2c_recover_bus() gets called at the > + * early stage of npcm_i2c_master_xfer(), the address is stored with > + * the shift and used in the i2c_recover_bus(). > + * > + * The address is stored from bit 1 to bit 7 in the register for > + * sending the i2c address later so it's left-shifted by 1 bit. > + */ I would rephrase it a bit like /* * Previously, the 7-bit address was stored and being converted to * the address of event in the following call to npcm_i2c_master_start_xmit(). * * Since there are cases that the i2c_recover_bus() gets called at the * early stage of npcm_i2c_master_xfer(), the address of event is stored * and then used in the i2c_recover_bus(). */ (E.g., the last paragraph just describes 101 about I2C 7-bit addresses usage and may be dropped completely.) > + bus->dest_addr = i2c_8bit_addr_from_msg(msg0); ... > + /* > + * Since the transfer might be a read operation, remove the I2C_M_RD flag > + * from the bus->dest_addr for the i2c_recover_bus() call later. > + * > + * The i2c_recover_bus() uses the address in a write direction to recover > + * the i2c bus if some error condition occurs. > + */ > + if (bus->dest_addr & I2C_M_RD) Redundant. > + bus->dest_addr &= ~I2C_M_RD;
Hi Andy: Thank you for your comments. Andy Shevchenko <andriy.shevchenko@linux.intel.com> 於 2024年10月11日 週五 下午7:00寫道： > > On Fri, Oct 11, 2024 at 01:52:29PM +0800, Tyrone Ting wrote: > > From: Tyrone Ting <kfting@nuvoton.com> > > > > Store the client address earlier since it might get called in > > the i2c_recover_bus() logic flow at the early stage of > > npcm_i2c_master_xfer(). > > ... > > > + /* > > + * Previously, the address was stored w/o left-shift by one bit and > > + * with that shift in the following call to npcm_i2c_master_start_xmit(). > > + * > > + * Since there are cases that the i2c_recover_bus() gets called at the > > + * early stage of npcm_i2c_master_xfer(), the address is stored with > > + * the shift and used in the i2c_recover_bus(). > > + * > > + * The address is stored from bit 1 to bit 7 in the register for > > + * sending the i2c address later so it's left-shifted by 1 bit. > > + */ > > I would rephrase it a bit like > > /* > * Previously, the 7-bit address was stored and being converted to > * the address of event in the following call to npcm_i2c_master_start_xmit(). > * > * Since there are cases that the i2c_recover_bus() gets called at the > * early stage of npcm_i2c_master_xfer(), the address of event is stored > * and then used in the i2c_recover_bus(). > */ > > (E.g., the last paragraph just describes 101 about I2C 7-bit addresses usage > and may be dropped completely.) > Understood. I'll modify the comments and remove the last paragraph. > > + bus->dest_addr = i2c_8bit_addr_from_msg(msg0); > > ... > > > + /* > > + * Since the transfer might be a read operation, remove the I2C_M_RD flag > > + * from the bus->dest_addr for the i2c_recover_bus() call later. > > + * > > + * The i2c_recover_bus() uses the address in a write direction to recover > > + * the i2c bus if some error condition occurs. > > + */ > > > + if (bus->dest_addr & I2C_M_RD) > > Redundant. > Just to double check. Is the code "if (bus->dest_addr & I2C_M_RD)" redundant? > > + bus->dest_addr &= ~I2C_M_RD; > > -- > With Best Regards, > Andy Shevchenko > > Thank you again. Regards, Tyrone
On Fri, Oct 11, 2024 at 09:44:42PM +0800, Tyrone Ting wrote: > > On Fri, Oct 11, 2024 at 01:52:29PM +0800, Tyrone Ting wrote: ... > > > + if (bus->dest_addr & I2C_M_RD) > > > > Redundant. > > Just to double check. Is the code "if (bus->dest_addr & I2C_M_RD)" redundant? Yes. > > > + bus->dest_addr &= ~I2C_M_RD;
Hi Andy: Thank you for your feedback. Andy Shevchenko <andriy.shevchenko@linux.intel.com> 於 2024年10月11日 週五 下午9:58寫道： > > On Fri, Oct 11, 2024 at 09:44:42PM +0800, Tyrone Ting wrote: > > > On Fri, Oct 11, 2024 at 01:52:29PM +0800, Tyrone Ting wrote: > > ... > > > > > + if (bus->dest_addr & I2C_M_RD) > > > > > > Redundant. > > > > Just to double check. Is the code "if (bus->dest_addr & I2C_M_RD)" redundant? > > Yes. > > > > > + bus->dest_addr &= ~I2C_M_RD; > > -- > With Best Regards, > Andy Shevchenko > > Have a nice day. Regards, Tyrone
diff --git a/drivers/i2c/busses/i2c-npcm7xx.c b/drivers/i2c/busses/i2c-npcm7xx.c index c96a25d37c14..349492f114e7 100644 --- a/drivers/i2c/busses/i2c-npcm7xx.c +++ b/drivers/i2c/busses/i2c-npcm7xx.c @@ -2155,6 +2155,19 @@ static int npcm_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, } while (time_is_after_jiffies(time_left) && bus_busy); + /* + * Previously, the address was stored w/o left-shift by one bit and + * with that shift in the following call to npcm_i2c_master_start_xmit(). + * + * Since there are cases that the i2c_recover_bus() gets called at the + * early stage of npcm_i2c_master_xfer(), the address is stored with + * the shift and used in the i2c_recover_bus(). + * + * The address is stored from bit 1 to bit 7 in the register for + * sending the i2c address later so it's left-shifted by 1 bit. + */ + bus->dest_addr = i2c_8bit_addr_from_msg(msg0); + /* * Check the BER (bus error) state, when ber_state is true, it means that the module * detects the bus error which is caused by some factor like that the electricity @@ -2165,6 +2178,16 @@ static int npcm_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, * bus is busy. */ if (bus_busy || bus->ber_state) { + /* + * Since the transfer might be a read operation, remove the I2C_M_RD flag + * from the bus->dest_addr for the i2c_recover_bus() call later. + * + * The i2c_recover_bus() uses the address in a write direction to recover + * the i2c bus if some error condition occurs. + */ + if (bus->dest_addr & I2C_M_RD) + bus->dest_addr &= ~I2C_M_RD; + iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); npcm_i2c_reset(bus); i2c_recover_bus(adap); @@ -2172,7 +2195,6 @@ static int npcm_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, } npcm_i2c_init_params(bus); - bus->dest_addr = slave_addr; bus->msgs = msgs; bus->msgs_num = num; bus->cmd_err = 0;