| Message ID | 20240926183111.1324284-2-paulk@sys-base.io |
|---|---|
| State | New |
| Delegated to: | Kever Yang |
| Headers | show |
| Series | [1/4] rockchip: rk3399-roc-pc: Hook sysreset gpio to enable full reset | expand |
Hi Paul, On 9/26/24 8:31 PM, Paul Kocialkowski wrote: > From: Paul Kocialkowski <contact@paulk.fr> > > The reset mechanism used by Linux to reset the SoC is known to only > partially reset the logic. A mechanism is implemented in > rk3399_force_power_on_reset to use a GPIO connected to the PMIC's > over-temperature (OTP) reset pin, which fully resets all logic. > > Hook the associated GPIO where the function expects it to enable this > reset mechanism and avoid any possible side-effect of partially-reset > units. > > Signed-off-by: Paul Kocialkowski <contact@paulk.fr> > --- > arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi > index 43b67991fe5a..cd84269dab48 100644 > --- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi > +++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi > @@ -7,6 +7,10 @@ > #include "rk3399-sdram-lpddr4-100.dtsi" > > / { > + config { > + sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; > + }; > + We've been using this on RK3399 Puma for a while already, and a similar routing can be observed on both boards, therefore: Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Thanks! Quentin
Hi Paul, On 9/26/24 8:31 PM, Paul Kocialkowski wrote: > From: Paul Kocialkowski <contact@paulk.fr> > > The reset mechanism used by Linux to reset the SoC is known to only > partially reset the logic. A mechanism is implemented in > rk3399_force_power_on_reset to use a GPIO connected to the PMIC's > over-temperature (OTP) reset pin, which fully resets all logic. > > Hook the associated GPIO where the function expects it to enable this > reset mechanism and avoid any possible side-effect of partially-reset > units. > > Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Since patches 3 and 4 seems to be a bit controversial, maybe send patches 1 and 2 in a different patch series so those can be merged separately? You may want to have a look at https://lore.kernel.org/u-boot/20241105-rk3399-sysreset-gpio-tpl-v1-0-12caff07a4e4@cherry.de/T/#t too BTW. Cheers, Quentin
Hi, Le Tue 05 Nov 24, 16:38, Quentin Schulz a écrit : > Hi Paul, > > On 9/26/24 8:31 PM, Paul Kocialkowski wrote: > > From: Paul Kocialkowski <contact@paulk.fr> > > > > The reset mechanism used by Linux to reset the SoC is known to only > > partially reset the logic. A mechanism is implemented in > > rk3399_force_power_on_reset to use a GPIO connected to the PMIC's > > over-temperature (OTP) reset pin, which fully resets all logic. > > > > Hook the associated GPIO where the function expects it to enable this > > reset mechanism and avoid any possible side-effect of partially-reset > > units. > > > > Signed-off-by: Paul Kocialkowski <contact@paulk.fr> > > Since patches 3 and 4 seems to be a bit controversial, maybe send patches 1 > and 2 in a different patch series so those can be merged separately? > > You may want to have a look at https://lore.kernel.org/u-boot/20241105-rk3399-sysreset-gpio-tpl-v1-0-12caff07a4e4@cherry.de/T/#t Sounds like a good idea. I should probably wait for your series to get-in and respin a version of just the sysreset patches with the right bootph flags. Cheers, Paul
diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi index 43b67991fe5a..cd84269dab48 100644 --- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi +++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi @@ -7,6 +7,10 @@ #include "rk3399-sdram-lpddr4-100.dtsi" / { + config { + sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; + }; + smbios { compatible = "u-boot,sysinfo-smbios"; smbios { @@ -32,6 +36,10 @@ bootph-pre-ram; }; +&gpio1 { + bootph-pre-ram; +}; + &sdhci { cap-mmc-highspeed; mmc-ddr-1_8v;