| Message ID | 1727148464-14341-2-git-send-email-hongxing.zhu@nxp.com |
|---|---|
| State | New |
| Headers | show |
| Series | A bunch of changes to refine i.MX PCIe driver | expand |
On Tue, Sep 24, 2024 at 11:27:36AM +0800, Richard Zhu wrote: > Add one ref clock for i.MX95 PCIe. Increase clocks' maxItems to 5 and > keep the same restriction with other compatible string. > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> It'd be really good to mention why this clock is appearing now, when it did not before. You're just explaining what you've done, which can be seen in the diff, but not why you did it.
On Tue, Sep 24, 2024 at 11:08:20AM +0100, Conor Dooley wrote: > On Tue, Sep 24, 2024 at 11:27:36AM +0800, Richard Zhu wrote: > > Add one ref clock for i.MX95 PCIe. Increase clocks' maxItems to 5 and > > keep the same restriction with other compatible string. > > > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > > It'd be really good to mention why this clock is appearing now, when it > did not before. You're just explaining what you've done, which can be > seen in the diff, but not why you did it. Previous reference clock of i.MX95 is on when system boot to kernel. But boot firmware change the behavor, so it is off when boot. So it need be turn on when it use. Also it need be turn off/on when suspend and resume. Previous miss this feature. Frank
On Tue, Sep 24, 2024 at 11:23:06AM -0400, Frank Li wrote: > On Tue, Sep 24, 2024 at 11:08:20AM +0100, Conor Dooley wrote: > > On Tue, Sep 24, 2024 at 11:27:36AM +0800, Richard Zhu wrote: > > > Add one ref clock for i.MX95 PCIe. Increase clocks' maxItems to 5 and > > > keep the same restriction with other compatible string. > > > > > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > > > > It'd be really good to mention why this clock is appearing now, when it > > did not before. You're just explaining what you've done, which can be > > seen in the diff, but not why you did it. > > Previous reference clock of i.MX95 is on when system boot to kernel. But > boot firmware change the behavor, so it is off when boot. So it need be > turn on when it use. Also it need be turn off/on when suspend and resume. > Previous miss this feature. Please put this in the commit message Richard. Thanks, Conor.
> -----Original Message----- > From: Conor Dooley <conor@kernel.org> > Sent: 2024年9月25日 0:04 > To: Frank Li <frank.li@nxp.com> > Cc: Hongxing Zhu <hongxing.zhu@nxp.com>; l.stach@pengutronix.de; > kwilczynski@kernel.org; bhelgaas@google.com; lpieralisi@kernel.org; > robh+dt@kernel.org; conor+dt@kernel.org; shawnguo@kernel.org; > krzysztof.kozlowski+dt@linaro.org; festevam@gmail.com; > s.hauer@pengutronix.de; linux-pci@vger.kernel.org; > linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; > devicetree@vger.kernel.org; kernel@pengutronix.de; imx@lists.linux.dev > Subject: Re: [PATCH v1 1/9] dt-bindings: imx6q-pcie: Add ref clock for i.MX95 > PCIe > > On Tue, Sep 24, 2024 at 11:23:06AM -0400, Frank Li wrote: > > On Tue, Sep 24, 2024 at 11:08:20AM +0100, Conor Dooley wrote: > > > On Tue, Sep 24, 2024 at 11:27:36AM +0800, Richard Zhu wrote: > > > > Add one ref clock for i.MX95 PCIe. Increase clocks' maxItems to 5 > > > > and keep the same restriction with other compatible string. > > > > > > > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > > > > > > It'd be really good to mention why this clock is appearing now, when > > > it did not before. You're just explaining what you've done, which > > > can be seen in the diff, but not why you did it. > > > > Previous reference clock of i.MX95 is on when system boot to kernel. > > But boot firmware change the behavor, so it is off when boot. So it > > need be turn on when it use. Also it need be turn off/on when suspend and > resume. > > Previous miss this feature. > > Please put this in the commit message Richard. Hi Conor: Thanks for your comments. Would add these information in the commit message later. Best Regards Richard Zhu > > Thanks, > Conor.
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml index a8b34f58f8f4..cddbe21f99f2 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml @@ -17,11 +17,11 @@ description: properties: clocks: minItems: 3 - maxItems: 4 + maxItems: 5 clock-names: minItems: 3 - maxItems: 4 + maxItems: 5 num-lanes: const: 1 diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index 1e05c560d797..4c76cd3f98a9 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -40,10 +40,11 @@ properties: - description: PCIe PHY clock. - description: Additional required clock entry for imx6sx-pcie, imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep. + - description: PCIe reference clock. clock-names: minItems: 3 - maxItems: 4 + maxItems: 5 interrupts: items: @@ -127,7 +128,7 @@ allOf: then: properties: clocks: - minItems: 4 + maxItems: 4 clock-names: items: - const: pcie @@ -140,11 +141,10 @@ allOf: compatible: enum: - fsl,imx8mq-pcie - - fsl,imx95-pcie then: properties: clocks: - minItems: 4 + maxItems: 4 clock-names: items: - const: pcie @@ -200,6 +200,23 @@ allOf: - const: mstr - const: slv + - if: + properties: + compatible: + enum: + - fsl,imx95-pcie + then: + properties: + clocks: + maxItems: 5 + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_phy + - const: pcie_aux + - const: ref + unevaluatedProperties: false examples:
Add one ref clock for i.MX95 PCIe. Increase clocks' maxItems to 5 and keep the same restriction with other compatible string. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> --- .../bindings/pci/fsl,imx6q-pcie-common.yaml | 4 +-- .../bindings/pci/fsl,imx6q-pcie.yaml | 25 ++++++++++++++++--- 2 files changed, 23 insertions(+), 6 deletions(-)