| Message ID | 20240812220735.3602212-2-sean.anderson@linux.dev |
|---|---|
| State | Changes Requested |
| Delegated to: | Michal Simek |
| Headers | show |
| Series | arm: zynqmp: Initialize some registers at boot | expand |
On 8/13/24 00:07, Sean Anderson wrote: > > Boot devices (QSPI, MMC, NAND, and Ethernet) use secure access for DMA > by default. As this causes problems when using the SMMU [1], configure > them for normal access instead. > > [1] https://support.xilinx.com/s/article/72164 > > Signed-off-by: Sean Anderson <sean.anderson@linux.dev> > --- > > arch/arm/mach-zynqmp/include/mach/hardware.h | 2 ++ > board/xilinx/zynqmp/zynqmp.c | 4 ++++ > 2 files changed, 6 insertions(+) > > diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h > index 8cb6494e52c..f1514d6a869 100644 > --- a/arch/arm/mach-zynqmp/include/mach/hardware.h > +++ b/arch/arm/mach-zynqmp/include/mach/hardware.h > @@ -63,6 +63,8 @@ struct crlapb_regs { > > #define crlapb_base ((struct crlapb_regs *)ZYNQMP_CRL_APB_BASEADDR) > > +#define ZYNQMP_IOU_SECURE_SLCR 0xFF240000 > + > #define ZYNQMP_IOU_SCNTR_SECURE 0xFF260000 > #define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN 0x1 > #define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG 0x2 > diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c > index b4c15b041cc..94a66684af2 100644 > --- a/board/xilinx/zynqmp/zynqmp.c > +++ b/board/xilinx/zynqmp/zynqmp.c > @@ -72,6 +72,10 @@ int __maybe_unused psu_uboot_init(void) > writel(ZYNQMP_PS_SYSMON_ANALOG_BUS_VAL, > ZYNQMP_AMS_PS_SYSMON_ANALOG_BUS); > > + /* Disable secure access for boot devices */ > + writel(0x04920492, ZYNQMP_IOU_SECURE_SLCR); > + writel(0x04920492, ZYNQMP_IOU_SECURE_SLCR + 4); Based on https://docs.amd.com/r/en-US/ug1087-zynq-ultrascale-registers/IOU_AXI_RPRTCN-IOU_SECURE_SLCR-Register there is no definition for bits 27:25 that's why that upper 4 shouldn't be there. Thanks, Michal
On 9/2/24 04:43, Michal Simek wrote: > > > On 8/13/24 00:07, Sean Anderson wrote: >> >> Boot devices (QSPI, MMC, NAND, and Ethernet) use secure access for DMA >> by default. As this causes problems when using the SMMU [1], configure >> them for normal access instead. >> >> [1] https://support.xilinx.com/s/article/72164 >> >> Signed-off-by: Sean Anderson <sean.anderson@linux.dev> >> --- >> >> arch/arm/mach-zynqmp/include/mach/hardware.h | 2 ++ >> board/xilinx/zynqmp/zynqmp.c | 4 ++++ >> 2 files changed, 6 insertions(+) >> >> diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h >> index 8cb6494e52c..f1514d6a869 100644 >> --- a/arch/arm/mach-zynqmp/include/mach/hardware.h >> +++ b/arch/arm/mach-zynqmp/include/mach/hardware.h >> @@ -63,6 +63,8 @@ struct crlapb_regs { >> >> #define crlapb_base ((struct crlapb_regs *)ZYNQMP_CRL_APB_BASEADDR) >> >> +#define ZYNQMP_IOU_SECURE_SLCR 0xFF240000 >> + >> #define ZYNQMP_IOU_SCNTR_SECURE 0xFF260000 >> #define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN 0x1 >> #define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG 0x2 >> diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c >> index b4c15b041cc..94a66684af2 100644 >> --- a/board/xilinx/zynqmp/zynqmp.c >> +++ b/board/xilinx/zynqmp/zynqmp.c >> @@ -72,6 +72,10 @@ int __maybe_unused psu_uboot_init(void) >> writel(ZYNQMP_PS_SYSMON_ANALOG_BUS_VAL, >> ZYNQMP_AMS_PS_SYSMON_ANALOG_BUS); >> >> + /* Disable secure access for boot devices */ >> + writel(0x04920492, ZYNQMP_IOU_SECURE_SLCR); >> + writel(0x04920492, ZYNQMP_IOU_SECURE_SLCR + 4); > > Based on > https://docs.amd.com/r/en-US/ug1087-zynq-ultrascale-registers/IOU_AXI_RPRTCN-IOU_SECURE_SLCR-Register > > there is no definition for bits 27:25 that's why that upper 4 shouldn't be there. OK. Will fix for v2. --Sean
diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h index 8cb6494e52c..f1514d6a869 100644 --- a/arch/arm/mach-zynqmp/include/mach/hardware.h +++ b/arch/arm/mach-zynqmp/include/mach/hardware.h @@ -63,6 +63,8 @@ struct crlapb_regs { #define crlapb_base ((struct crlapb_regs *)ZYNQMP_CRL_APB_BASEADDR) +#define ZYNQMP_IOU_SECURE_SLCR 0xFF240000 + #define ZYNQMP_IOU_SCNTR_SECURE 0xFF260000 #define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN 0x1 #define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG 0x2 diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index b4c15b041cc..94a66684af2 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -72,6 +72,10 @@ int __maybe_unused psu_uboot_init(void) writel(ZYNQMP_PS_SYSMON_ANALOG_BUS_VAL, ZYNQMP_AMS_PS_SYSMON_ANALOG_BUS); + /* Disable secure access for boot devices */ + writel(0x04920492, ZYNQMP_IOU_SECURE_SLCR); + writel(0x04920492, ZYNQMP_IOU_SECURE_SLCR + 4); + /* Delay is required for clocks to be propagated */ udelay(1000000);
Boot devices (QSPI, MMC, NAND, and Ethernet) use secure access for DMA by default. As this causes problems when using the SMMU [1], configure them for normal access instead. [1] https://support.xilinx.com/s/article/72164 Signed-off-by: Sean Anderson <sean.anderson@linux.dev> --- arch/arm/mach-zynqmp/include/mach/hardware.h | 2 ++ board/xilinx/zynqmp/zynqmp.c | 4 ++++ 2 files changed, 6 insertions(+)