diff mbox series

LoongArch: Use iorn and andn standard pattern names for scalar modes.

Message ID 20240727083625.27312-1-chenglulu@loongson.cn
State New
Headers show
Series LoongArch: Use iorn and andn standard pattern names for scalar modes. | expand

Commit Message

Lulu Cheng July 27, 2024, 8:36 a.m. UTC
gcc/ChangeLog:

	* config/loongarch/loongarch.md (<optab>n<mode>): Rename to ...
	(<optab>n<mode>3): This.
---
 gcc/config/loongarch/loongarch.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Xi Ruoyao July 27, 2024, 8:41 a.m. UTC | #1
On Sat, 2024-07-27 at 16:36 +0800, Lulu Cheng wrote:
> gcc/ChangeLog:
> 
> 	* config/loongarch/loongarch.md (<optab>n<mode>): Rename to ...
> 	(<optab>n<mode>3): This.

Ok.

Note that [x]vorn<mode>3 and [x]vandn<mode>3 should be renamed as well.

> ---
>  gcc/config/loongarch/loongarch.md | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md
> index 459ad30b9bb..4e4ddd515c9 100644
> --- a/gcc/config/loongarch/loongarch.md
> +++ b/gcc/config/loongarch/loongarch.md
> @@ -1668,7 +1668,7 @@ (define_insn "*norsi3_internal"
>    [(set_attr "type" "logical")
>     (set_attr "mode" "SI")])
>  
> -(define_insn "<optab>n<mode>"
> +(define_insn "<optab>n<mode>3"
>    [(set (match_operand:X 0 "register_operand" "=r")
>  	(neg_bitwise:X
>  	    (not:X (match_operand:X 1 "register_operand" "r"))
Lulu Cheng July 27, 2024, 8:44 a.m. UTC | #2
在 2024/7/27 下午4:41, Xi Ruoyao 写道:
> On Sat, 2024-07-27 at 16:36 +0800, Lulu Cheng wrote:
>> gcc/ChangeLog:
>>
>> 	* config/loongarch/loongarch.md (<optab>n<mode>): Rename to ...
>> 	(<optab>n<mode>3): This.
> Ok.
>
> Note that [x]vorn<mode>3 and [x]vandn<mode>3 should be renamed as well.

Uh, I just forgot about them, I'm modifying the content of the vector.

Thanks!

>
>> ---
>>   gcc/config/loongarch/loongarch.md | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md
>> index 459ad30b9bb..4e4ddd515c9 100644
>> --- a/gcc/config/loongarch/loongarch.md
>> +++ b/gcc/config/loongarch/loongarch.md
>> @@ -1668,7 +1668,7 @@ (define_insn "*norsi3_internal"
>>     [(set_attr "type" "logical")
>>      (set_attr "mode" "SI")])
>>   
>> -(define_insn "<optab>n<mode>"
>> +(define_insn "<optab>n<mode>3"
>>     [(set (match_operand:X 0 "register_operand" "=r")
>>   	(neg_bitwise:X
>>   	    (not:X (match_operand:X 1 "register_operand" "r"))
Andrew Pinski July 27, 2024, 7:27 p.m. UTC | #3
On Sat, Jul 27, 2024 at 1:38 AM Lulu Cheng <chenglulu@loongson.cn> wrote:
>
> gcc/ChangeLog:
>
>         * config/loongarch/loongarch.md (<optab>n<mode>): Rename to ...
>         (<optab>n<mode>3): This.


Thanks for doing this for loongarch. Once I finish up my patch set;
loongarch should get benefit. Also it might be useful after my patch
set goes in that a loongarch specific testcases are added too. I
estimate by the end of this coming week when it will be done/approved
but that is just an estimate.

Thanks,
Andrew

> ---
>  gcc/config/loongarch/loongarch.md | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md
> index 459ad30b9bb..4e4ddd515c9 100644
> --- a/gcc/config/loongarch/loongarch.md
> +++ b/gcc/config/loongarch/loongarch.md
> @@ -1668,7 +1668,7 @@ (define_insn "*norsi3_internal"
>    [(set_attr "type" "logical")
>     (set_attr "mode" "SI")])
>
> -(define_insn "<optab>n<mode>"
> +(define_insn "<optab>n<mode>3"
>    [(set (match_operand:X 0 "register_operand" "=r")
>         (neg_bitwise:X
>             (not:X (match_operand:X 1 "register_operand" "r"))
> --
> 2.39.3
>
diff mbox series

Patch

diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md
index 459ad30b9bb..4e4ddd515c9 100644
--- a/gcc/config/loongarch/loongarch.md
+++ b/gcc/config/loongarch/loongarch.md
@@ -1668,7 +1668,7 @@  (define_insn "*norsi3_internal"
   [(set_attr "type" "logical")
    (set_attr "mode" "SI")])
 
-(define_insn "<optab>n<mode>"
+(define_insn "<optab>n<mode>3"
   [(set (match_operand:X 0 "register_operand" "=r")
 	(neg_bitwise:X
 	    (not:X (match_operand:X 1 "register_operand" "r"))