| Message ID | 20240725100534.5374-1-oliver.rhodes.aj@renesas.com |
|---|---|
| Headers | show |
| Series | Document r8a774a3 SoC bindings | expand |
On 25/07/2024 12:05, Oliver Rhodes wrote: > Hi all, > > This patch series updates the renesas DT bindings documentation for core > components (SoC, SYSC, reset, clk, pinctrl, scif) on the RZ/G2M v3.0 (R8A774A3) SoC. > This SoC is similar to R-CAR M3-W+ (R8A77961) SoC. > > v2->v2 resend: > * Updated the patch description for patch #3 So it is a v3? Otherwise which v2 tools will pick up? Best regards, Krzysztof
Hi Krzysztof, Thank you for your comment. > -----Original Message----- > From: Krzysztof Kozlowski <krzk@kernel.org> > Sent: Thursday, July 25, 2024 4:01 PM > Subject: Re: [PATCH V2 0/6] Document r8a774a3 SoC bindings > > On 25/07/2024 12:05, Oliver Rhodes wrote: > > Hi all, > > > > This patch series updates the renesas DT bindings documentation for > > core components (SoC, SYSC, reset, clk, pinctrl, scif) on the RZ/G2M v3.0 > (R8A774A3) SoC. > > This SoC is similar to R-CAR M3-W+ (R8A77961) SoC. > > > > v2->v2 resend: > > * Updated the patch description for patch #3 > > So it is a v3? Otherwise which v2 tools will pick up? The reason for this patch series is that there was a typo in the change history for patch #3. This is supposed to be "v2 resend" but by mistake I sent this as "v2". Shall I send this patch series as "v3"? I apologise for the noise and the inconvenience I have caused. I will take greater care next time. Thank you, Oliver
Hi Oliver, On Thu, Jul 25, 2024 at 5:22 PM Oliver Rhodes <oliver.rhodes.aj@renesas.com> wrote: > > -----Original Message----- > > From: Krzysztof Kozlowski <krzk@kernel.org> > > Sent: Thursday, July 25, 2024 4:01 PM > > Subject: Re: [PATCH V2 0/6] Document r8a774a3 SoC bindings > > > > On 25/07/2024 12:05, Oliver Rhodes wrote: > > > This patch series updates the renesas DT bindings documentation for > > > core components (SoC, SYSC, reset, clk, pinctrl, scif) on the RZ/G2M v3.0 > > (R8A774A3) SoC. > > > This SoC is similar to R-CAR M3-W+ (R8A77961) SoC. > > > > > > v2->v2 resend: > > > * Updated the patch description for patch #3 > > > > So it is a v3? Otherwise which v2 tools will pick up? > The reason for this patch series is that there was a typo in the > change history for patch #3. > This is supposed to be "v2 resend" but by mistake I sent this as "v2". > Shall I send this patch series as "v3"? Apparently b4 can distinguish fine between the original and the resend, so for now there is no hard reason to send a v3. > I apologise for the noise and the inconvenience I have caused. > I will take greater care next time. Thanks! Gr{oetje,eeting}s, Geert
Hi all, This patch series updates the renesas DT bindings documentation for core components (SoC, SYSC, reset, clk, pinctrl, scif) on the RZ/G2M v3.0 (R8A774A3) SoC. This SoC is similar to R-CAR M3-W+ (R8A77961) SoC. v2->v2 resend: * Updated the patch description for patch #3 v1 resend->v2: * Added ack from Rob Herring for patches #1 and #2 * Updated the commit descriptions for patches #2 and #3, as suggested by Conor Dooley v1->v1 resend: * Fixed the commit header for patch #4. Oliver Rhodes (6): dt-bindings: soc: renesas: Document RZ/G2M v3.0 (r8a774a3) SoC dt-bindings: power: renesas: Document RZ/G2M v3.0 (r8a774a3) SYSC binding dt-bindings: clock: renesas: Document RZ/G2M v3.0 (r8a774a3) clock dt-bindings: reset: renesas: Document RZ/G2M v3.0 (r8a774a3) reset module dt-bindings: serial: renesas: Document RZ/G2M v3.0 (r8a774a3) scif dt-bindings: pinctrl: renesas: Document RZ/G2M v3.0 (r8a774a3) PFC support .../devicetree/bindings/clock/renesas,cpg-mssr.yaml | 1 + .../devicetree/bindings/pinctrl/renesas,pfc.yaml | 1 + .../devicetree/bindings/power/renesas,rcar-sysc.yaml | 1 + .../devicetree/bindings/reset/renesas,rst.yaml | 1 + .../devicetree/bindings/serial/renesas,scif.yaml | 1 + .../devicetree/bindings/soc/renesas/renesas.yaml | 12 ++++++++++++ 6 files changed, 17 insertions(+)