[v4,0/3] riscv: sophgo: add thermal sensor support for cv180x/sg200x SoCs

Message ID	SEYPR01MB422158B2766DA03728AD90CBD7A22@SEYPR01MB4221.apcprd01.prod.exchangelabs.com
Headers	show Return-Path: <devicetree+bounces-86028-incoming-dt=patchwork.ozlabs.org@vger.kernel.org> From: Haylen Chu <heylenay@outlook.com> To: "Rafael J. Wysocki" <rafael@kernel.org>, Daniel Lezcano <daniel.lezcano@linaro.org>, Zhang Rui <rui.zhang@intel.com>, Lukasz Luba <lukasz.luba@arm.com>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Chen Wang <unicorn_wang@outlook.com>, Inochi Amaoto <inochiama@outlook.com>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Jisheng Zhang <jszhang@kernel.org> Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Haylen Chu <heylenay@outlook.com> Subject: [PATCH v4 0/3] riscv: sophgo: add thermal sensor support for cv180x/sg200x SoCs Date: Tue, 16 Jul 2024 09:40:42 +0000 Message-ID: <SEYPR01MB422158B2766DA03728AD90CBD7A22@SEYPR01MB4221.apcprd01.prod.exchangelabs.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain Precedence: bulk MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1
Series	riscv: sophgo: add thermal sensor support for cv180x/sg200x SoCs \| expand [v4,0/3] riscv: sophgo: add thermal sensor support for cv180x/sg200x SoCs [v4,1/3] dt-bindings: thermal: sophgo,cv1800-thermal: Add Sophgo CV1800 thermal

Haylen Chu July 16, 2024, 9:40 a.m. UTC

This series implements driver for Sophgo cv180x/sg200x on-chip thermal
sensor and adds thermal zones for CV1800B SoCs.

Changed from v3:
1. style improvments
2. drop unnecessary dt parameters for simplicity

Changed from v2:
1. style and code improvements
2. use human-readable value for sensor parameters

Changed from v1:
1. style and code improvements
2. make sample parameters configurable
3. generalize document temperature calculating formula

Haylen Chu (3):
  dt-bindings: thermal: sophgo,cv1800-thermal: Add Sophgo CV1800 thermal
  riscv: dts: sophgo: cv18xx: Add sensor device and thermal zone
  thermal: cv180x: Add cv180x thermal driver support

 .../thermal/sophgo,cv1800-thermal.yaml        |  55 ++++
 arch/riscv/boot/dts/sophgo/cv1800b.dtsi       |  30 +++
 arch/riscv/boot/dts/sophgo/cv18xx.dtsi        |   8 +
 drivers/thermal/Kconfig                       |   6 +
 drivers/thermal/Makefile                      |   1 +
 drivers/thermal/cv180x_thermal.c              | 241 ++++++++++++++++++
 6 files changed, 341 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/thermal/sophgo,cv1800-thermal.yaml
 create mode 100644 drivers/thermal/cv180x_thermal.c

Chen Wang July 16, 2024, 12:31 p.m. UTC | #1

On 2024/7/16 17:42, Haylen Chu wrote:
> Add common sensor device Sophgo CV18xx SoCs and thermal zone for
> CV1800b SoCs.
>
> Signed-off-by: Haylen Chu <heylenay@outlook.com>
> ---
>   arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 30 +++++++++++++++++++++++++
>   arch/riscv/boot/dts/sophgo/cv18xx.dtsi  |  8 +++++++
>   2 files changed, 38 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> index ec9530972ae2..0b5c7bc94b05 100644
> --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> @@ -12,6 +12,34 @@ memory@80000000 {
>   		device_type = "memory";
>   		reg = <0x80000000 0x4000000>;
>   	};
> +
> +	thermal-zones {
> +		soc-thermal {
> +			polling-delay-passive   = <1000>;
> +			polling-delay           = <1000>;
> +			thermal-sensors         = <&soc_temp>;
> +
> +			trips {
> +				soc_passive: soc-passive {
> +					temperature     = <75000>;
> +					hysteresis      = <5000>;
> +					type            = "passive";
> +				};
> +
> +				soc_hot: soc-hot {
> +					temperature     = <85000>;
> +					hysteresis      = <5000>;
> +					type            = "hot";
> +				};
> +
> +				soc_critical: soc-critical {
> +					temperature     = <100000>;
> +					hysteresis      = <0>;
> +					type            = "critical";
> +				};
> +			};
> +		};
> +	};
>   };
>   
>   &plic {
> @@ -25,3 +53,5 @@ &clint {
>   &clk {
>   	compatible = "sophgo,cv1800-clk";
>   };
> +
> +
> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> index 891932ae470f..76b02cc279aa 100644
> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> @@ -310,5 +310,13 @@ clint: timer@74000000 {
>   			reg = <0x74000000 0x10000>;
>   			interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
>   		};
> +
> +		soc_temp: thermal-sensor@30e0000 {

Nodes on any bus, thus using unit addresses for children, shall be 
ordered by unit address in ascending order.

See https://docs.kernel.org/devicetree/bindings/dts-coding-style.html.

> +			compatible = "sophgo,cv1800-thermal";
> +			reg = <0x30e0000 0x100>;
> +			clocks = <&clk CLK_TEMPSEN>;
> +			interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
> +			#thermal-sensor-cells = <0>;
> +		};
>   	};
>   };

Chen Wang July 16, 2024, 12:48 p.m. UTC | #2

On 2024/7/16 17:42, Haylen Chu wrote:
> Add support for cv180x SoCs integrated thermal sensors.
>
> Signed-off-by: Haylen Chu <heylenay@outlook.com>
> ---
>   drivers/thermal/Kconfig          |   6 +
>   drivers/thermal/Makefile         |   1 +
>   drivers/thermal/cv180x_thermal.c | 241 +++++++++++++++++++++++++++++++
>   3 files changed, 248 insertions(+)
>   create mode 100644 drivers/thermal/cv180x_thermal.c
cv18xx_thermal.c ? See my comments in patch 1. When you deicide it, 
update this for all patches.
>
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index 204ed89a3ec9..f53c973a361d 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -514,4 +514,10 @@ config LOONGSON2_THERMAL
>   	  is higher than the high temperature threshold or lower than the low
>   	  temperature threshold, the interrupt will occur.
>   
> +config CV180X_THERMAL
Same question above, CV18XX_THERMAL?
> +	tristate "Temperature sensor driver for Sophgo CV180X"
> +	help
> +	  If you say yes here you get support for thermal sensor integrated in
> +	  Sophgo CV180X SoCs.
> +
>   endif
> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> index 5cdf7d68687f..5b59bde8a579 100644
> --- a/drivers/thermal/Makefile
> +++ b/drivers/thermal/Makefile
> @@ -65,3 +65,4 @@ obj-$(CONFIG_AMLOGIC_THERMAL)     += amlogic_thermal.o
>   obj-$(CONFIG_SPRD_THERMAL)	+= sprd_thermal.o
>   obj-$(CONFIG_KHADAS_MCU_FAN_THERMAL)	+= khadas_mcu_fan.o
>   obj-$(CONFIG_LOONGSON2_THERMAL)	+= loongson2_thermal.o
> +obj-$(CONFIG_CV180X_THERMAL)	+= cv180x_thermal.o
> diff --git a/drivers/thermal/cv180x_thermal.c b/drivers/thermal/cv180x_thermal.c
> new file mode 100644
> index 000000000000..8b726c0ad848
> --- /dev/null
> +++ b/drivers/thermal/cv180x_thermal.c
> @@ -0,0 +1,241 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2021 Sophgo Inc.
> + * Copyright (C) 2024 Haylen Chu <heylenay@outlook.com>
> + */
> +
> +#include <linux/bits.h>
> +#include <linux/clk.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/thermal.h>
> +
> +#define TEMPSEN_VERSION					0x0
> +#define TEMPSEN_CTRL					0x4
> +#define  TEMPSEN_CTRL_EN				BIT(0)
> +#define  TEMPSEN_CTRL_SEL_MASK				GENMASK(7, 4)
> +#define  TEMPSEN_CTRL_SEL_OFFSET			4
> +#define TEMPSEN_STATUS					0x8
> +#define TEMPSEN_SET					0xc
> +#define  TEMPSEN_SET_CHOPSEL_MASK			GENMASK(5, 4)
> +#define  TEMPSEN_SET_CHOPSEL_OFFSET			4
> +#define  TEMPSEN_SET_CHOPSEL_128T			0
> +#define  TEMPSEN_SET_CHOPSEL_256T			1
> +#define  TEMPSEN_SET_CHOPSEL_512T			2
> +#define  TEMPSEN_SET_CHOPSEL_1024T			3
> +#define  TEMPSEN_SET_ACCSEL_MASK			GENMASK(7, 6)
> +#define  TEMPSEN_SET_ACCSEL_OFFSET			6
> +#define  TEMPSEN_SET_ACCSEL_512T			0
> +#define  TEMPSEN_SET_ACCSEL_1024T			1
> +#define  TEMPSEN_SET_ACCSEL_2048T			2
> +#define  TEMPSEN_SET_ACCSEL_4096T			3
> +#define  TEMPSEN_SET_CYC_CLKDIV_MASK			GENMASK(15, 8)
> +#define  TEMPSEN_SET_CYC_CLKDIV_OFFSET			8
> +#define TEMPSEN_INTR_EN					0x10
> +#define TEMPSEN_INTR_CLR				0x14
> +#define TEMPSEN_INTR_STA				0x18
> +#define TEMPSEN_INTR_RAW				0x1c
> +#define TEMPSEN_RESULT(n)				(0x20 + (n) * 4)
> +#define  TEMPSEN_RESULT_RESULT_MASK			GENMASK(12, 0)
> +#define  TEMPSEN_RESULT_MAX_RESULT_MASK			GENMASK(28, 16)
> +#define  TEMPSEN_RESULT_CLR_MAX_RESULT			BIT(31)
> +#define TEMPSEN_AUTO_PERIOD				0x64
> +#define  TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_MASK		GENMASK(23, 0)
> +#define  TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_OFFSET		0
> +
> +struct cv180x_thermal_zone {
> +	struct device *dev;
> +	void __iomem *base;
> +	struct clk *clk_tempsen;
> +	u32 sample_cycle;
> +};
> +
> +static void cv180x_thermal_init(struct cv180x_thermal_zone *ctz)
> +{
> +	void __iomem *base = ctz->base;
> +	u32 regval;
> +
> +	writel(readl(base + TEMPSEN_INTR_RAW), base + TEMPSEN_INTR_CLR);
> +	writel(TEMPSEN_RESULT_CLR_MAX_RESULT, base + TEMPSEN_RESULT(0));
> +
> +	regval = readl(base + TEMPSEN_SET);
> +	regval &= ~TEMPSEN_SET_CHOPSEL_MASK;
> +	regval &= ~TEMPSEN_SET_ACCSEL_MASK;
> +	regval &= ~TEMPSEN_SET_CYC_CLKDIV_MASK;
> +	regval |= TEMPSEN_SET_CHOPSEL_1024T << TEMPSEN_SET_CHOPSEL_OFFSET;
> +	regval |= TEMPSEN_SET_ACCSEL_2048T << TEMPSEN_SET_ACCSEL_OFFSET;
> +	regval |= 0x31 << TEMPSEN_SET_CYC_CLKDIV_OFFSET;
> +	writel(regval, base + TEMPSEN_SET);
> +
> +	regval = readl(base + TEMPSEN_AUTO_PERIOD);
> +	regval &= ~TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_MASK;
> +	regval |= ctz->sample_cycle << TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_OFFSET;
> +	writel(regval, base + TEMPSEN_AUTO_PERIOD);
> +
> +	regval = readl(base + TEMPSEN_CTRL);
> +	regval &= ~TEMPSEN_CTRL_SEL_MASK;
> +	regval |= 1 << TEMPSEN_CTRL_SEL_OFFSET;
> +	regval |= TEMPSEN_CTRL_EN;
> +	writel(regval, base + TEMPSEN_CTRL);
> +}
> +
> +static void cv180x_thermal_deinit(struct cv180x_thermal_zone *ct)
> +{
> +	void __iomem *base = ct->base;
> +	u32 regval;
> +
> +	regval = readl(base + TEMPSEN_CTRL);
> +	regval &= ~(TEMPSEN_CTRL_SEL_MASK | TEMPSEN_CTRL_EN);
> +	writel(regval, base + TEMPSEN_CTRL);
> +
> +	writel(readl(base + TEMPSEN_INTR_RAW), base + TEMPSEN_INTR_CLR);
> +}
> +
> +/*
> + *	Raw register value to temperature (mC) formula:
> + *
> + *		       read_val * 1000 * 716
> + *	Temperature = ----------------------- - 273000
> + *				divider
> + *
> + *	where divider should be ticks number of accumulation period,
> + *	e.g. 2048 for TEMPSEN_CTRL_ACCSEL_2048T
> + */
> +static int cv180x_calc_temp(struct cv180x_thermal_zone *ctz, u32 result)
> +{
> +	return (result * 1000) * 716 / 2048 - 273000;
> +}
> +
> +static int cv180x_get_temp(struct thermal_zone_device *tdev, int *temperature)
> +{
> +	struct cv180x_thermal_zone *ctz = thermal_zone_device_priv(tdev);
> +	void __iomem *base = ctz->base;
> +	u32 result;
> +
> +	result = readl(base + TEMPSEN_RESULT(0)) & TEMPSEN_RESULT_RESULT_MASK;
> +	*temperature = cv180x_calc_temp(ctz, result);
> +
> +	return 0;
> +}
> +
> +static const struct thermal_zone_device_ops cv180x_thermal_ops = {
> +	.get_temp = cv180x_get_temp,
> +};
> +
> +static const struct of_device_id cv180x_thermal_of_match[] = {
> +	{ .compatible = "sophgo,cv1800-thermal" },
> +	{},
> +};
> +MODULE_DEVICE_TABLE(of, cv180x_thermal_of_match);
> +
> +static int
> +cv180x_parse_dt(struct cv180x_thermal_zone *ctz)
> +{
> +	struct device_node *np = ctz->dev->of_node;
> +	u32 tmp;
> +
> +	if (of_property_read_u32(np, "sample-rate-hz", &tmp)) {
> +		ctz->sample_cycle = 1000000;
> +	} else {
> +		/* sample cycle should be at least 524us */
> +		if (tmp > 1000000 / 524) {
> +			dev_err(ctz->dev, "invalid sample rate %d\n", tmp);
> +			return -EINVAL;
> +		}
> +
> +		ctz->sample_cycle = 1000000 / tmp;
> +	}
> +
> +	return 0;
> +}
> +
> +static int cv180x_thermal_probe(struct platform_device *pdev)
> +{
> +	struct cv180x_thermal_zone *ctz;
> +	struct thermal_zone_device *tz;
> +	struct resource *res;
> +	int ret;
> +
> +	ctz = devm_kzalloc(&pdev->dev, sizeof(*ctz), GFP_KERNEL);
> +	if (!ctz)
> +		return -ENOMEM;
> +
> +	ctz->dev = &pdev->dev;
> +
> +	ret = cv180x_parse_dt(ctz);
> +	if (ret)
> +		return dev_err_probe(&pdev->dev, ret, "failed to parse dt\n");
> +
> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	ctz->base = devm_ioremap_resource(&pdev->dev, res);
> +	if (IS_ERR(ctz->base))
> +		return dev_err_probe(&pdev->dev, PTR_ERR(ctz->base),
> +				     "failed to map tempsen registers\n");
> +
> +	ctz->clk_tempsen = devm_clk_get_enabled(&pdev->dev, NULL);
> +	if (IS_ERR(ctz->clk_tempsen))
> +		return dev_err_probe(&pdev->dev, PTR_ERR(ctz->clk_tempsen),
> +				     "failed to get clk_tempsen\n");
> +
> +	cv180x_thermal_init(ctz);
> +
> +	tz = devm_thermal_of_zone_register(&pdev->dev, 0, ctz,
> +					   &cv180x_thermal_ops);
> +	if (IS_ERR(tz))
> +		return dev_err_probe(&pdev->dev, PTR_ERR(tz),
> +				     "failed to register thermal zone\n");
> +
> +	platform_set_drvdata(pdev, ctz);
> +
> +	return 0;
> +}
> +
> +static int cv180x_thermal_remove(struct platform_device *pdev)
> +{
> +	struct cv180x_thermal_zone *ctz = platform_get_drvdata(pdev);
> +
> +	cv180x_thermal_deinit(ctz);
> +
> +	return 0;
> +}
> +
> +static int __maybe_unused cv180x_thermal_suspend(struct device *dev)
> +{
> +	struct cv180x_thermal_zone *ctz = dev_get_drvdata(dev);
> +
> +	cv180x_thermal_deinit(ctz);
> +	clk_disable_unprepare(ctz->clk_tempsen);
> +
> +	return 0;
> +}
> +
> +static int __maybe_unused cv180x_thermal_resume(struct device *dev)
> +{
> +	struct cv180x_thermal_zone *ctz = dev_get_drvdata(dev);
> +
> +	clk_prepare_enable(ctz->clk_tempsen);
> +	cv180x_thermal_init(ctz);
> +
> +	return 0;
> +}
> +
> +static SIMPLE_DEV_PM_OPS(cv180x_thermal_pm_ops,
> +			 cv180x_thermal_suspend, cv180x_thermal_resume);
> +
> +static struct platform_driver cv180x_thermal_driver = {
> +	.probe = cv180x_thermal_probe,
> +	.remove = cv180x_thermal_remove,
> +	.driver = {
> +		.name = "cv180x-thermal",
> +		.pm = &cv180x_thermal_pm_ops,
> +		.of_match_table = cv180x_thermal_of_match,
> +	},
> +};
> +
> +module_platform_driver(cv180x_thermal_driver);
> +
> +MODULE_DESCRIPTION("Sophgo CV180x thermal driver");
> +MODULE_AUTHOR("Haylen Chu <heylenay@outlook.com>");
> +MODULE_LICENSE("GPL");

Krzysztof Kozlowski July 16, 2024, 3:56 p.m. UTC | #3

On 16/07/2024 11:42, Haylen Chu wrote:
> +				soc_critical: soc-critical {
> +					temperature     = <100000>;
> +					hysteresis      = <0>;
> +					type            = "critical";
> +				};
> +			};
> +		};
> +	};
>  };
>  
>  &plic {
> @@ -25,3 +53,5 @@ &clint {
>  &clk {
>  	compatible = "sophgo,cv1800-clk";
>  };
> +
> +

Why? Drop.

Best regards,
Krzysztof

Haylen Chu July 17, 2024, 5:32 a.m. UTC | #4

On Tue, Jul 16, 2024 at 08:48:13PM +0800, Chen Wang wrote:
> 
> On 2024/7/16 17:42, Haylen Chu wrote:
> > Add support for cv180x SoCs integrated thermal sensors.
> > 
> > Signed-off-by: Haylen Chu <heylenay@outlook.com>
> > ---
> >   drivers/thermal/Kconfig          |   6 +
> >   drivers/thermal/Makefile         |   1 +
> >   drivers/thermal/cv180x_thermal.c | 241 +++++++++++++++++++++++++++++++
> >   3 files changed, 248 insertions(+)
> >   create mode 100644 drivers/thermal/cv180x_thermal.c
> cv18xx_thermal.c ? See my comments in patch 1. When you deicide it, update
> this for all patches.

I would use unified "cv1800" in next revision.

Best regards,
Haylen


> > diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> > index 204ed89a3ec9..f53c973a361d 100644
> > --- a/drivers/thermal/Kconfig
> > +++ b/drivers/thermal/Kconfig
> > @@ -514,4 +514,10 @@ config LOONGSON2_THERMAL
> >   	  is higher than the high temperature threshold or lower than the low
> >   	  temperature threshold, the interrupt will occur.
> > +config CV180X_THERMAL
> Same question above, CV18XX_THERMAL?
> > +	tristate "Temperature sensor driver for Sophgo CV180X"
> > +	help
> > +	  If you say yes here you get support for thermal sensor integrated in
> > +	  Sophgo CV180X SoCs.
> > +
> >   endif
> > diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> > index 5cdf7d68687f..5b59bde8a579 100644
> > --- a/drivers/thermal/Makefile
> > +++ b/drivers/thermal/Makefile
> > @@ -65,3 +65,4 @@ obj-$(CONFIG_AMLOGIC_THERMAL)     += amlogic_thermal.o
> >   obj-$(CONFIG_SPRD_THERMAL)	+= sprd_thermal.o
> >   obj-$(CONFIG_KHADAS_MCU_FAN_THERMAL)	+= khadas_mcu_fan.o
> >   obj-$(CONFIG_LOONGSON2_THERMAL)	+= loongson2_thermal.o
> > +obj-$(CONFIG_CV180X_THERMAL)	+= cv180x_thermal.o
> > diff --git a/drivers/thermal/cv180x_thermal.c b/drivers/thermal/cv180x_thermal.c
> > new file mode 100644
> > index 000000000000..8b726c0ad848
> > --- /dev/null
> > +++ b/drivers/thermal/cv180x_thermal.c
> > @@ -0,0 +1,241 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2021 Sophgo Inc.
> > + * Copyright (C) 2024 Haylen Chu <heylenay@outlook.com>
> > + */
> > +
> > +#include <linux/bits.h>
> > +#include <linux/clk.h>
> > +#include <linux/io.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/thermal.h>
> > +
> > +#define TEMPSEN_VERSION					0x0
> > +#define TEMPSEN_CTRL					0x4
> > +#define  TEMPSEN_CTRL_EN				BIT(0)
> > +#define  TEMPSEN_CTRL_SEL_MASK				GENMASK(7, 4)
> > +#define  TEMPSEN_CTRL_SEL_OFFSET			4
> > +#define TEMPSEN_STATUS					0x8
> > +#define TEMPSEN_SET					0xc
> > +#define  TEMPSEN_SET_CHOPSEL_MASK			GENMASK(5, 4)
> > +#define  TEMPSEN_SET_CHOPSEL_OFFSET			4
> > +#define  TEMPSEN_SET_CHOPSEL_128T			0
> > +#define  TEMPSEN_SET_CHOPSEL_256T			1
> > +#define  TEMPSEN_SET_CHOPSEL_512T			2
> > +#define  TEMPSEN_SET_CHOPSEL_1024T			3
> > +#define  TEMPSEN_SET_ACCSEL_MASK			GENMASK(7, 6)
> > +#define  TEMPSEN_SET_ACCSEL_OFFSET			6
> > +#define  TEMPSEN_SET_ACCSEL_512T			0
> > +#define  TEMPSEN_SET_ACCSEL_1024T			1
> > +#define  TEMPSEN_SET_ACCSEL_2048T			2
> > +#define  TEMPSEN_SET_ACCSEL_4096T			3
> > +#define  TEMPSEN_SET_CYC_CLKDIV_MASK			GENMASK(15, 8)
> > +#define  TEMPSEN_SET_CYC_CLKDIV_OFFSET			8
> > +#define TEMPSEN_INTR_EN					0x10
> > +#define TEMPSEN_INTR_CLR				0x14
> > +#define TEMPSEN_INTR_STA				0x18
> > +#define TEMPSEN_INTR_RAW				0x1c
> > +#define TEMPSEN_RESULT(n)				(0x20 + (n) * 4)
> > +#define  TEMPSEN_RESULT_RESULT_MASK			GENMASK(12, 0)
> > +#define  TEMPSEN_RESULT_MAX_RESULT_MASK			GENMASK(28, 16)
> > +#define  TEMPSEN_RESULT_CLR_MAX_RESULT			BIT(31)
> > +#define TEMPSEN_AUTO_PERIOD				0x64
> > +#define  TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_MASK		GENMASK(23, 0)
> > +#define  TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_OFFSET		0
> > +
> > +struct cv180x_thermal_zone {
> > +	struct device *dev;
> > +	void __iomem *base;
> > +	struct clk *clk_tempsen;
> > +	u32 sample_cycle;
> > +};
> > +
> > +static void cv180x_thermal_init(struct cv180x_thermal_zone *ctz)
> > +{
> > +	void __iomem *base = ctz->base;
> > +	u32 regval;
> > +
> > +	writel(readl(base + TEMPSEN_INTR_RAW), base + TEMPSEN_INTR_CLR);
> > +	writel(TEMPSEN_RESULT_CLR_MAX_RESULT, base + TEMPSEN_RESULT(0));
> > +
> > +	regval = readl(base + TEMPSEN_SET);
> > +	regval &= ~TEMPSEN_SET_CHOPSEL_MASK;
> > +	regval &= ~TEMPSEN_SET_ACCSEL_MASK;
> > +	regval &= ~TEMPSEN_SET_CYC_CLKDIV_MASK;
> > +	regval |= TEMPSEN_SET_CHOPSEL_1024T << TEMPSEN_SET_CHOPSEL_OFFSET;
> > +	regval |= TEMPSEN_SET_ACCSEL_2048T << TEMPSEN_SET_ACCSEL_OFFSET;
> > +	regval |= 0x31 << TEMPSEN_SET_CYC_CLKDIV_OFFSET;
> > +	writel(regval, base + TEMPSEN_SET);
> > +
> > +	regval = readl(base + TEMPSEN_AUTO_PERIOD);
> > +	regval &= ~TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_MASK;
> > +	regval |= ctz->sample_cycle << TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_OFFSET;
> > +	writel(regval, base + TEMPSEN_AUTO_PERIOD);
> > +
> > +	regval = readl(base + TEMPSEN_CTRL);
> > +	regval &= ~TEMPSEN_CTRL_SEL_MASK;
> > +	regval |= 1 << TEMPSEN_CTRL_SEL_OFFSET;
> > +	regval |= TEMPSEN_CTRL_EN;
> > +	writel(regval, base + TEMPSEN_CTRL);
> > +}
> > +
> > +static void cv180x_thermal_deinit(struct cv180x_thermal_zone *ct)
> > +{
> > +	void __iomem *base = ct->base;
> > +	u32 regval;
> > +
> > +	regval = readl(base + TEMPSEN_CTRL);
> > +	regval &= ~(TEMPSEN_CTRL_SEL_MASK | TEMPSEN_CTRL_EN);
> > +	writel(regval, base + TEMPSEN_CTRL);
> > +
> > +	writel(readl(base + TEMPSEN_INTR_RAW), base + TEMPSEN_INTR_CLR);
> > +}
> > +
> > +/*
> > + *	Raw register value to temperature (mC) formula:
> > + *
> > + *		       read_val * 1000 * 716
> > + *	Temperature = ----------------------- - 273000
> > + *				divider
> > + *
> > + *	where divider should be ticks number of accumulation period,
> > + *	e.g. 2048 for TEMPSEN_CTRL_ACCSEL_2048T
> > + */
> > +static int cv180x_calc_temp(struct cv180x_thermal_zone *ctz, u32 result)
> > +{
> > +	return (result * 1000) * 716 / 2048 - 273000;
> > +}
> > +
> > +static int cv180x_get_temp(struct thermal_zone_device *tdev, int *temperature)
> > +{
> > +	struct cv180x_thermal_zone *ctz = thermal_zone_device_priv(tdev);
> > +	void __iomem *base = ctz->base;
> > +	u32 result;
> > +
> > +	result = readl(base + TEMPSEN_RESULT(0)) & TEMPSEN_RESULT_RESULT_MASK;
> > +	*temperature = cv180x_calc_temp(ctz, result);
> > +
> > +	return 0;
> > +}
> > +
> > +static const struct thermal_zone_device_ops cv180x_thermal_ops = {
> > +	.get_temp = cv180x_get_temp,
> > +};
> > +
> > +static const struct of_device_id cv180x_thermal_of_match[] = {
> > +	{ .compatible = "sophgo,cv1800-thermal" },
> > +	{},
> > +};
> > +MODULE_DEVICE_TABLE(of, cv180x_thermal_of_match);
> > +
> > +static int
> > +cv180x_parse_dt(struct cv180x_thermal_zone *ctz)
> > +{
> > +	struct device_node *np = ctz->dev->of_node;
> > +	u32 tmp;
> > +
> > +	if (of_property_read_u32(np, "sample-rate-hz", &tmp)) {
> > +		ctz->sample_cycle = 1000000;
> > +	} else {
> > +		/* sample cycle should be at least 524us */
> > +		if (tmp > 1000000 / 524) {
> > +			dev_err(ctz->dev, "invalid sample rate %d\n", tmp);
> > +			return -EINVAL;
> > +		}
> > +
> > +		ctz->sample_cycle = 1000000 / tmp;
> > +	}
> > +
> > +	return 0;
> > +}
> > +
> > +static int cv180x_thermal_probe(struct platform_device *pdev)
> > +{
> > +	struct cv180x_thermal_zone *ctz;
> > +	struct thermal_zone_device *tz;
> > +	struct resource *res;
> > +	int ret;
> > +
> > +	ctz = devm_kzalloc(&pdev->dev, sizeof(*ctz), GFP_KERNEL);
> > +	if (!ctz)
> > +		return -ENOMEM;
> > +
> > +	ctz->dev = &pdev->dev;
> > +
> > +	ret = cv180x_parse_dt(ctz);
> > +	if (ret)
> > +		return dev_err_probe(&pdev->dev, ret, "failed to parse dt\n");
> > +
> > +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > +	ctz->base = devm_ioremap_resource(&pdev->dev, res);
> > +	if (IS_ERR(ctz->base))
> > +		return dev_err_probe(&pdev->dev, PTR_ERR(ctz->base),
> > +				     "failed to map tempsen registers\n");
> > +
> > +	ctz->clk_tempsen = devm_clk_get_enabled(&pdev->dev, NULL);
> > +	if (IS_ERR(ctz->clk_tempsen))
> > +		return dev_err_probe(&pdev->dev, PTR_ERR(ctz->clk_tempsen),
> > +				     "failed to get clk_tempsen\n");
> > +
> > +	cv180x_thermal_init(ctz);
> > +
> > +	tz = devm_thermal_of_zone_register(&pdev->dev, 0, ctz,
> > +					   &cv180x_thermal_ops);
> > +	if (IS_ERR(tz))
> > +		return dev_err_probe(&pdev->dev, PTR_ERR(tz),
> > +				     "failed to register thermal zone\n");
> > +
> > +	platform_set_drvdata(pdev, ctz);
> > +
> > +	return 0;
> > +}
> > +
> > +static int cv180x_thermal_remove(struct platform_device *pdev)
> > +{
> > +	struct cv180x_thermal_zone *ctz = platform_get_drvdata(pdev);
> > +
> > +	cv180x_thermal_deinit(ctz);
> > +
> > +	return 0;
> > +}
> > +
> > +static int __maybe_unused cv180x_thermal_suspend(struct device *dev)
> > +{
> > +	struct cv180x_thermal_zone *ctz = dev_get_drvdata(dev);
> > +
> > +	cv180x_thermal_deinit(ctz);
> > +	clk_disable_unprepare(ctz->clk_tempsen);
> > +
> > +	return 0;
> > +}
> > +
> > +static int __maybe_unused cv180x_thermal_resume(struct device *dev)
> > +{
> > +	struct cv180x_thermal_zone *ctz = dev_get_drvdata(dev);
> > +
> > +	clk_prepare_enable(ctz->clk_tempsen);
> > +	cv180x_thermal_init(ctz);
> > +
> > +	return 0;
> > +}
> > +
> > +static SIMPLE_DEV_PM_OPS(cv180x_thermal_pm_ops,
> > +			 cv180x_thermal_suspend, cv180x_thermal_resume);
> > +
> > +static struct platform_driver cv180x_thermal_driver = {
> > +	.probe = cv180x_thermal_probe,
> > +	.remove = cv180x_thermal_remove,
> > +	.driver = {
> > +		.name = "cv180x-thermal",
> > +		.pm = &cv180x_thermal_pm_ops,
> > +		.of_match_table = cv180x_thermal_of_match,
> > +	},
> > +};
> > +
> > +module_platform_driver(cv180x_thermal_driver);
> > +
> > +MODULE_DESCRIPTION("Sophgo CV180x thermal driver");
> > +MODULE_AUTHOR("Haylen Chu <heylenay@outlook.com>");
> > +MODULE_LICENSE("GPL");

Inochi Amaoto July 17, 2024, 6:22 a.m. UTC | #5

On Tue, Jul 16, 2024 at 09:42:35AM GMT, Haylen Chu wrote:
> Add support for cv180x SoCs integrated thermal sensors.
> 
> Signed-off-by: Haylen Chu <heylenay@outlook.com>
> ---
>  drivers/thermal/Kconfig          |   6 +
>  drivers/thermal/Makefile         |   1 +
>  drivers/thermal/cv180x_thermal.c | 241 +++++++++++++++++++++++++++++++
>  3 files changed, 248 insertions(+)
>  create mode 100644 drivers/thermal/cv180x_thermal.c
> 
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index 204ed89a3ec9..f53c973a361d 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -514,4 +514,10 @@ config LOONGSON2_THERMAL
>  	  is higher than the high temperature threshold or lower than the low
>  	  temperature threshold, the interrupt will occur.
>  
> +config CV180X_THERMAL
> +	tristate "Temperature sensor driver for Sophgo CV180X"
> +	help
> +	  If you say yes here you get support for thermal sensor integrated in
> +	  Sophgo CV180X SoCs.
> +
>  endif
> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> index 5cdf7d68687f..5b59bde8a579 100644
> --- a/drivers/thermal/Makefile
> +++ b/drivers/thermal/Makefile
> @@ -65,3 +65,4 @@ obj-$(CONFIG_AMLOGIC_THERMAL)     += amlogic_thermal.o
>  obj-$(CONFIG_SPRD_THERMAL)	+= sprd_thermal.o
>  obj-$(CONFIG_KHADAS_MCU_FAN_THERMAL)	+= khadas_mcu_fan.o
>  obj-$(CONFIG_LOONGSON2_THERMAL)	+= loongson2_thermal.o
> +obj-$(CONFIG_CV180X_THERMAL)	+= cv180x_thermal.o
> diff --git a/drivers/thermal/cv180x_thermal.c b/drivers/thermal/cv180x_thermal.c
> new file mode 100644
> index 000000000000..8b726c0ad848
> --- /dev/null
> +++ b/drivers/thermal/cv180x_thermal.c
> @@ -0,0 +1,241 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2021 Sophgo Inc.
> + * Copyright (C) 2024 Haylen Chu <heylenay@outlook.com>
> + */
> +
> +#include <linux/bits.h>
> +#include <linux/clk.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/thermal.h>
> +
> +#define TEMPSEN_VERSION					0x0
> +#define TEMPSEN_CTRL					0x4
> +#define  TEMPSEN_CTRL_EN				BIT(0)
> +#define  TEMPSEN_CTRL_SEL_MASK				GENMASK(7, 4)
> +#define  TEMPSEN_CTRL_SEL_OFFSET			4
> +#define TEMPSEN_STATUS					0x8
> +#define TEMPSEN_SET					0xc
> +#define  TEMPSEN_SET_CHOPSEL_MASK			GENMASK(5, 4)
> +#define  TEMPSEN_SET_CHOPSEL_OFFSET			4
> +#define  TEMPSEN_SET_CHOPSEL_128T			0
> +#define  TEMPSEN_SET_CHOPSEL_256T			1
> +#define  TEMPSEN_SET_CHOPSEL_512T			2
> +#define  TEMPSEN_SET_CHOPSEL_1024T			3
> +#define  TEMPSEN_SET_ACCSEL_MASK			GENMASK(7, 6)
> +#define  TEMPSEN_SET_ACCSEL_OFFSET			6
> +#define  TEMPSEN_SET_ACCSEL_512T			0
> +#define  TEMPSEN_SET_ACCSEL_1024T			1
> +#define  TEMPSEN_SET_ACCSEL_2048T			2
> +#define  TEMPSEN_SET_ACCSEL_4096T			3
> +#define  TEMPSEN_SET_CYC_CLKDIV_MASK			GENMASK(15, 8)
> +#define  TEMPSEN_SET_CYC_CLKDIV_OFFSET			8
> +#define TEMPSEN_INTR_EN					0x10
> +#define TEMPSEN_INTR_CLR				0x14
> +#define TEMPSEN_INTR_STA				0x18
> +#define TEMPSEN_INTR_RAW				0x1c
> +#define TEMPSEN_RESULT(n)				(0x20 + (n) * 4)
> +#define  TEMPSEN_RESULT_RESULT_MASK			GENMASK(12, 0)
> +#define  TEMPSEN_RESULT_MAX_RESULT_MASK			GENMASK(28, 16)
> +#define  TEMPSEN_RESULT_CLR_MAX_RESULT			BIT(31)
> +#define TEMPSEN_AUTO_PERIOD				0x64
> +#define  TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_MASK		GENMASK(23, 0)
> +#define  TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_OFFSET		0
> +
> +struct cv180x_thermal_zone {
> +	struct device *dev;
> +	void __iomem *base;
> +	struct clk *clk_tempsen;
> +	u32 sample_cycle;
> +};
> +
> +static void cv180x_thermal_init(struct cv180x_thermal_zone *ctz)
> +{
> +	void __iomem *base = ctz->base;
> +	u32 regval;
> +
> +	writel(readl(base + TEMPSEN_INTR_RAW), base + TEMPSEN_INTR_CLR);
> +	writel(TEMPSEN_RESULT_CLR_MAX_RESULT, base + TEMPSEN_RESULT(0));
> +
> +	regval = readl(base + TEMPSEN_SET);
> +	regval &= ~TEMPSEN_SET_CHOPSEL_MASK;
> +	regval &= ~TEMPSEN_SET_ACCSEL_MASK;
> +	regval &= ~TEMPSEN_SET_CYC_CLKDIV_MASK;
> +	regval |= TEMPSEN_SET_CHOPSEL_1024T << TEMPSEN_SET_CHOPSEL_OFFSET;
> +	regval |= TEMPSEN_SET_ACCSEL_2048T << TEMPSEN_SET_ACCSEL_OFFSET;
> +	regval |= 0x31 << TEMPSEN_SET_CYC_CLKDIV_OFFSET;
> +	writel(regval, base + TEMPSEN_SET);
> +
> +	regval = readl(base + TEMPSEN_AUTO_PERIOD);
> +	regval &= ~TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_MASK;
> +	regval |= ctz->sample_cycle << TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_OFFSET;
> +	writel(regval, base + TEMPSEN_AUTO_PERIOD);
> +
> +	regval = readl(base + TEMPSEN_CTRL);
> +	regval &= ~TEMPSEN_CTRL_SEL_MASK;
> +	regval |= 1 << TEMPSEN_CTRL_SEL_OFFSET;
> +	regval |= TEMPSEN_CTRL_EN;
> +	writel(regval, base + TEMPSEN_CTRL);
> +}
> +
> +static void cv180x_thermal_deinit(struct cv180x_thermal_zone *ct)
> +{
> +	void __iomem *base = ct->base;
> +	u32 regval;
> +
> +	regval = readl(base + TEMPSEN_CTRL);
> +	regval &= ~(TEMPSEN_CTRL_SEL_MASK | TEMPSEN_CTRL_EN);
> +	writel(regval, base + TEMPSEN_CTRL);
> +
> +	writel(readl(base + TEMPSEN_INTR_RAW), base + TEMPSEN_INTR_CLR);
> +}
> +
> +/*
> + *	Raw register value to temperature (mC) formula:
> + *
> + *		       read_val * 1000 * 716
> + *	Temperature = ----------------------- - 273000
> + *				divider
> + *
> + *	where divider should be ticks number of accumulation period,
> + *	e.g. 2048 for TEMPSEN_CTRL_ACCSEL_2048T
> + */
> +static int cv180x_calc_temp(struct cv180x_thermal_zone *ctz, u32 result)
> +{
> +	return (result * 1000) * 716 / 2048 - 273000;
> +}
> +
> +static int cv180x_get_temp(struct thermal_zone_device *tdev, int *temperature)
> +{
> +	struct cv180x_thermal_zone *ctz = thermal_zone_device_priv(tdev);
> +	void __iomem *base = ctz->base;
> +	u32 result;
> +
> +	result = readl(base + TEMPSEN_RESULT(0)) & TEMPSEN_RESULT_RESULT_MASK;
> +	*temperature = cv180x_calc_temp(ctz, result);
> +
> +	return 0;
> +}
> +
> +static const struct thermal_zone_device_ops cv180x_thermal_ops = {
> +	.get_temp = cv180x_get_temp,
> +};
> +
> +static const struct of_device_id cv180x_thermal_of_match[] = {
> +	{ .compatible = "sophgo,cv1800-thermal" },
> +	{},
> +};
> +MODULE_DEVICE_TABLE(of, cv180x_thermal_of_match);
> +
> +static int
> +cv180x_parse_dt(struct cv180x_thermal_zone *ctz)
> +{
> +	struct device_node *np = ctz->dev->of_node;
> +	u32 tmp;
> +
> +	if (of_property_read_u32(np, "sample-rate-hz", &tmp)) {
> +		ctz->sample_cycle = 1000000;
> +	} else {
> +		/* sample cycle should be at least 524us */
> +		if (tmp > 1000000 / 524) {
> +			dev_err(ctz->dev, "invalid sample rate %d\n", tmp);
> +			return -EINVAL;
> +		}
> +
> +		ctz->sample_cycle = 1000000 / tmp;
> +	}
> +
> +	return 0;
> +}
> +
> +static int cv180x_thermal_probe(struct platform_device *pdev)
> +{
> +	struct cv180x_thermal_zone *ctz;
> +	struct thermal_zone_device *tz;
> +	struct resource *res;
> +	int ret;
> +
> +	ctz = devm_kzalloc(&pdev->dev, sizeof(*ctz), GFP_KERNEL);
> +	if (!ctz)
> +		return -ENOMEM;
> +
> +	ctz->dev = &pdev->dev;
> +
> +	ret = cv180x_parse_dt(ctz);
> +	if (ret)
> +		return dev_err_probe(&pdev->dev, ret, "failed to parse dt\n");
> +
> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	ctz->base = devm_ioremap_resource(&pdev->dev, res);
> +	if (IS_ERR(ctz->base))
> +		return dev_err_probe(&pdev->dev, PTR_ERR(ctz->base),
> +				     "failed to map tempsen registers\n");
> +
> +	ctz->clk_tempsen = devm_clk_get_enabled(&pdev->dev, NULL);
> +	if (IS_ERR(ctz->clk_tempsen))
> +		return dev_err_probe(&pdev->dev, PTR_ERR(ctz->clk_tempsen),
> +				     "failed to get clk_tempsen\n");
> +
> +	cv180x_thermal_init(ctz);
> +
> +	tz = devm_thermal_of_zone_register(&pdev->dev, 0, ctz,
> +					   &cv180x_thermal_ops);
> +	if (IS_ERR(tz))
> +		return dev_err_probe(&pdev->dev, PTR_ERR(tz),
> +				     "failed to register thermal zone\n");
> +
> +	platform_set_drvdata(pdev, ctz);
> +
> +	return 0;
> +}
> +
> +static int cv180x_thermal_remove(struct platform_device *pdev)
> +{
> +	struct cv180x_thermal_zone *ctz = platform_get_drvdata(pdev);
> +
> +	cv180x_thermal_deinit(ctz);
> +
> +	return 0;
> +}
> +
> +static int __maybe_unused cv180x_thermal_suspend(struct device *dev)
> +{
> +	struct cv180x_thermal_zone *ctz = dev_get_drvdata(dev);
> +
> +	cv180x_thermal_deinit(ctz);
> +	clk_disable_unprepare(ctz->clk_tempsen);
> +
> +	return 0;
> +}
> +
> +static int __maybe_unused cv180x_thermal_resume(struct device *dev)
> +{
> +	struct cv180x_thermal_zone *ctz = dev_get_drvdata(dev);
> +
> +	clk_prepare_enable(ctz->clk_tempsen);
> +	cv180x_thermal_init(ctz);
> +
> +	return 0;
> +}
> +
> +static SIMPLE_DEV_PM_OPS(cv180x_thermal_pm_ops,
> +			 cv180x_thermal_suspend, cv180x_thermal_resume);
> +
> +static struct platform_driver cv180x_thermal_driver = {
> +	.probe = cv180x_thermal_probe,
> +	.remove = cv180x_thermal_remove,
> +	.driver = {
> +		.name = "cv180x-thermal",
> +		.pm = &cv180x_thermal_pm_ops,
> +		.of_match_table = cv180x_thermal_of_match,
> +	},
> +};
> +
> +module_platform_driver(cv180x_thermal_driver);
> +
> +MODULE_DESCRIPTION("Sophgo CV180x thermal driver");
> +MODULE_AUTHOR("Haylen Chu <heylenay@outlook.com>");
> +MODULE_LICENSE("GPL");
> -- 
> 2.45.2
> 

Where is interrupt handler? I see nothing about it.

Regards,
Inochi

Haylen Chu July 18, 2024, 6:49 a.m. UTC | #6

On Wed, Jul 17, 2024 at 02:22:32PM +0800, Inochi Amaoto wrote:
> On Tue, Jul 16, 2024 at 09:42:35AM GMT, Haylen Chu wrote:
> > Add support for cv180x SoCs integrated thermal sensors.
> > 
> > Signed-off-by: Haylen Chu <heylenay@outlook.com>
> > ---
> >  drivers/thermal/Kconfig          |   6 +
> >  drivers/thermal/Makefile         |   1 +
> >  drivers/thermal/cv180x_thermal.c | 241 +++++++++++++++++++++++++++++++
> >  3 files changed, 248 insertions(+)
> >  create mode 100644 drivers/thermal/cv180x_thermal.c
> > 
> > diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> > index 204ed89a3ec9..f53c973a361d 100644
> > --- a/drivers/thermal/Kconfig
> > +++ b/drivers/thermal/Kconfig
> > @@ -514,4 +514,10 @@ config LOONGSON2_THERMAL
> >  	  is higher than the high temperature threshold or lower than the low
> >  	  temperature threshold, the interrupt will occur.
> >  
> > +config CV180X_THERMAL
> > +	tristate "Temperature sensor driver for Sophgo CV180X"
> > +	help
> > +	  If you say yes here you get support for thermal sensor integrated in
> > +	  Sophgo CV180X SoCs.
> > +
> >  endif
> > diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> > index 5cdf7d68687f..5b59bde8a579 100644
> > --- a/drivers/thermal/Makefile
> > +++ b/drivers/thermal/Makefile
> > @@ -65,3 +65,4 @@ obj-$(CONFIG_AMLOGIC_THERMAL)     += amlogic_thermal.o
> >  obj-$(CONFIG_SPRD_THERMAL)	+= sprd_thermal.o
> >  obj-$(CONFIG_KHADAS_MCU_FAN_THERMAL)	+= khadas_mcu_fan.o
> >  obj-$(CONFIG_LOONGSON2_THERMAL)	+= loongson2_thermal.o
> > +obj-$(CONFIG_CV180X_THERMAL)	+= cv180x_thermal.o
> > diff --git a/drivers/thermal/cv180x_thermal.c b/drivers/thermal/cv180x_thermal.c
> > new file mode 100644
> > index 000000000000..8b726c0ad848
> > --- /dev/null
> > +++ b/drivers/thermal/cv180x_thermal.c
> > @@ -0,0 +1,241 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2021 Sophgo Inc.
> > + * Copyright (C) 2024 Haylen Chu <heylenay@outlook.com>
> > + */
> > +
> > +#include <linux/bits.h>
> > +#include <linux/clk.h>
> > +#include <linux/io.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/thermal.h>
> > +
> > +#define TEMPSEN_VERSION					0x0
> > +#define TEMPSEN_CTRL					0x4
> > +#define  TEMPSEN_CTRL_EN				BIT(0)
> > +#define  TEMPSEN_CTRL_SEL_MASK				GENMASK(7, 4)
> > +#define  TEMPSEN_CTRL_SEL_OFFSET			4
> > +#define TEMPSEN_STATUS					0x8
> > +#define TEMPSEN_SET					0xc
> > +#define  TEMPSEN_SET_CHOPSEL_MASK			GENMASK(5, 4)
> > +#define  TEMPSEN_SET_CHOPSEL_OFFSET			4
> > +#define  TEMPSEN_SET_CHOPSEL_128T			0
> > +#define  TEMPSEN_SET_CHOPSEL_256T			1
> > +#define  TEMPSEN_SET_CHOPSEL_512T			2
> > +#define  TEMPSEN_SET_CHOPSEL_1024T			3
> > +#define  TEMPSEN_SET_ACCSEL_MASK			GENMASK(7, 6)
> > +#define  TEMPSEN_SET_ACCSEL_OFFSET			6
> > +#define  TEMPSEN_SET_ACCSEL_512T			0
> > +#define  TEMPSEN_SET_ACCSEL_1024T			1
> > +#define  TEMPSEN_SET_ACCSEL_2048T			2
> > +#define  TEMPSEN_SET_ACCSEL_4096T			3
> > +#define  TEMPSEN_SET_CYC_CLKDIV_MASK			GENMASK(15, 8)
> > +#define  TEMPSEN_SET_CYC_CLKDIV_OFFSET			8
> > +#define TEMPSEN_INTR_EN					0x10
> > +#define TEMPSEN_INTR_CLR				0x14
> > +#define TEMPSEN_INTR_STA				0x18
> > +#define TEMPSEN_INTR_RAW				0x1c
> > +#define TEMPSEN_RESULT(n)				(0x20 + (n) * 4)
> > +#define  TEMPSEN_RESULT_RESULT_MASK			GENMASK(12, 0)
> > +#define  TEMPSEN_RESULT_MAX_RESULT_MASK			GENMASK(28, 16)
> > +#define  TEMPSEN_RESULT_CLR_MAX_RESULT			BIT(31)
> > +#define TEMPSEN_AUTO_PERIOD				0x64
> > +#define  TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_MASK		GENMASK(23, 0)
> > +#define  TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_OFFSET		0
> > +
> > +struct cv180x_thermal_zone {
> > +	struct device *dev;
> > +	void __iomem *base;
> > +	struct clk *clk_tempsen;
> > +	u32 sample_cycle;
> > +};
> > +
> > +static void cv180x_thermal_init(struct cv180x_thermal_zone *ctz)
> > +{
> > +	void __iomem *base = ctz->base;
> > +	u32 regval;
> > +
> > +	writel(readl(base + TEMPSEN_INTR_RAW), base + TEMPSEN_INTR_CLR);
> > +	writel(TEMPSEN_RESULT_CLR_MAX_RESULT, base + TEMPSEN_RESULT(0));
> > +
> > +	regval = readl(base + TEMPSEN_SET);
> > +	regval &= ~TEMPSEN_SET_CHOPSEL_MASK;
> > +	regval &= ~TEMPSEN_SET_ACCSEL_MASK;
> > +	regval &= ~TEMPSEN_SET_CYC_CLKDIV_MASK;
> > +	regval |= TEMPSEN_SET_CHOPSEL_1024T << TEMPSEN_SET_CHOPSEL_OFFSET;
> > +	regval |= TEMPSEN_SET_ACCSEL_2048T << TEMPSEN_SET_ACCSEL_OFFSET;
> > +	regval |= 0x31 << TEMPSEN_SET_CYC_CLKDIV_OFFSET;
> > +	writel(regval, base + TEMPSEN_SET);
> > +
> > +	regval = readl(base + TEMPSEN_AUTO_PERIOD);
> > +	regval &= ~TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_MASK;
> > +	regval |= ctz->sample_cycle << TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_OFFSET;
> > +	writel(regval, base + TEMPSEN_AUTO_PERIOD);
> > +
> > +	regval = readl(base + TEMPSEN_CTRL);
> > +	regval &= ~TEMPSEN_CTRL_SEL_MASK;
> > +	regval |= 1 << TEMPSEN_CTRL_SEL_OFFSET;
> > +	regval |= TEMPSEN_CTRL_EN;
> > +	writel(regval, base + TEMPSEN_CTRL);
> > +}
> > +
> > +static void cv180x_thermal_deinit(struct cv180x_thermal_zone *ct)
> > +{
> > +	void __iomem *base = ct->base;
> > +	u32 regval;
> > +
> > +	regval = readl(base + TEMPSEN_CTRL);
> > +	regval &= ~(TEMPSEN_CTRL_SEL_MASK | TEMPSEN_CTRL_EN);
> > +	writel(regval, base + TEMPSEN_CTRL);
> > +
> > +	writel(readl(base + TEMPSEN_INTR_RAW), base + TEMPSEN_INTR_CLR);
> > +}
> > +
> > +/*
> > + *	Raw register value to temperature (mC) formula:
> > + *
> > + *		       read_val * 1000 * 716
> > + *	Temperature = ----------------------- - 273000
> > + *				divider
> > + *
> > + *	where divider should be ticks number of accumulation period,
> > + *	e.g. 2048 for TEMPSEN_CTRL_ACCSEL_2048T
> > + */
> > +static int cv180x_calc_temp(struct cv180x_thermal_zone *ctz, u32 result)
> > +{
> > +	return (result * 1000) * 716 / 2048 - 273000;
> > +}
> > +
> > +static int cv180x_get_temp(struct thermal_zone_device *tdev, int *temperature)
> > +{
> > +	struct cv180x_thermal_zone *ctz = thermal_zone_device_priv(tdev);
> > +	void __iomem *base = ctz->base;
> > +	u32 result;
> > +
> > +	result = readl(base + TEMPSEN_RESULT(0)) & TEMPSEN_RESULT_RESULT_MASK;
> > +	*temperature = cv180x_calc_temp(ctz, result);
> > +
> > +	return 0;
> > +}
> > +
> > +static const struct thermal_zone_device_ops cv180x_thermal_ops = {
> > +	.get_temp = cv180x_get_temp,
> > +};
> > +
> > +static const struct of_device_id cv180x_thermal_of_match[] = {
> > +	{ .compatible = "sophgo,cv1800-thermal" },
> > +	{},
> > +};
> > +MODULE_DEVICE_TABLE(of, cv180x_thermal_of_match);
> > +
> > +static int
> > +cv180x_parse_dt(struct cv180x_thermal_zone *ctz)
> > +{
> > +	struct device_node *np = ctz->dev->of_node;
> > +	u32 tmp;
> > +
> > +	if (of_property_read_u32(np, "sample-rate-hz", &tmp)) {
> > +		ctz->sample_cycle = 1000000;
> > +	} else {
> > +		/* sample cycle should be at least 524us */
> > +		if (tmp > 1000000 / 524) {
> > +			dev_err(ctz->dev, "invalid sample rate %d\n", tmp);
> > +			return -EINVAL;
> > +		}
> > +
> > +		ctz->sample_cycle = 1000000 / tmp;
> > +	}
> > +
> > +	return 0;
> > +}
> > +
> > +static int cv180x_thermal_probe(struct platform_device *pdev)
> > +{
> > +	struct cv180x_thermal_zone *ctz;
> > +	struct thermal_zone_device *tz;
> > +	struct resource *res;
> > +	int ret;
> > +
> > +	ctz = devm_kzalloc(&pdev->dev, sizeof(*ctz), GFP_KERNEL);
> > +	if (!ctz)
> > +		return -ENOMEM;
> > +
> > +	ctz->dev = &pdev->dev;
> > +
> > +	ret = cv180x_parse_dt(ctz);
> > +	if (ret)
> > +		return dev_err_probe(&pdev->dev, ret, "failed to parse dt\n");
> > +
> > +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > +	ctz->base = devm_ioremap_resource(&pdev->dev, res);
> > +	if (IS_ERR(ctz->base))
> > +		return dev_err_probe(&pdev->dev, PTR_ERR(ctz->base),
> > +				     "failed to map tempsen registers\n");
> > +
> > +	ctz->clk_tempsen = devm_clk_get_enabled(&pdev->dev, NULL);
> > +	if (IS_ERR(ctz->clk_tempsen))
> > +		return dev_err_probe(&pdev->dev, PTR_ERR(ctz->clk_tempsen),
> > +				     "failed to get clk_tempsen\n");
> > +
> > +	cv180x_thermal_init(ctz);
> > +
> > +	tz = devm_thermal_of_zone_register(&pdev->dev, 0, ctz,
> > +					   &cv180x_thermal_ops);
> > +	if (IS_ERR(tz))
> > +		return dev_err_probe(&pdev->dev, PTR_ERR(tz),
> > +				     "failed to register thermal zone\n");
> > +
> > +	platform_set_drvdata(pdev, ctz);
> > +
> > +	return 0;
> > +}
> > +
> > +static int cv180x_thermal_remove(struct platform_device *pdev)
> > +{
> > +	struct cv180x_thermal_zone *ctz = platform_get_drvdata(pdev);
> > +
> > +	cv180x_thermal_deinit(ctz);
> > +
> > +	return 0;
> > +}
> > +
> > +static int __maybe_unused cv180x_thermal_suspend(struct device *dev)
> > +{
> > +	struct cv180x_thermal_zone *ctz = dev_get_drvdata(dev);
> > +
> > +	cv180x_thermal_deinit(ctz);
> > +	clk_disable_unprepare(ctz->clk_tempsen);
> > +
> > +	return 0;
> > +}
> > +
> > +static int __maybe_unused cv180x_thermal_resume(struct device *dev)
> > +{
> > +	struct cv180x_thermal_zone *ctz = dev_get_drvdata(dev);
> > +
> > +	clk_prepare_enable(ctz->clk_tempsen);
> > +	cv180x_thermal_init(ctz);
> > +
> > +	return 0;
> > +}
> > +
> > +static SIMPLE_DEV_PM_OPS(cv180x_thermal_pm_ops,
> > +			 cv180x_thermal_suspend, cv180x_thermal_resume);
> > +
> > +static struct platform_driver cv180x_thermal_driver = {
> > +	.probe = cv180x_thermal_probe,
> > +	.remove = cv180x_thermal_remove,
> > +	.driver = {
> > +		.name = "cv180x-thermal",
> > +		.pm = &cv180x_thermal_pm_ops,
> > +		.of_match_table = cv180x_thermal_of_match,
> > +	},
> > +};
> > +
> > +module_platform_driver(cv180x_thermal_driver);
> > +
> > +MODULE_DESCRIPTION("Sophgo CV180x thermal driver");
> > +MODULE_AUTHOR("Haylen Chu <heylenay@outlook.com>");
> > +MODULE_LICENSE("GPL");
> > -- 
> > 2.45.2
> > 
> 
> Where is interrupt handler? I see nothing about it.
> 
> Regards,
> Inochi

Interrupts are not used. This driver implements only polling the
temperature.

Best regards,
Haylen Chu

Inochi Amaoto July 19, 2024, 1:26 a.m. UTC | #7

On Thu, Jul 18, 2024 at 06:49:05AM GMT, Haylen Chu wrote:
> On Wed, Jul 17, 2024 at 02:22:32PM +0800, Inochi Amaoto wrote:
> > On Tue, Jul 16, 2024 at 09:42:35AM GMT, Haylen Chu wrote:
> > > Add support for cv180x SoCs integrated thermal sensors.
> > > 
> > > Signed-off-by: Haylen Chu <heylenay@outlook.com>
> > > ---
> > >  drivers/thermal/Kconfig          |   6 +
> > >  drivers/thermal/Makefile         |   1 +
> > >  drivers/thermal/cv180x_thermal.c | 241 +++++++++++++++++++++++++++++++
> > >  3 files changed, 248 insertions(+)
> > >  create mode 100644 drivers/thermal/cv180x_thermal.c
> > > 
> > > diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> > > index 204ed89a3ec9..f53c973a361d 100644
> > > --- a/drivers/thermal/Kconfig
> > > +++ b/drivers/thermal/Kconfig
> > > @@ -514,4 +514,10 @@ config LOONGSON2_THERMAL
> > >  	  is higher than the high temperature threshold or lower than the low
> > >  	  temperature threshold, the interrupt will occur.
> > >  
> > > +config CV180X_THERMAL
> > > +	tristate "Temperature sensor driver for Sophgo CV180X"
> > > +	help
> > > +	  If you say yes here you get support for thermal sensor integrated in
> > > +	  Sophgo CV180X SoCs.
> > > +
> > >  endif
> > > diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> > > index 5cdf7d68687f..5b59bde8a579 100644
> > > --- a/drivers/thermal/Makefile
> > > +++ b/drivers/thermal/Makefile
> > > @@ -65,3 +65,4 @@ obj-$(CONFIG_AMLOGIC_THERMAL)     += amlogic_thermal.o
> > >  obj-$(CONFIG_SPRD_THERMAL)	+= sprd_thermal.o
> > >  obj-$(CONFIG_KHADAS_MCU_FAN_THERMAL)	+= khadas_mcu_fan.o
> > >  obj-$(CONFIG_LOONGSON2_THERMAL)	+= loongson2_thermal.o
> > > +obj-$(CONFIG_CV180X_THERMAL)	+= cv180x_thermal.o
> > > diff --git a/drivers/thermal/cv180x_thermal.c b/drivers/thermal/cv180x_thermal.c
> > > new file mode 100644
> > > index 000000000000..8b726c0ad848
> > > --- /dev/null
> > > +++ b/drivers/thermal/cv180x_thermal.c
> > > @@ -0,0 +1,241 @@
> > > +// SPDX-License-Identifier: GPL-2.0
> > > +/*
> > > + * Copyright (C) 2021 Sophgo Inc.
> > > + * Copyright (C) 2024 Haylen Chu <heylenay@outlook.com>
> > > + */
> > > +
> > > +#include <linux/bits.h>
> > > +#include <linux/clk.h>
> > > +#include <linux/io.h>
> > > +#include <linux/module.h>
> > > +#include <linux/of.h>
> > > +#include <linux/platform_device.h>
> > > +#include <linux/thermal.h>
> > > +
> > > +#define TEMPSEN_VERSION					0x0
> > > +#define TEMPSEN_CTRL					0x4
> > > +#define  TEMPSEN_CTRL_EN				BIT(0)
> > > +#define  TEMPSEN_CTRL_SEL_MASK				GENMASK(7, 4)
> > > +#define  TEMPSEN_CTRL_SEL_OFFSET			4
> > > +#define TEMPSEN_STATUS					0x8
> > > +#define TEMPSEN_SET					0xc
> > > +#define  TEMPSEN_SET_CHOPSEL_MASK			GENMASK(5, 4)
> > > +#define  TEMPSEN_SET_CHOPSEL_OFFSET			4
> > > +#define  TEMPSEN_SET_CHOPSEL_128T			0
> > > +#define  TEMPSEN_SET_CHOPSEL_256T			1
> > > +#define  TEMPSEN_SET_CHOPSEL_512T			2
> > > +#define  TEMPSEN_SET_CHOPSEL_1024T			3
> > > +#define  TEMPSEN_SET_ACCSEL_MASK			GENMASK(7, 6)
> > > +#define  TEMPSEN_SET_ACCSEL_OFFSET			6
> > > +#define  TEMPSEN_SET_ACCSEL_512T			0
> > > +#define  TEMPSEN_SET_ACCSEL_1024T			1
> > > +#define  TEMPSEN_SET_ACCSEL_2048T			2
> > > +#define  TEMPSEN_SET_ACCSEL_4096T			3
> > > +#define  TEMPSEN_SET_CYC_CLKDIV_MASK			GENMASK(15, 8)
> > > +#define  TEMPSEN_SET_CYC_CLKDIV_OFFSET			8
> > > +#define TEMPSEN_INTR_EN					0x10
> > > +#define TEMPSEN_INTR_CLR				0x14
> > > +#define TEMPSEN_INTR_STA				0x18
> > > +#define TEMPSEN_INTR_RAW				0x1c
> > > +#define TEMPSEN_RESULT(n)				(0x20 + (n) * 4)
> > > +#define  TEMPSEN_RESULT_RESULT_MASK			GENMASK(12, 0)
> > > +#define  TEMPSEN_RESULT_MAX_RESULT_MASK			GENMASK(28, 16)
> > > +#define  TEMPSEN_RESULT_CLR_MAX_RESULT			BIT(31)
> > > +#define TEMPSEN_AUTO_PERIOD				0x64
> > > +#define  TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_MASK		GENMASK(23, 0)
> > > +#define  TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_OFFSET		0
> > > +
> > > +struct cv180x_thermal_zone {
> > > +	struct device *dev;
> > > +	void __iomem *base;
> > > +	struct clk *clk_tempsen;
> > > +	u32 sample_cycle;
> > > +};
> > > +
> > > +static void cv180x_thermal_init(struct cv180x_thermal_zone *ctz)
> > > +{
> > > +	void __iomem *base = ctz->base;
> > > +	u32 regval;
> > > +
> > > +	writel(readl(base + TEMPSEN_INTR_RAW), base + TEMPSEN_INTR_CLR);
> > > +	writel(TEMPSEN_RESULT_CLR_MAX_RESULT, base + TEMPSEN_RESULT(0));
> > > +
> > > +	regval = readl(base + TEMPSEN_SET);
> > > +	regval &= ~TEMPSEN_SET_CHOPSEL_MASK;
> > > +	regval &= ~TEMPSEN_SET_ACCSEL_MASK;
> > > +	regval &= ~TEMPSEN_SET_CYC_CLKDIV_MASK;
> > > +	regval |= TEMPSEN_SET_CHOPSEL_1024T << TEMPSEN_SET_CHOPSEL_OFFSET;
> > > +	regval |= TEMPSEN_SET_ACCSEL_2048T << TEMPSEN_SET_ACCSEL_OFFSET;
> > > +	regval |= 0x31 << TEMPSEN_SET_CYC_CLKDIV_OFFSET;
> > > +	writel(regval, base + TEMPSEN_SET);
> > > +
> > > +	regval = readl(base + TEMPSEN_AUTO_PERIOD);
> > > +	regval &= ~TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_MASK;
> > > +	regval |= ctz->sample_cycle << TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_OFFSET;
> > > +	writel(regval, base + TEMPSEN_AUTO_PERIOD);
> > > +
> > > +	regval = readl(base + TEMPSEN_CTRL);
> > > +	regval &= ~TEMPSEN_CTRL_SEL_MASK;
> > > +	regval |= 1 << TEMPSEN_CTRL_SEL_OFFSET;
> > > +	regval |= TEMPSEN_CTRL_EN;
> > > +	writel(regval, base + TEMPSEN_CTRL);
> > > +}
> > > +
> > > +static void cv180x_thermal_deinit(struct cv180x_thermal_zone *ct)
> > > +{
> > > +	void __iomem *base = ct->base;
> > > +	u32 regval;
> > > +
> > > +	regval = readl(base + TEMPSEN_CTRL);
> > > +	regval &= ~(TEMPSEN_CTRL_SEL_MASK | TEMPSEN_CTRL_EN);
> > > +	writel(regval, base + TEMPSEN_CTRL);
> > > +
> > > +	writel(readl(base + TEMPSEN_INTR_RAW), base + TEMPSEN_INTR_CLR);
> > > +}
> > > +
> > > +/*
> > > + *	Raw register value to temperature (mC) formula:
> > > + *
> > > + *		       read_val * 1000 * 716
> > > + *	Temperature = ----------------------- - 273000
> > > + *				divider
> > > + *
> > > + *	where divider should be ticks number of accumulation period,
> > > + *	e.g. 2048 for TEMPSEN_CTRL_ACCSEL_2048T
> > > + */
> > > +static int cv180x_calc_temp(struct cv180x_thermal_zone *ctz, u32 result)
> > > +{
> > > +	return (result * 1000) * 716 / 2048 - 273000;
> > > +}
> > > +
> > > +static int cv180x_get_temp(struct thermal_zone_device *tdev, int *temperature)
> > > +{
> > > +	struct cv180x_thermal_zone *ctz = thermal_zone_device_priv(tdev);
> > > +	void __iomem *base = ctz->base;
> > > +	u32 result;
> > > +
> > > +	result = readl(base + TEMPSEN_RESULT(0)) & TEMPSEN_RESULT_RESULT_MASK;
> > > +	*temperature = cv180x_calc_temp(ctz, result);
> > > +
> > > +	return 0;
> > > +}
> > > +
> > > +static const struct thermal_zone_device_ops cv180x_thermal_ops = {
> > > +	.get_temp = cv180x_get_temp,
> > > +};
> > > +
> > > +static const struct of_device_id cv180x_thermal_of_match[] = {
> > > +	{ .compatible = "sophgo,cv1800-thermal" },
> > > +	{},
> > > +};
> > > +MODULE_DEVICE_TABLE(of, cv180x_thermal_of_match);
> > > +
> > > +static int
> > > +cv180x_parse_dt(struct cv180x_thermal_zone *ctz)
> > > +{
> > > +	struct device_node *np = ctz->dev->of_node;
> > > +	u32 tmp;
> > > +
> > > +	if (of_property_read_u32(np, "sample-rate-hz", &tmp)) {
> > > +		ctz->sample_cycle = 1000000;
> > > +	} else {
> > > +		/* sample cycle should be at least 524us */
> > > +		if (tmp > 1000000 / 524) {
> > > +			dev_err(ctz->dev, "invalid sample rate %d\n", tmp);
> > > +			return -EINVAL;
> > > +		}
> > > +
> > > +		ctz->sample_cycle = 1000000 / tmp;
> > > +	}
> > > +
> > > +	return 0;
> > > +}
> > > +
> > > +static int cv180x_thermal_probe(struct platform_device *pdev)
> > > +{
> > > +	struct cv180x_thermal_zone *ctz;
> > > +	struct thermal_zone_device *tz;
> > > +	struct resource *res;
> > > +	int ret;
> > > +
> > > +	ctz = devm_kzalloc(&pdev->dev, sizeof(*ctz), GFP_KERNEL);
> > > +	if (!ctz)
> > > +		return -ENOMEM;
> > > +
> > > +	ctz->dev = &pdev->dev;
> > > +
> > > +	ret = cv180x_parse_dt(ctz);
> > > +	if (ret)
> > > +		return dev_err_probe(&pdev->dev, ret, "failed to parse dt\n");
> > > +
> > > +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > > +	ctz->base = devm_ioremap_resource(&pdev->dev, res);
> > > +	if (IS_ERR(ctz->base))
> > > +		return dev_err_probe(&pdev->dev, PTR_ERR(ctz->base),
> > > +				     "failed to map tempsen registers\n");
> > > +
> > > +	ctz->clk_tempsen = devm_clk_get_enabled(&pdev->dev, NULL);
> > > +	if (IS_ERR(ctz->clk_tempsen))
> > > +		return dev_err_probe(&pdev->dev, PTR_ERR(ctz->clk_tempsen),
> > > +				     "failed to get clk_tempsen\n");
> > > +
> > > +	cv180x_thermal_init(ctz);
> > > +
> > > +	tz = devm_thermal_of_zone_register(&pdev->dev, 0, ctz,
> > > +					   &cv180x_thermal_ops);
> > > +	if (IS_ERR(tz))
> > > +		return dev_err_probe(&pdev->dev, PTR_ERR(tz),
> > > +				     "failed to register thermal zone\n");
> > > +
> > > +	platform_set_drvdata(pdev, ctz);
> > > +
> > > +	return 0;
> > > +}
> > > +
> > > +static int cv180x_thermal_remove(struct platform_device *pdev)
> > > +{
> > > +	struct cv180x_thermal_zone *ctz = platform_get_drvdata(pdev);
> > > +
> > > +	cv180x_thermal_deinit(ctz);
> > > +
> > > +	return 0;
> > > +}
> > > +
> > > +static int __maybe_unused cv180x_thermal_suspend(struct device *dev)
> > > +{
> > > +	struct cv180x_thermal_zone *ctz = dev_get_drvdata(dev);
> > > +
> > > +	cv180x_thermal_deinit(ctz);
> > > +	clk_disable_unprepare(ctz->clk_tempsen);
> > > +
> > > +	return 0;
> > > +}
> > > +
> > > +static int __maybe_unused cv180x_thermal_resume(struct device *dev)
> > > +{
> > > +	struct cv180x_thermal_zone *ctz = dev_get_drvdata(dev);
> > > +
> > > +	clk_prepare_enable(ctz->clk_tempsen);
> > > +	cv180x_thermal_init(ctz);
> > > +
> > > +	return 0;
> > > +}
> > > +
> > > +static SIMPLE_DEV_PM_OPS(cv180x_thermal_pm_ops,
> > > +			 cv180x_thermal_suspend, cv180x_thermal_resume);
> > > +
> > > +static struct platform_driver cv180x_thermal_driver = {
> > > +	.probe = cv180x_thermal_probe,
> > > +	.remove = cv180x_thermal_remove,
> > > +	.driver = {
> > > +		.name = "cv180x-thermal",
> > > +		.pm = &cv180x_thermal_pm_ops,
> > > +		.of_match_table = cv180x_thermal_of_match,
> > > +	},
> > > +};
> > > +
> > > +module_platform_driver(cv180x_thermal_driver);
> > > +
> > > +MODULE_DESCRIPTION("Sophgo CV180x thermal driver");
> > > +MODULE_AUTHOR("Haylen Chu <heylenay@outlook.com>");
> > > +MODULE_LICENSE("GPL");
> > > -- 
> > > 2.45.2
> > > 
> > 
> > Where is interrupt handler? I see nothing about it.
> > 
> > Regards,
> > Inochi
> 
> Interrupts are not used. This driver implements only polling the
> temperature.
> 
> Best regards,
> Haylen Chu

"xxx is not used" is not the reason for you to not implement it.
In addition, interrupt-driven is not just for reading sensors. I
have seen something important like critical alert. Drop interrupt
support may miss these alert.
If you do not want to implement this, move your driver to staging 
as it is not complete.

Regard,
Inochi

[v4,0/3] riscv: sophgo: add thermal sensor support for cv180x/sg200x SoCs

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