diff mbox series

[1/3] dt-bindings: pinctrl: Add support for Xilinx Versal platform

Message ID 20240711103317.891813-2-sai.krishna.potthuri@amd.com
State New
Headers show
Series pinctrl: pinctrl-zynqmp: Add Versal platform support | expand

Commit Message

Potthuri, Sai Krishna July 11, 2024, 10:33 a.m. UTC
Add Xilinx Versal compatible string and corresponding groups, function and
pins properties to support pin controller features on Versal platform.

Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
---
 .../bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml | 509 +++++++++++-------
 1 file changed, 329 insertions(+), 180 deletions(-)

Comments

Rob Herring July 11, 2024, 10:36 p.m. UTC | #1
On Thu, Jul 11, 2024 at 04:03:15PM +0530, Sai Krishna Potthuri wrote:
> Add Xilinx Versal compatible string and corresponding groups, function and
> pins properties to support pin controller features on Versal platform.
> 
> Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
> ---
>  .../bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml | 509 +++++++++++-------
>  1 file changed, 329 insertions(+), 180 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
> index ce66fd15ff9c..68c378b17f49 100644
> --- a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
> @@ -28,7 +28,9 @@ description: |
>  
>  properties:
>    compatible:
> -    const: xlnx,zynqmp-pinctrl
> +    enum:
> +      - xlnx,zynqmp-pinctrl
> +      - xlnx,versal-pinctrl
>  
>  patternProperties:
>    '^(.*-)?(default|gpio-grp)$':
> @@ -46,196 +48,334 @@ patternProperties:
>              description:
>                List of pins to select (either this or "groups" must be specified)
>              items:
> -              pattern: '^MIO([0-9]|[1-6][0-9]|7[0-7])$'
> +              allOf:
> +                - if:
> +                    properties:
> +                      compatible:
> +                        contains:
> +                          const: xlnx,zynqmp-pinctrl
> +                  then:
> +                    pattern: '^MIO([0-9]|[1-6][0-9]|7[0-7])$'
> +                  else:
> +                    pattern: '^((LPD|PMC)_)?MIO([0-9]|[1-6][0-9]|7[0-7])$'

Did you test whether this works? It doesn't because the schema is 
nonsense. The schema applies to a property's value, but the "if" schema 
applies to a node. And it's not even the node you are at, but the parent 
node. IOW, there is no "compatible" in this node.

The 'else' schema covers both cases, so I'd just change the pattern and 
be done with it.

However, based on the rest of the patch, you should just do a new schema 
doc. There's little overlap of the values.

Rob
Potthuri, Sai Krishna July 15, 2024, 9:40 a.m. UTC | #2
Hi Rob,

> -----Original Message-----
> From: Rob Herring <robh@kernel.org>
> Sent: Friday, July 12, 2024 4:06 AM
> To: Potthuri, Sai Krishna <sai.krishna.potthuri@amd.com>
> Cc: Linus Walleij <linus.walleij@linaro.org>; Simek, Michal
> <michal.simek@amd.com>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@linaro.org>; Conor Dooley <conor+dt@kernel.org>;
> Buddhabhatti, Jay <jay.buddhabhatti@amd.com>; Dhaval Shah
> <dhaval.r.shah@amd.com>; Kundanala, Praveen Teja
> <praveen.teja.kundanala@amd.com>; Greg Kroah-Hartman
> <gregkh@linuxfoundation.org>; linux-arm-kernel@lists.infradead.org; linux-
> kernel@vger.kernel.org; linux-gpio@vger.kernel.org;
> devicetree@vger.kernel.org; saikrishna12468@gmail.com; git (AMD-Xilinx)
> <git@amd.com>
> Subject: Re: [PATCH 1/3] dt-bindings: pinctrl: Add support for Xilinx Versal
> platform
> 
> On Thu, Jul 11, 2024 at 04:03:15PM +0530, Sai Krishna Potthuri wrote:
> > Add Xilinx Versal compatible string and corresponding groups, function
> > and pins properties to support pin controller features on Versal platform.
> >
> > Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
> > ---
> >  .../bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml | 509
> > +++++++++++-------
> >  1 file changed, 329 insertions(+), 180 deletions(-)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
> > b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
> > index ce66fd15ff9c..68c378b17f49 100644
> > ---
> > a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
> > +++ b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.ya
> > +++ ml
> > @@ -28,7 +28,9 @@ description: |
> >
> >  properties:
> >    compatible:
> > -    const: xlnx,zynqmp-pinctrl
> > +    enum:
> > +      - xlnx,zynqmp-pinctrl
> > +      - xlnx,versal-pinctrl
> >
> >  patternProperties:
> >    '^(.*-)?(default|gpio-grp)$':
> > @@ -46,196 +48,334 @@ patternProperties:
> >              description:
> >                List of pins to select (either this or "groups" must be specified)
> >              items:
> > -              pattern: '^MIO([0-9]|[1-6][0-9]|7[0-7])$'
> > +              allOf:
> > +                - if:
> > +                    properties:
> > +                      compatible:
> > +                        contains:
> > +                          const: xlnx,zynqmp-pinctrl
> > +                  then:
> > +                    pattern: '^MIO([0-9]|[1-6][0-9]|7[0-7])$'
> > +                  else:
> > +                    pattern: '^((LPD|PMC)_)?MIO([0-9]|[1-6][0-9]|7[0-7])$'
> 
> Did you test whether this works? It doesn't because the schema is
> nonsense. The schema applies to a property's value, but the "if" schema
> applies to a node. And it's not even the node you are at, but the parent
> node. IOW, there is no "compatible" in this node.
> 
> The 'else' schema covers both cases, so I'd just change the pattern and be
> done with it.
Ok, got it. Realized now that while testing i used group which is common for
both the platforms, might be that is the reason it did not flagged any issue.
> 
> However, based on the rest of the patch, you should just do a new schema
> doc. There's little overlap of the values.
Ok, will create a new binding document for Versal platform.

Regards
Sai Krishna
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
index ce66fd15ff9c..68c378b17f49 100644
--- a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml
@@ -28,7 +28,9 @@  description: |
 
 properties:
   compatible:
-    const: xlnx,zynqmp-pinctrl
+    enum:
+      - xlnx,zynqmp-pinctrl
+      - xlnx,versal-pinctrl
 
 patternProperties:
   '^(.*-)?(default|gpio-grp)$':
@@ -46,196 +48,334 @@  patternProperties:
             description:
               List of pins to select (either this or "groups" must be specified)
             items:
-              pattern: '^MIO([0-9]|[1-6][0-9]|7[0-7])$'
+              allOf:
+                - if:
+                    properties:
+                      compatible:
+                        contains:
+                          const: xlnx,zynqmp-pinctrl
+                  then:
+                    pattern: '^MIO([0-9]|[1-6][0-9]|7[0-7])$'
+                  else:
+                    pattern: '^((LPD|PMC)_)?MIO([0-9]|[1-6][0-9]|7[0-7])$'
 
           groups:
             description:
               List of groups to select (either this or "pins" must be
               specified), available groups for this subnode.
             items:
-              anyOf:
-                - pattern: '^MIO([0-9]|[1-6][0-9]|7[0-7])$'
-                - enum: [ethernet0_0_grp, ethernet1_0_grp, ethernet2_0_grp,
-                         ethernet3_0_grp, gemtsu0_0_grp, gemtsu0_1_grp,
-                         gemtsu0_2_grp, mdio0_0_grp, mdio1_0_grp,
-                         mdio1_1_grp, mdio2_0_grp, mdio3_0_grp,
-                         qspi0_0_grp, qspi_ss_0_grp, qspi_fbclk_0_grp,
-                         spi0_0_grp, spi0_ss_0_grp, spi0_ss_1_grp,
-                         spi0_ss_2_grp, spi0_1_grp, spi0_ss_3_grp,
-                         spi0_ss_4_grp, spi0_ss_5_grp, spi0_2_grp,
-                         spi0_ss_6_grp, spi0_ss_7_grp, spi0_ss_8_grp,
-                         spi0_3_grp, spi0_ss_9_grp, spi0_ss_10_grp,
-                         spi0_ss_11_grp, spi0_4_grp, spi0_ss_12_grp,
-                         spi0_ss_13_grp, spi0_ss_14_grp, spi0_5_grp,
-                         spi0_ss_15_grp, spi0_ss_16_grp, spi0_ss_17_grp,
-                         spi1_0_grp, spi1_ss_0_grp, spi1_ss_1_grp,
-                         spi1_ss_2_grp, spi1_1_grp, spi1_ss_3_grp,
-                         spi1_ss_4_grp, spi1_ss_5_grp, spi1_2_grp,
-                         spi1_ss_6_grp, spi1_ss_7_grp, spi1_ss_8_grp,
-                         spi1_3_grp, spi1_ss_9_grp, spi1_ss_10_grp,
-                         spi1_ss_11_grp, spi1_4_grp, spi1_ss_12_grp,
-                         spi1_ss_13_grp, spi1_ss_14_grp, spi1_5_grp,
-                         spi1_ss_15_grp, spi1_ss_16_grp, spi1_ss_17_grp,
-                         sdio0_0_grp, sdio0_1_grp, sdio0_2_grp,
-                         sdio0_3_grp, sdio0_4_grp, sdio0_5_grp,
-                         sdio0_6_grp, sdio0_7_grp, sdio0_8_grp,
-                         sdio0_9_grp, sdio0_10_grp, sdio0_11_grp,
-                         sdio0_12_grp, sdio0_13_grp, sdio0_14_grp,
-                         sdio0_15_grp, sdio0_16_grp, sdio0_17_grp,
-                         sdio0_18_grp, sdio0_19_grp, sdio0_20_grp,
-                         sdio0_21_grp, sdio0_22_grp, sdio0_23_grp,
-                         sdio0_24_grp, sdio0_25_grp, sdio0_26_grp,
-                         sdio0_27_grp, sdio0_28_grp, sdio0_29_grp,
-                         sdio0_30_grp, sdio0_31_grp, sdio0_32_grp,
-                         sdio0_pc_0_grp, sdio0_cd_0_grp, sdio0_wp_0_grp,
-                         sdio0_pc_1_grp, sdio0_cd_1_grp, sdio0_wp_1_grp,
-                         sdio0_pc_2_grp, sdio0_cd_2_grp, sdio0_wp_2_grp,
-                         sdio1_0_grp, sdio1_1_grp, sdio1_2_grp,
-                         sdio1_3_grp, sdio1_4_grp, sdio1_5_grp,
-                         sdio1_6_grp, sdio1_7_grp, sdio1_8_grp,
-                         sdio1_9_grp, sdio1_10_grp, sdio1_11_grp,
-                         sdio1_12_grp, sdio1_13_grp, sdio1_14_grp,
-                         sdio1_15_grp, sdio1_pc_0_grp, sdio1_cd_0_grp,
-                         sdio1_wp_0_grp, sdio1_pc_1_grp, sdio1_cd_1_grp,
-                         sdio1_wp_1_grp, nand0_0_grp, nand0_ce_0_grp,
-                         nand0_rb_0_grp, nand0_dqs_0_grp, nand0_ce_1_grp,
-                         nand0_rb_1_grp, nand0_dqs_1_grp, can0_0_grp,
-                         can0_1_grp, can0_2_grp, can0_3_grp,
-                         can0_4_grp, can0_5_grp, can0_6_grp,
-                         can0_7_grp, can0_8_grp, can0_9_grp,
-                         can0_10_grp, can0_11_grp, can0_12_grp,
-                         can0_13_grp, can0_14_grp, can0_15_grp,
-                         can0_16_grp, can0_17_grp, can0_18_grp,
-                         can1_0_grp, can1_1_grp, can1_2_grp,
-                         can1_3_grp, can1_4_grp, can1_5_grp,
-                         can1_6_grp, can1_7_grp, can1_8_grp,
-                         can1_9_grp, can1_10_grp, can1_11_grp,
-                         can1_12_grp, can1_13_grp, can1_14_grp,
-                         can1_15_grp, can1_16_grp, can1_17_grp,
-                         can1_18_grp, can1_19_grp, uart0_0_grp,
-                         uart0_1_grp, uart0_2_grp, uart0_3_grp,
-                         uart0_4_grp, uart0_5_grp, uart0_6_grp,
-                         uart0_7_grp, uart0_8_grp, uart0_9_grp,
-                         uart0_10_grp, uart0_11_grp, uart0_12_grp,
-                         uart0_13_grp, uart0_14_grp, uart0_15_grp,
-                         uart0_16_grp, uart0_17_grp, uart0_18_grp,
-                         uart1_0_grp, uart1_1_grp, uart1_2_grp,
-                         uart1_3_grp, uart1_4_grp, uart1_5_grp,
-                         uart1_6_grp, uart1_7_grp, uart1_8_grp,
-                         uart1_9_grp, uart1_10_grp, uart1_11_grp,
-                         uart1_12_grp, uart1_13_grp, uart1_14_grp,
-                         uart1_15_grp, uart1_16_grp, uart1_17_grp,
-                         uart1_18_grp, i2c0_0_grp, i2c0_1_grp,
-                         i2c0_2_grp, i2c0_3_grp, i2c0_4_grp,
-                         i2c0_5_grp, i2c0_6_grp, i2c0_7_grp,
-                         i2c0_8_grp, i2c0_9_grp, i2c0_10_grp,
-                         i2c0_11_grp, i2c0_12_grp, i2c0_13_grp,
-                         i2c0_14_grp, i2c0_15_grp, i2c0_16_grp,
-                         i2c0_17_grp, i2c0_18_grp, i2c1_0_grp,
-                         i2c1_1_grp, i2c1_2_grp, i2c1_3_grp,
-                         i2c1_4_grp, i2c1_5_grp, i2c1_6_grp,
-                         i2c1_7_grp, i2c1_8_grp, i2c1_9_grp,
-                         i2c1_10_grp, i2c1_11_grp, i2c1_12_grp,
-                         i2c1_13_grp, i2c1_14_grp, i2c1_15_grp,
-                         i2c1_16_grp, i2c1_17_grp, i2c1_18_grp,
-                         i2c1_19_grp, ttc0_clk_0_grp, ttc0_wav_0_grp,
-                         ttc0_clk_1_grp, ttc0_wav_1_grp, ttc0_clk_2_grp,
-                         ttc0_wav_2_grp, ttc0_clk_3_grp, ttc0_wav_3_grp,
-                         ttc0_clk_4_grp, ttc0_wav_4_grp, ttc0_clk_5_grp,
-                         ttc0_wav_5_grp, ttc0_clk_6_grp, ttc0_wav_6_grp,
-                         ttc0_clk_7_grp, ttc0_wav_7_grp, ttc0_clk_8_grp,
-                         ttc0_wav_8_grp, ttc1_clk_0_grp, ttc1_wav_0_grp,
-                         ttc1_clk_1_grp, ttc1_wav_1_grp, ttc1_clk_2_grp,
-                         ttc1_wav_2_grp, ttc1_clk_3_grp, ttc1_wav_3_grp,
-                         ttc1_clk_4_grp, ttc1_wav_4_grp, ttc1_clk_5_grp,
-                         ttc1_wav_5_grp, ttc1_clk_6_grp, ttc1_wav_6_grp,
-                         ttc1_clk_7_grp, ttc1_wav_7_grp, ttc1_clk_8_grp,
-                         ttc1_wav_8_grp, ttc2_clk_0_grp, ttc2_wav_0_grp,
-                         ttc2_clk_1_grp, ttc2_wav_1_grp, ttc2_clk_2_grp,
-                         ttc2_wav_2_grp, ttc2_clk_3_grp, ttc2_wav_3_grp,
-                         ttc2_clk_4_grp, ttc2_wav_4_grp, ttc2_clk_5_grp,
-                         ttc2_wav_5_grp, ttc2_clk_6_grp, ttc2_wav_6_grp,
-                         ttc2_clk_7_grp, ttc2_wav_7_grp, ttc2_clk_8_grp,
-                         ttc2_wav_8_grp, ttc3_clk_0_grp, ttc3_wav_0_grp,
-                         ttc3_clk_1_grp, ttc3_wav_1_grp, ttc3_clk_2_grp,
-                         ttc3_wav_2_grp, ttc3_clk_3_grp, ttc3_wav_3_grp,
-                         ttc3_clk_4_grp, ttc3_wav_4_grp, ttc3_clk_5_grp,
-                         ttc3_wav_5_grp, ttc3_clk_6_grp, ttc3_wav_6_grp,
-                         ttc3_clk_7_grp, ttc3_wav_7_grp, ttc3_clk_8_grp,
-                         ttc3_wav_8_grp, swdt0_clk_0_grp, swdt0_rst_0_grp,
-                         swdt0_clk_1_grp, swdt0_rst_1_grp, swdt0_clk_2_grp,
-                         swdt0_rst_2_grp, swdt0_clk_3_grp, swdt0_rst_3_grp,
-                         swdt0_clk_4_grp, swdt0_rst_4_grp, swdt0_clk_5_grp,
-                         swdt0_rst_5_grp, swdt0_clk_6_grp, swdt0_rst_6_grp,
-                         swdt0_clk_7_grp, swdt0_rst_7_grp, swdt0_clk_8_grp,
-                         swdt0_rst_8_grp, swdt0_clk_9_grp, swdt0_rst_9_grp,
-                         swdt0_clk_10_grp, swdt0_rst_10_grp, swdt0_clk_11_grp,
-                         swdt0_rst_11_grp, swdt0_clk_12_grp, swdt0_rst_12_grp,
-                         swdt1_clk_0_grp, swdt1_rst_0_grp, swdt1_clk_1_grp,
-                         swdt1_rst_1_grp, swdt1_clk_2_grp, swdt1_rst_2_grp,
-                         swdt1_clk_3_grp, swdt1_rst_3_grp, swdt1_clk_4_grp,
-                         swdt1_rst_4_grp, swdt1_clk_5_grp, swdt1_rst_5_grp,
-                         swdt1_clk_6_grp, swdt1_rst_6_grp, swdt1_clk_7_grp,
-                         swdt1_rst_7_grp, swdt1_clk_8_grp, swdt1_rst_8_grp,
-                         swdt1_clk_9_grp, swdt1_rst_9_grp, swdt1_clk_10_grp,
-                         swdt1_rst_10_grp, swdt1_clk_11_grp, swdt1_rst_11_grp,
-                         swdt1_clk_12_grp, swdt1_rst_12_grp, gpio0_0_grp,
-                         gpio0_1_grp, gpio0_2_grp, gpio0_3_grp,
-                         gpio0_4_grp, gpio0_5_grp, gpio0_6_grp,
-                         gpio0_7_grp, gpio0_8_grp, gpio0_9_grp,
-                         gpio0_10_grp, gpio0_11_grp, gpio0_12_grp,
-                         gpio0_13_grp, gpio0_14_grp, gpio0_15_grp,
-                         gpio0_16_grp, gpio0_17_grp, gpio0_18_grp,
-                         gpio0_19_grp, gpio0_20_grp, gpio0_21_grp,
-                         gpio0_22_grp, gpio0_23_grp, gpio0_24_grp,
-                         gpio0_25_grp, gpio0_26_grp, gpio0_27_grp,
-                         gpio0_28_grp, gpio0_29_grp, gpio0_30_grp,
-                         gpio0_31_grp, gpio0_32_grp, gpio0_33_grp,
-                         gpio0_34_grp, gpio0_35_grp, gpio0_36_grp,
-                         gpio0_37_grp, gpio0_38_grp, gpio0_39_grp,
-                         gpio0_40_grp, gpio0_41_grp, gpio0_42_grp,
-                         gpio0_43_grp, gpio0_44_grp, gpio0_45_grp,
-                         gpio0_46_grp, gpio0_47_grp, gpio0_48_grp,
-                         gpio0_49_grp, gpio0_50_grp, gpio0_51_grp,
-                         gpio0_52_grp, gpio0_53_grp, gpio0_54_grp,
-                         gpio0_55_grp, gpio0_56_grp, gpio0_57_grp,
-                         gpio0_58_grp, gpio0_59_grp, gpio0_60_grp,
-                         gpio0_61_grp, gpio0_62_grp, gpio0_63_grp,
-                         gpio0_64_grp, gpio0_65_grp, gpio0_66_grp,
-                         gpio0_67_grp, gpio0_68_grp, gpio0_69_grp,
-                         gpio0_70_grp, gpio0_71_grp, gpio0_72_grp,
-                         gpio0_73_grp, gpio0_74_grp, gpio0_75_grp,
-                         gpio0_76_grp, gpio0_77_grp, usb0_0_grp,
-                         usb1_0_grp, pmu0_0_grp, pmu0_1_grp,
-                         pmu0_2_grp, pmu0_3_grp, pmu0_4_grp,
-                         pmu0_5_grp, pmu0_6_grp, pmu0_7_grp,
-                         pmu0_8_grp, pmu0_9_grp, pmu0_10_grp,
-                         pmu0_11_grp, pcie0_0_grp, pcie0_1_grp,
-                         pcie0_2_grp, pcie0_3_grp, pcie0_4_grp,
-                         pcie0_5_grp, pcie0_6_grp, pcie0_7_grp,
-                         csu0_0_grp, csu0_1_grp, csu0_2_grp,
-                         csu0_3_grp, csu0_4_grp, csu0_5_grp,
-                         csu0_6_grp, csu0_7_grp, csu0_8_grp,
-                         csu0_9_grp, csu0_10_grp, csu0_11_grp,
-                         dpaux0_0_grp, dpaux0_1_grp, dpaux0_2_grp,
-                         dpaux0_3_grp, pjtag0_0_grp, pjtag0_1_grp,
-                         pjtag0_2_grp, pjtag0_3_grp, pjtag0_4_grp,
-                         pjtag0_5_grp, trace0_0_grp, trace0_clk_0_grp,
-                         trace0_1_grp, trace0_clk_1_grp, trace0_2_grp,
-                         trace0_clk_2_grp, testscan0_0_grp]
+              allOf:
+                - if:
+                    properties:
+                      compatible:
+                        contains:
+                          const: xlnx,zynqmp-pinctrl
+                  then:
+                    anyOf:
+                      - pattern: '^MIO([0-9]|[1-6][0-9]|7[0-7])$'
+                      - enum: [ethernet0_0_grp, ethernet1_0_grp, ethernet2_0_grp,
+                               ethernet3_0_grp, gemtsu0_0_grp, gemtsu0_1_grp,
+                               gemtsu0_2_grp, mdio0_0_grp, mdio1_0_grp,
+                               mdio1_1_grp, mdio2_0_grp, mdio3_0_grp,
+                               qspi0_0_grp, qspi_ss_0_grp, qspi_fbclk_0_grp,
+                               spi0_0_grp, spi0_ss_0_grp, spi0_ss_1_grp,
+                               spi0_ss_2_grp, spi0_1_grp, spi0_ss_3_grp,
+                               spi0_ss_4_grp, spi0_ss_5_grp, spi0_2_grp,
+                               spi0_ss_6_grp, spi0_ss_7_grp, spi0_ss_8_grp,
+                               spi0_3_grp, spi0_ss_9_grp, spi0_ss_10_grp,
+                               spi0_ss_11_grp, spi0_4_grp, spi0_ss_12_grp,
+                               spi0_ss_13_grp, spi0_ss_14_grp, spi0_5_grp,
+                               spi0_ss_15_grp, spi0_ss_16_grp, spi0_ss_17_grp,
+                               spi1_0_grp, spi1_ss_0_grp, spi1_ss_1_grp,
+                               spi1_ss_2_grp, spi1_1_grp, spi1_ss_3_grp,
+                               spi1_ss_4_grp, spi1_ss_5_grp, spi1_2_grp,
+                               spi1_ss_6_grp, spi1_ss_7_grp, spi1_ss_8_grp,
+                               spi1_3_grp, spi1_ss_9_grp, spi1_ss_10_grp,
+                               spi1_ss_11_grp, spi1_4_grp, spi1_ss_12_grp,
+                               spi1_ss_13_grp, spi1_ss_14_grp, spi1_5_grp,
+                               spi1_ss_15_grp, spi1_ss_16_grp, spi1_ss_17_grp,
+                               sdio0_0_grp, sdio0_1_grp, sdio0_2_grp,
+                               sdio0_3_grp, sdio0_4_grp, sdio0_5_grp,
+                               sdio0_6_grp, sdio0_7_grp, sdio0_8_grp,
+                               sdio0_9_grp, sdio0_10_grp, sdio0_11_grp,
+                               sdio0_12_grp, sdio0_13_grp, sdio0_14_grp,
+                               sdio0_15_grp, sdio0_16_grp, sdio0_17_grp,
+                               sdio0_18_grp, sdio0_19_grp, sdio0_20_grp,
+                               sdio0_21_grp, sdio0_22_grp, sdio0_23_grp,
+                               sdio0_24_grp, sdio0_25_grp, sdio0_26_grp,
+                               sdio0_27_grp, sdio0_28_grp, sdio0_29_grp,
+                               sdio0_30_grp, sdio0_31_grp, sdio0_32_grp,
+                               sdio0_pc_0_grp, sdio0_cd_0_grp, sdio0_wp_0_grp,
+                               sdio0_pc_1_grp, sdio0_cd_1_grp, sdio0_wp_1_grp,
+                               sdio0_pc_2_grp, sdio0_cd_2_grp, sdio0_wp_2_grp,
+                               sdio1_0_grp, sdio1_1_grp, sdio1_2_grp,
+                               sdio1_3_grp, sdio1_4_grp, sdio1_5_grp,
+                               sdio1_6_grp, sdio1_7_grp, sdio1_8_grp,
+                               sdio1_9_grp, sdio1_10_grp, sdio1_11_grp,
+                               sdio1_12_grp, sdio1_13_grp, sdio1_14_grp,
+                               sdio1_15_grp, sdio1_pc_0_grp, sdio1_cd_0_grp,
+                               sdio1_wp_0_grp, sdio1_pc_1_grp, sdio1_cd_1_grp,
+                               sdio1_wp_1_grp, nand0_0_grp, nand0_ce_0_grp,
+                               nand0_rb_0_grp, nand0_dqs_0_grp, nand0_ce_1_grp,
+                               nand0_rb_1_grp, nand0_dqs_1_grp, can0_0_grp,
+                               can0_1_grp, can0_2_grp, can0_3_grp,
+                               can0_4_grp, can0_5_grp, can0_6_grp,
+                               can0_7_grp, can0_8_grp, can0_9_grp,
+                               can0_10_grp, can0_11_grp, can0_12_grp,
+                               can0_13_grp, can0_14_grp, can0_15_grp,
+                               can0_16_grp, can0_17_grp, can0_18_grp,
+                               can1_0_grp, can1_1_grp, can1_2_grp,
+                               can1_3_grp, can1_4_grp, can1_5_grp,
+                               can1_6_grp, can1_7_grp, can1_8_grp,
+                               can1_9_grp, can1_10_grp, can1_11_grp,
+                               can1_12_grp, can1_13_grp, can1_14_grp,
+                               can1_15_grp, can1_16_grp, can1_17_grp,
+                               can1_18_grp, can1_19_grp, uart0_0_grp,
+                               uart0_1_grp, uart0_2_grp, uart0_3_grp,
+                               uart0_4_grp, uart0_5_grp, uart0_6_grp,
+                               uart0_7_grp, uart0_8_grp, uart0_9_grp,
+                               uart0_10_grp, uart0_11_grp, uart0_12_grp,
+                               uart0_13_grp, uart0_14_grp, uart0_15_grp,
+                               uart0_16_grp, uart0_17_grp, uart0_18_grp,
+                               uart1_0_grp, uart1_1_grp, uart1_2_grp,
+                               uart1_3_grp, uart1_4_grp, uart1_5_grp,
+                               uart1_6_grp, uart1_7_grp, uart1_8_grp,
+                               uart1_9_grp, uart1_10_grp, uart1_11_grp,
+                               uart1_12_grp, uart1_13_grp, uart1_14_grp,
+                               uart1_15_grp, uart1_16_grp, uart1_17_grp,
+                               uart1_18_grp, i2c0_0_grp, i2c0_1_grp,
+                               i2c0_2_grp, i2c0_3_grp, i2c0_4_grp,
+                               i2c0_5_grp, i2c0_6_grp, i2c0_7_grp,
+                               i2c0_8_grp, i2c0_9_grp, i2c0_10_grp,
+                               i2c0_11_grp, i2c0_12_grp, i2c0_13_grp,
+                               i2c0_14_grp, i2c0_15_grp, i2c0_16_grp,
+                               i2c0_17_grp, i2c0_18_grp, i2c1_0_grp,
+                               i2c1_1_grp, i2c1_2_grp, i2c1_3_grp,
+                               i2c1_4_grp, i2c1_5_grp, i2c1_6_grp,
+                               i2c1_7_grp, i2c1_8_grp, i2c1_9_grp,
+                               i2c1_10_grp, i2c1_11_grp, i2c1_12_grp,
+                               i2c1_13_grp, i2c1_14_grp, i2c1_15_grp,
+                               i2c1_16_grp, i2c1_17_grp, i2c1_18_grp,
+                               i2c1_19_grp, ttc0_clk_0_grp, ttc0_wav_0_grp,
+                               ttc0_clk_1_grp, ttc0_wav_1_grp, ttc0_clk_2_grp,
+                               ttc0_wav_2_grp, ttc0_clk_3_grp, ttc0_wav_3_grp,
+                               ttc0_clk_4_grp, ttc0_wav_4_grp, ttc0_clk_5_grp,
+                               ttc0_wav_5_grp, ttc0_clk_6_grp, ttc0_wav_6_grp,
+                               ttc0_clk_7_grp, ttc0_wav_7_grp, ttc0_clk_8_grp,
+                               ttc0_wav_8_grp, ttc1_clk_0_grp, ttc1_wav_0_grp,
+                               ttc1_clk_1_grp, ttc1_wav_1_grp, ttc1_clk_2_grp,
+                               ttc1_wav_2_grp, ttc1_clk_3_grp, ttc1_wav_3_grp,
+                               ttc1_clk_4_grp, ttc1_wav_4_grp, ttc1_clk_5_grp,
+                               ttc1_wav_5_grp, ttc1_clk_6_grp, ttc1_wav_6_grp,
+                               ttc1_clk_7_grp, ttc1_wav_7_grp, ttc1_clk_8_grp,
+                               ttc1_wav_8_grp, ttc2_clk_0_grp, ttc2_wav_0_grp,
+                               ttc2_clk_1_grp, ttc2_wav_1_grp, ttc2_clk_2_grp,
+                               ttc2_wav_2_grp, ttc2_clk_3_grp, ttc2_wav_3_grp,
+                               ttc2_clk_4_grp, ttc2_wav_4_grp, ttc2_clk_5_grp,
+                               ttc2_wav_5_grp, ttc2_clk_6_grp, ttc2_wav_6_grp,
+                               ttc2_clk_7_grp, ttc2_wav_7_grp, ttc2_clk_8_grp,
+                               ttc2_wav_8_grp, ttc3_clk_0_grp, ttc3_wav_0_grp,
+                               ttc3_clk_1_grp, ttc3_wav_1_grp, ttc3_clk_2_grp,
+                               ttc3_wav_2_grp, ttc3_clk_3_grp, ttc3_wav_3_grp,
+                               ttc3_clk_4_grp, ttc3_wav_4_grp, ttc3_clk_5_grp,
+                               ttc3_wav_5_grp, ttc3_clk_6_grp, ttc3_wav_6_grp,
+                               ttc3_clk_7_grp, ttc3_wav_7_grp, ttc3_clk_8_grp,
+                               ttc3_wav_8_grp, swdt0_clk_0_grp, swdt0_rst_0_grp,
+                               swdt0_clk_1_grp, swdt0_rst_1_grp, swdt0_clk_2_grp,
+                               swdt0_rst_2_grp, swdt0_clk_3_grp, swdt0_rst_3_grp,
+                               swdt0_clk_4_grp, swdt0_rst_4_grp, swdt0_clk_5_grp,
+                               swdt0_rst_5_grp, swdt0_clk_6_grp, swdt0_rst_6_grp,
+                               swdt0_clk_7_grp, swdt0_rst_7_grp, swdt0_clk_8_grp,
+                               swdt0_rst_8_grp, swdt0_clk_9_grp, swdt0_rst_9_grp,
+                               swdt0_clk_10_grp, swdt0_rst_10_grp, swdt0_clk_11_grp,
+                               swdt0_rst_11_grp, swdt0_clk_12_grp, swdt0_rst_12_grp,
+                               swdt1_clk_0_grp, swdt1_rst_0_grp, swdt1_clk_1_grp,
+                               swdt1_rst_1_grp, swdt1_clk_2_grp, swdt1_rst_2_grp,
+                               swdt1_clk_3_grp, swdt1_rst_3_grp, swdt1_clk_4_grp,
+                               swdt1_rst_4_grp, swdt1_clk_5_grp, swdt1_rst_5_grp,
+                               swdt1_clk_6_grp, swdt1_rst_6_grp, swdt1_clk_7_grp,
+                               swdt1_rst_7_grp, swdt1_clk_8_grp, swdt1_rst_8_grp,
+                               swdt1_clk_9_grp, swdt1_rst_9_grp, swdt1_clk_10_grp,
+                               swdt1_rst_10_grp, swdt1_clk_11_grp, swdt1_rst_11_grp,
+                               swdt1_clk_12_grp, swdt1_rst_12_grp, gpio0_0_grp,
+                               gpio0_1_grp, gpio0_2_grp, gpio0_3_grp,
+                               gpio0_4_grp, gpio0_5_grp, gpio0_6_grp,
+                               gpio0_7_grp, gpio0_8_grp, gpio0_9_grp,
+                               gpio0_10_grp, gpio0_11_grp, gpio0_12_grp,
+                               gpio0_13_grp, gpio0_14_grp, gpio0_15_grp,
+                               gpio0_16_grp, gpio0_17_grp, gpio0_18_grp,
+                               gpio0_19_grp, gpio0_20_grp, gpio0_21_grp,
+                               gpio0_22_grp, gpio0_23_grp, gpio0_24_grp,
+                               gpio0_25_grp, gpio0_26_grp, gpio0_27_grp,
+                               gpio0_28_grp, gpio0_29_grp, gpio0_30_grp,
+                               gpio0_31_grp, gpio0_32_grp, gpio0_33_grp,
+                               gpio0_34_grp, gpio0_35_grp, gpio0_36_grp,
+                               gpio0_37_grp, gpio0_38_grp, gpio0_39_grp,
+                               gpio0_40_grp, gpio0_41_grp, gpio0_42_grp,
+                               gpio0_43_grp, gpio0_44_grp, gpio0_45_grp,
+                               gpio0_46_grp, gpio0_47_grp, gpio0_48_grp,
+                               gpio0_49_grp, gpio0_50_grp, gpio0_51_grp,
+                               gpio0_52_grp, gpio0_53_grp, gpio0_54_grp,
+                               gpio0_55_grp, gpio0_56_grp, gpio0_57_grp,
+                               gpio0_58_grp, gpio0_59_grp, gpio0_60_grp,
+                               gpio0_61_grp, gpio0_62_grp, gpio0_63_grp,
+                               gpio0_64_grp, gpio0_65_grp, gpio0_66_grp,
+                               gpio0_67_grp, gpio0_68_grp, gpio0_69_grp,
+                               gpio0_70_grp, gpio0_71_grp, gpio0_72_grp,
+                               gpio0_73_grp, gpio0_74_grp, gpio0_75_grp,
+                               gpio0_76_grp, gpio0_77_grp, usb0_0_grp,
+                               usb1_0_grp, pmu0_0_grp, pmu0_1_grp,
+                               pmu0_2_grp, pmu0_3_grp, pmu0_4_grp,
+                               pmu0_5_grp, pmu0_6_grp, pmu0_7_grp,
+                               pmu0_8_grp, pmu0_9_grp, pmu0_10_grp,
+                               pmu0_11_grp, pcie0_0_grp, pcie0_1_grp,
+                               pcie0_2_grp, pcie0_3_grp, pcie0_4_grp,
+                               pcie0_5_grp, pcie0_6_grp, pcie0_7_grp,
+                               csu0_0_grp, csu0_1_grp, csu0_2_grp,
+                               csu0_3_grp, csu0_4_grp, csu0_5_grp,
+                               csu0_6_grp, csu0_7_grp, csu0_8_grp,
+                               csu0_9_grp, csu0_10_grp, csu0_11_grp,
+                               dpaux0_0_grp, dpaux0_1_grp, dpaux0_2_grp,
+                               dpaux0_3_grp, pjtag0_0_grp, pjtag0_1_grp,
+                               pjtag0_2_grp, pjtag0_3_grp, pjtag0_4_grp,
+                               pjtag0_5_grp, trace0_0_grp, trace0_clk_0_grp,
+                               trace0_1_grp, trace0_clk_1_grp, trace0_2_grp,
+                               trace0_clk_2_grp, testscan0_0_grp]
+                  else:
+                    anyOf:
+                      - pattern: '^((LPD|PMC)_)?MIO([0-9]|[1-6][0-9]|7[0-7])$'
+                      - enum: [spi0_0_grp, spi0_1_grp, spi0_2_grp, spi0_3_grp, spi0_4_grp, spi0_5_grp,
+                               spi0_ss_0_grp, spi0_ss_1_grp, spi0_ss_2_grp, spi0_ss_3_grp, spi0_ss_4_grp,
+                               spi0_ss_5_grp, spi0_ss_6_grp, spi0_ss_7_grp, spi0_ss_8_grp, spi0_ss_9_grp,
+                               spi0_ss_10_grp, spi0_ss_11_grp, spi0_ss_12_grp, spi0_ss_13_grp, spi0_ss_14_grp,
+                               spi0_ss_15_grp, spi0_ss_16_grp, spi0_ss_17_grp, spi1_0_grp, spi1_1_grp,
+                               spi1_2_grp, spi1_3_grp, spi1_4_grp, spi1_5_grp, spi1_ss_0_grp, spi1_ss_1_grp,
+                               spi1_ss_2_grp, spi1_ss_3_grp, spi1_ss_4_grp, spi1_ss_5_grp, spi1_ss_6_grp,
+                               spi1_ss_7_grp, spi1_ss_8_grp, spi1_ss_9_grp, spi1_ss_10_grp, spi1_ss_11_grp,
+                               spi1_ss_12_grp, spi1_ss_13_grp, spi1_ss_14_grp, spi1_ss_15_grp, spi1_ss_16_grp
+                               spi1_ss_17_grp, can0_0_grp, can0_1_grp, can0_2_grp, can0_3_grp, can0_4_grp,
+                               can0_5_grp, can0_6_grp, can0_7_grp, can0_8_grp, can0_9_grp, can0_10_grp,
+                               can0_11_grp, can0_12_grp, can0_13_grp, can0_14_grp, can0_15_grp, can0_16_grp,
+                               can0_17_grp, can1_0_grp, can1_1_grp, can1_2_grp, can1_3_grp, can1_4_grp,
+                               can1_5_grp, can1_6_grp, can1_7_grp, can1_8_grp, can1_9_grp, can1_10_grp,
+                               can1_11_grp, can1_12_grp, can1_13_grp, can1_14_grp, can1_15_grp, can1_16_grp,
+                               can1_17_grp, can1_18_grp, i2c0_0_grp, i2c0_1_grp, i2c0_2_grp, i2c0_3_grp,
+                               i2c0_4_grp, i2c0_5_grp, i2c0_6_grp, i2c0_7_grp, i2c0_8_grp, i2c0_9_grp,
+                               i2c0_10_grp, i2c0_11_grp, i2c0_12_grp, i2c0_13_grp, i2c0_14_grp, i2c0_15_grp,
+                               i2c0_16_grp, i2c0_17_grp, i2c1_0_grp, i2c1_1_grp, i2c1_2_grp, i2c1_3_grp,
+                               i2c1_4_grp, i2c1_5_grp, i2c1_6_grp, i2c1_7_grp, i2c1_8_grp, i2c1_9_grp,
+                               i2c1_10_grp, i2c1_11_grp, i2c1_12_grp, i2c1_13_grp, i2c1_14_grp, i2c1_15_grp,
+                               i2c1_16_grp, i2c1_17_grp, i2c1_18_grp, i2c_pmc_0_grp, i2c_pmc_1_grp,
+                               i2c_pmc_2_grp, i2c_pmc_3_grp, i2c_pmc_4_grp, i2c_pmc_5_grp, i2c_pmc_6_grp,
+                               i2c_pmc_7_grp, i2c_pmc_8_grp, i2c_pmc_9_grp, i2c_pmc_10_grp, i2c_pmc_11_grp,
+                               i2c_pmc_12_grp, ttc0_clk_0_grp, ttc0_clk_1_grp, ttc0_clk_2_grp, ttc0_clk_3_grp,
+                               ttc0_clk_4_grp, ttc0_clk_5_grp, ttc0_clk_6_grp, ttc0_clk_7_grp, ttc0_clk_8_grp,
+                               ttc0_wav_0_grp, ttc0_wav_1_grp, ttc0_wav_2_grp, ttc0_wav_3_grp, ttc0_wav_4_grp,
+                               ttc0_wav_5_grp, ttc0_wav_6_grp, ttc0_wav_7_grp, ttc0_wav_8_grp, ttc1_clk_0_grp,
+                               ttc1_clk_1_grp, ttc1_clk_2_grp, ttc1_clk_3_grp, ttc1_clk_4_grp, ttc1_clk_5_grp,
+                               ttc1_clk_6_grp, ttc1_clk_7_grp, ttc1_clk_8_grp, ttc1_wav_0_grp, ttc1_wav_1_grp,
+                               ttc1_wav_2_grp, ttc1_wav_3_grp, ttc1_wav_4_grp, ttc1_wav_5_grp, ttc1_wav_6_grp,
+                               ttc1_wav_7_grp, ttc1_wav_8_grp, ttc2_clk_0_grp, ttc2_clk_1_grp, ttc2_clk_2_grp,
+                               ttc2_clk_3_grp, ttc2_clk_4_grp, ttc2_clk_5_grp, ttc2_clk_6_grp, ttc2_clk_7_grp,
+                               ttc2_clk_8_grp, ttc2_wav_0_grp, ttc2_wav_1_grp, ttc2_wav_2_grp, ttc2_wav_3_grp,
+                               ttc2_wav_4_grp, ttc2_wav_5_grp, ttc2_wav_6_grp, ttc2_wav_7_grp, ttc2_wav_8_grp,
+                               ttc3_clk_0_grp, ttc3_clk_1_grp, ttc3_clk_2_grp, ttc3_clk_3_grp, ttc3_clk_4_grp,
+                               ttc3_clk_5_grp, ttc3_clk_6_grp, ttc3_clk_7_grp, ttc3_clk_8_grp, ttc3_wav_0_grp,
+                               ttc3_wav_1_grp, ttc3_wav_2_grp, ttc3_wav_3_grp, ttc3_wav_4_grp, ttc3_wav_5_grp,
+                               ttc3_wav_6_grp, ttc3_wav_7_grp, ttc3_wav_8_grp, wwdt0_0_grp, wwdt0_1_grp,
+                               wwdt0_2_grp, wwdt0_3_grp, wwdt0_4_grp, wwdt0_5_grp, wwdt1_0_grp, wwdt1_1_grp,
+                               wwdt1_2_grp, wwdt1_3_grp, wwdt1_4_grp, wwdt1_5_grp, sysmon_i2c0_0_grp,
+                               sysmon_i2c0_1_grp, sysmon_i2c0_2_grp, sysmon_i2c0_3_grp, sysmon_i2c0_4_grp,
+                               sysmon_i2c0_5_grp, sysmon_i2c0_6_grp, sysmon_i2c0_7_grp, sysmon_i2c0_8_grp,
+                               sysmon_i2c0_9_grp, sysmon_i2c0_10_grp, sysmon_i2c0_11_grp, sysmon_i2c0_12_grp,
+                               sysmon_i2c0_13_grp, sysmon_i2c0_14_grp, sysmon_i2c0_15_grp,
+                               sysmon_i2c0_16_grp, sysmon_i2c0_17_grp, sysmon_i2c0_alrt_0_grp,
+                               sysmon_i2c0_alrt_1_grp, sysmon_i2c0_alrt_2_grp, sysmon_i2c0_alrt_3_grp,
+                               sysmon_i2c0_alrt_4_grp, sysmon_i2c0_alrt_5_grp, sysmon_i2c0_alrt_6_grp,
+                               sysmon_i2c0_alrt_7_grp, sysmon_i2c0_alrt_8_grp, sysmon_i2c0_alrt_9_grp,
+                               sysmon_i2c0_alrt_10_grp, sysmon_i2c0_alrt_11_grp, sysmon_i2c0_alrt_12_grp,
+                               sysmon_i2c0_alrt_13_grp, sysmon_i2c0_alrt_14_grp, sysmon_i2c0_alrt_15_grp,
+                               sysmon_i2c0_alrt_16_grp, sysmon_i2c0_alrt_17_grp, uart0_0_grp, uart0_1_grp,
+                               uart0_2_grp, uart0_3_grp, uart0_4_grp, uart0_5_grp, uart0_6_grp, uart0_7_grp,
+                               uart0_8_grp, uart0_ctrl_0_grp, uart0_ctrl_1_grp, uart0_ctrl_2_grp,
+                               uart0_ctrl_3_grp, uart0_ctrl_4_grp, uart0_ctrl_5_grp, uart0_ctrl_6_grp,
+                               uart0_ctrl_7_grp, uart0_ctrl_8_grp, uart1_0_grp, uart1_1_grp, uart1_2_grp,
+                               uart1_3_grp, uart1_4_grp, uart1_5_grp, uart1_6_grp, uart1_7_grp, uart1_8_grp,
+                               uart1_ctrl_0_grp, uart1_ctrl_1_grp, uart1_ctrl_2_grp, uart1_ctrl_3_grp,
+                               uart1_ctrl_4_grp, uart1_ctrl_5_grp, uart1_ctrl_6_grp, uart1_ctrl_7_grp,
+                               uart1_ctrl_8_grp, gpio0_0_grp, gpio0_1_grp, gpio0_2_grp, gpio0_3_grp,
+                               gpio0_4_grp, gpio0_5_grp, gpio0_6_grp, gpio0_7_grp, gpio0_8_grp, gpio0_9_grp,
+                               gpio0_10_grp, gpio0_11_grp, gpio0_12_grp, gpio0_13_grp, gpio0_14_grp,
+                               gpio0_15_grp, gpio0_16_grp, gpio0_17_grp, gpio0_18_grp, gpio0_19_grp,
+                               gpio0_20_grp, gpio0_21_grp, gpio0_22_grp, gpio0_23_grp, gpio0_24_grp,
+                               gpio0_25_grp, gpio1_0_grp, gpio1_1_grp, gpio1_2_grp, gpio1_3_grp, gpio1_4_grp,
+                               gpio1_5_grp, gpio1_6_grp, gpio1_7_grp, gpio1_8_grp, gpio1_9_grp,
+                               gpio1_10_grp, gpio1_11_grp, gpio1_12_grp, gpio1_13_grp, gpio1_14_grp,
+                               gpio1_15_grp, gpio1_16_grp, gpio1_17_grp, gpio1_18_grp, gpio1_19_grp,
+                               gpio1_20_grp, gpio1_21_grp, gpio1_22_grp, gpio1_23_grp, gpio1_24_grp,
+                               gpio1_25_grp, gpio2_0_grp, gpio2_1_grp, gpio2_2_grp, gpio2_3_grp, gpio2_4_grp,
+                               gpio2_5_grp, gpio2_6_grp, gpio2_7_grp, gpio2_8_grp, gpio2_9_grp, gpio2_10_grp,
+                               gpio2_11_grp, gpio2_12_grp, gpio2_13_grp, gpio2_14_grp, gpio2_15_grp,
+                               gpio2_16_grp, gpio2_17_grp, gpio2_18_grp, gpio2_19_grp, gpio2_20_grp,
+                               gpio2_21_grp, gpio2_22_grp, gpio2_23_grp, gpio2_24_grp, gpio2_25_grp,
+                               emio0_0_grp, emio0_1_grp, emio0_2_grp, emio0_3_grp, emio0_4_grp, emio0_5_grp,
+                               emio0_6_grp, emio0_7_grp, emio0_8_grp, emio0_9_grp, emio0_10_grp,
+                               emio0_11_grp, emio0_12_grp, emio0_13_grp, emio0_14_grp, emio0_15_grp,
+                               emio0_16_grp, emio0_17_grp, emio0_18_grp, emio0_19_grp, emio0_20_grp,
+                               emio0_21_grp, emio0_22_grp, emio0_23_grp, emio0_24_grp, emio0_25_grp,
+                               emio0_26_grp, emio0_27_grp, emio0_28_grp, emio0_29_grp, emio0_30_grp,
+                               emio0_31_grp, emio0_32_grp, emio0_33_grp, emio0_34_grp, emio0_35_grp,
+                               emio0_36_grp, emio0_37_grp, emio0_38_grp, emio0_39_grp, emio0_40_grp,
+                               emio0_41_grp, emio0_42_grp, emio0_43_grp, emio0_44_grp, emio0_45_grp,
+                               emio0_46_grp, emio0_47_grp, emio0_48_grp, emio0_49_grp, emio0_50_grp,
+                               emio0_51_grp, emio0_52_grp, emio0_53_grp, emio0_54_grp, emio0_55_grp,
+                               emio0_56_grp, emio0_57_grp, emio0_58_grp, emio0_59_grp, emio0_60_grp,
+                               emio0_61_grp, emio0_62_grp, emio0_63_grp, emio0_64_grp, emio0_65_grp,
+                               emio0_66_grp, emio0_67_grp, emio0_68_grp, emio0_69_grp, emio0_70_grp,
+                               emio0_71_grp, emio0_72_grp, emio0_73_grp, emio0_74_grp, emio0_75_grp,
+                               emio0_76_grp, emio0_77_grp, gem0_0_grp, gem0_1_grp, gem1_0_grp, gem1_1_grp,
+                               trace0_0_grp, trace0_1_grp, trace0_2_grp, trace0_clk_0_grp, trace0_clk_1_grp,
+                               trace0_clk_2_grp, mdio0_0_grp, mdio0_1_grp, mdio1_0_grp, mdio1_1_grp,
+                               gem_tsu0_0_grp, gem_tsu0_1_grp, gem_tsu0_2_grp, gem_tsu0_3_grp, pcie0_0_grp,
+                               pcie0_1_grp, pcie0_2_grp, smap0_0_grp, usb0_0_grp, sd0_0_grp, sd0_1_grp,
+                               sd0_2_grp, sd0_3_grp, sd0_4_grp, sd0_5_grp, sd0_6_grp, sd0_7_grp, sd0_8_grp,
+                               sd0_9_grp, sd0_10_grp, sd0_11_grp, sd0_12_grp, sd0_13_grp, sd0_14_grp,
+                               sd0_15_grp, sd0_16_grp, sd0_17_grp, sd0_18_grp, sd0_19_grp, sd0_20_grp,
+                               sd0_21_grp, sd0_pc_0_grp, sd0_pc_1_grp, sd0_cd_0_grp, sd0_cd_1_grp,
+                               sd0_wp_0_grp, sd0_wp_1_grp, sd1_0_grp, sd1_1_grp, sd1_2_grp, sd1_3_grp,
+                               sd1_4_grp, sd1_5_grp, sd1_6_grp, sd1_7_grp, sd1_8_grp, sd1_9_grp, sd1_10_grp,
+                               sd1_11_grp, sd1_12_grp, sd1_13_grp, sd1_14_grp, sd1_15_grp, sd1_16_grp,
+                               sd1_17_grp, sd1_18_grp, sd1_19_grp, sd1_20_grp, sd1_21_grp, sd1_pc_0_grp,
+                               sd1_pc_1_grp, sd1_cd_0_grp, sd1_cd_1_grp, sd1_wp_0_grp, sd1_wp_1_grp,
+                               ospi0_0_grp, ospi0_ss_0_grp, qspi0_0_grp, qspi0_fbclk_0_grp, qspi0_ss_0_grp,
+                               test_clk_0_grp, test_scan_0_grp, tamper_trigger_0_grp]
             maxItems: 78
 
           function:
             description:
               Specify the alternative function to be configured for the
               given pin groups.
-            enum: [ethernet0, ethernet1, ethernet2, ethernet3, gemtsu0, usb0, usb1, mdio0,
-                   mdio1, mdio2, mdio3, qspi0, qspi_fbclk, qspi_ss, spi0, spi1, spi0_ss,
-                   spi1_ss, sdio0, sdio0_pc, sdio0_wp, sdio0_cd, sdio1, sdio1_pc, sdio1_wp,
-                   sdio1_cd, nand0, nand0_ce, nand0_rb, nand0_dqs, can0, can1, uart0, uart1,
-                   i2c0, i2c1, ttc0_clk, ttc0_wav, ttc1_clk, ttc1_wav, ttc2_clk, ttc2_wav,
-                   ttc3_clk, ttc3_wav, swdt0_clk, swdt0_rst, swdt1_clk, swdt1_rst, gpio0, pmu0,
-                   pcie0, csu0, dpaux0, pjtag0, trace0, trace0_clk, testscan0]
+            allOf:
+              - if:
+                  properties:
+                    compatible:
+                      contains:
+                        const: xlnx,zynqmp-pinctrl
+                then:
+                  enum: [ethernet0, ethernet1, ethernet2, ethernet3, gemtsu0, usb0, usb1, mdio0,
+                         mdio1, mdio2, mdio3, qspi0, qspi_fbclk, qspi_ss, spi0, spi1, spi0_ss,
+                         spi1_ss, sdio0, sdio0_pc, sdio0_wp, sdio0_cd, sdio1, sdio1_pc, sdio1_wp,
+                         sdio1_cd, nand0, nand0_ce, nand0_rb, nand0_dqs, can0, can1, uart0, uart1,
+                         i2c0, i2c1, ttc0_clk, ttc0_wav, ttc1_clk, ttc1_wav, ttc2_clk, ttc2_wav,
+                         ttc3_clk, ttc3_wav, swdt0_clk, swdt0_rst, swdt1_clk, swdt1_rst, gpio0, pmu0,
+                         pcie0, csu0, dpaux0, pjtag0, trace0, trace0_clk, testscan0]
+                else:
+                  enum: [spi0, spi0_ss, spi1, spi1_ss, can0, can1, i2c0, i2c1, i2c_pmc, ttc0_clk,
+                         ttc0_wav, ttc1_clk, ttc1_wav, ttc2_clk, ttc2_wav, ttc3_clk, ttc3_wav, wwdt0,
+                         wwdt1, sysmon_i2c0, sysmon_i2c0_alrt, uart0, uart0_ctrl, uart1, uart1_ctrl,
+                         gpio0, gpio1, gpio2, emio0, gem0, gem1, trace0, trace0_clk, mdio0, mdio1, gem_tsu0,
+                         pcie0, smap0, usb0, sd0, sd0_pc, sd0_cd, sd0_wp, sd1, sd1_pc, sd1_wp, sd1_cd,
+                         ospi0, ospi0_ss, qspi0, qspi0_fbclk, qspi0_ss, test_clk, test_scan, tamper_trigger]
 
         required:
           - function
@@ -262,7 +402,16 @@  patternProperties:
             description:
               List of pin names to select in this subnode.
             items:
-              pattern: '^MIO([0-9]|[1-6][0-9]|7[0-7])$'
+              allOf:
+                - if:
+                    properties:
+                      compatible:
+                        contains:
+                          const: xlnx,zynqmp-pinctrl
+                  then:
+                    pattern: '^MIO([0-9]|[1-6][0-9]|7[0-7])$'
+                  else:
+                    pattern: '^((LPD|PMC)_)?MIO([0-9]|[1-6][0-9]|7[0-7])$'
             maxItems: 78
 
           bias-pull-up: true